Commit 50662499 authored by Jerome Brunet's avatar Jerome Brunet Committed by Kevin Hilman

ARM64: dts: meson-gx: Use correct mmc clock source 0

Now that the clock source 0 is properly described in the CCF, use it
instead of assuming the default value (xtal)
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 47884c5c
...@@ -661,21 +661,21 @@ &saradc { ...@@ -661,21 +661,21 @@ &saradc {
&sd_emmc_a { &sd_emmc_a {
clocks = <&clkc CLKID_SD_EMMC_A>, clocks = <&clkc CLKID_SD_EMMC_A>,
<&xtal>, <&clkc CLKID_SD_EMMC_A_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&sd_emmc_b { &sd_emmc_b {
clocks = <&clkc CLKID_SD_EMMC_B>, clocks = <&clkc CLKID_SD_EMMC_B>,
<&xtal>, <&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&sd_emmc_c { &sd_emmc_c {
clocks = <&clkc CLKID_SD_EMMC_C>, clocks = <&clkc CLKID_SD_EMMC_C>,
<&xtal>, <&clkc CLKID_SD_EMMC_C_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
......
...@@ -603,21 +603,21 @@ &saradc { ...@@ -603,21 +603,21 @@ &saradc {
&sd_emmc_a { &sd_emmc_a {
clocks = <&clkc CLKID_SD_EMMC_A>, clocks = <&clkc CLKID_SD_EMMC_A>,
<&xtal>, <&clkc CLKID_SD_EMMC_A_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&sd_emmc_b { &sd_emmc_b {
clocks = <&clkc CLKID_SD_EMMC_B>, clocks = <&clkc CLKID_SD_EMMC_B>,
<&xtal>, <&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
&sd_emmc_c { &sd_emmc_c {
clocks = <&clkc CLKID_SD_EMMC_C>, clocks = <&clkc CLKID_SD_EMMC_C>,
<&xtal>, <&clkc CLKID_SD_EMMC_C_CLK0>,
<&clkc CLKID_FCLK_DIV2>; <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1"; clock-names = "core", "clkin0", "clkin1";
}; };
......
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