Commit 5077a324 authored by Linus Walleij's avatar Linus Walleij

Merge tag 'renesas-pinctrl-for-v5.16-tag1' of...

Merge tag 'renesas-pinctrl-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.16

  - Fix duplicate port register on RZ/G2L,
  - A minor improvement.
parents 387292c3 fcfb6314
...@@ -741,12 +741,12 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; } ...@@ -741,12 +741,12 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; }
#define SH_PFC_MAX_REGS 300 #define SH_PFC_MAX_REGS 300
#define SH_PFC_MAX_ENUMS 3000 #define SH_PFC_MAX_ENUMS 3000
static unsigned int sh_pfc_errors __initdata = 0; static unsigned int sh_pfc_errors __initdata;
static unsigned int sh_pfc_warnings __initdata = 0; static unsigned int sh_pfc_warnings __initdata;
static u32 *sh_pfc_regs __initdata = NULL; static u32 *sh_pfc_regs __initdata;
static u32 sh_pfc_num_regs __initdata = 0; static u32 sh_pfc_num_regs __initdata;
static u16 *sh_pfc_enums __initdata = NULL; static u16 *sh_pfc_enums __initdata;
static u32 sh_pfc_num_enums __initdata = 0; static u32 sh_pfc_num_enums __initdata;
#define sh_pfc_err(fmt, ...) \ #define sh_pfc_err(fmt, ...) \
do { \ do { \
......
...@@ -852,7 +852,7 @@ static const u32 rzg2l_gpio_configs[] = { ...@@ -852,7 +852,7 @@ static const u32 rzg2l_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(3, 0x22, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IOLH_ETH0)), RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IOLH_ETH0)),
......
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