Commit 50c643e7 authored by Dhananjay Phadke's avatar Dhananjay Phadke Committed by David S. Miller

netxen: fix coherent dma mask setting

Change default dma mask for NX3031 to 39 bit with ability
to update it to 64-bit (if firmware indicates support). Old
code was restricting it under 4GB (32-bit), sometimes causing
failure to allocate descriptor rings on heavily populated
system. NX2031 based NICs will still get 32-bit coherent mask.
Signed-off-by: default avatarDhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9bfdac94
...@@ -221,7 +221,7 @@ netxen_napi_disable(struct netxen_adapter *adapter) ...@@ -221,7 +221,7 @@ netxen_napi_disable(struct netxen_adapter *adapter)
} }
} }
static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) static int nx_set_dma_mask(struct netxen_adapter *adapter)
{ {
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = adapter->pdev;
uint64_t mask, cmask; uint64_t mask, cmask;
...@@ -229,19 +229,17 @@ static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) ...@@ -229,19 +229,17 @@ static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
adapter->pci_using_dac = 0; adapter->pci_using_dac = 0;
mask = DMA_BIT_MASK(32); mask = DMA_BIT_MASK(32);
/*
* Consistent DMA mask is set to 32 bit because it cannot be set to
* 35 bits. For P3 also leave it at 32 bits for now. Only the rings
* come off this pool.
*/
cmask = DMA_BIT_MASK(32); cmask = DMA_BIT_MASK(32);
if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
#ifndef CONFIG_IA64 #ifndef CONFIG_IA64
if (revision_id >= NX_P3_B0)
mask = DMA_BIT_MASK(39);
else if (revision_id == NX_P2_C1)
mask = DMA_BIT_MASK(35); mask = DMA_BIT_MASK(35);
#endif #endif
} else {
mask = DMA_BIT_MASK(39);
cmask = mask;
}
if (pci_set_dma_mask(pdev, mask) == 0 && if (pci_set_dma_mask(pdev, mask) == 0 &&
pci_set_consistent_dma_mask(pdev, cmask) == 0) { pci_set_consistent_dma_mask(pdev, cmask) == 0) {
adapter->pci_using_dac = 1; adapter->pci_using_dac = 1;
...@@ -256,7 +254,7 @@ static int ...@@ -256,7 +254,7 @@ static int
nx_update_dma_mask(struct netxen_adapter *adapter) nx_update_dma_mask(struct netxen_adapter *adapter)
{ {
int change, shift, err; int change, shift, err;
uint64_t mask, old_mask; uint64_t mask, old_mask, old_cmask;
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = adapter->pdev;
change = 0; change = 0;
...@@ -272,14 +270,29 @@ nx_update_dma_mask(struct netxen_adapter *adapter) ...@@ -272,14 +270,29 @@ nx_update_dma_mask(struct netxen_adapter *adapter)
if (change) { if (change) {
old_mask = pdev->dma_mask; old_mask = pdev->dma_mask;
old_cmask = pdev->dev.coherent_dma_mask;
mask = (1ULL<<(32+shift)) - 1; mask = (1ULL<<(32+shift)) - 1;
err = pci_set_dma_mask(pdev, mask); err = pci_set_dma_mask(pdev, mask);
if (err) if (err)
return pci_set_dma_mask(pdev, old_mask); goto err_out;
if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
err = pci_set_consistent_dma_mask(pdev, mask);
if (err)
goto err_out;
}
dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift);
} }
return 0; return 0;
err_out:
pci_set_dma_mask(pdev, old_mask);
pci_set_consistent_dma_mask(pdev, old_cmask);
return err;
} }
static void netxen_check_options(struct netxen_adapter *adapter) static void netxen_check_options(struct netxen_adapter *adapter)
...@@ -1006,7 +1019,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -1006,7 +1019,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
revision_id = pdev->revision; revision_id = pdev->revision;
adapter->ahw.revision_id = revision_id; adapter->ahw.revision_id = revision_id;
err = nx_set_dma_mask(adapter, revision_id); err = nx_set_dma_mask(adapter);
if (err) if (err)
goto err_out_free_netdev; goto err_out_free_netdev;
......
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