Commit 511d3044 authored by Florian Fainelli's avatar Florian Fainelli

ARM: dts: BCM63xx: Add ARMPLL device tree nodes

Add the ARM PLL controller which comes standard with the Cortex-A9 found
on the BCM63138 SoCs. This is the same controller as the one found in
the Broadcom iProc architecture, however, we have a separate compatible
string to indicate the integration difference, since the hardware is
different.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 7160aa1e
...@@ -43,18 +43,31 @@ clocks { ...@@ -43,18 +43,31 @@ clocks {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
arm_timer_clk: arm_timer_clk { /* UBUS peripheral clock */
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
};
periph_clk: periph_clk { periph_clk: periph_clk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <50000000>; clock-frequency = <50000000>;
clock-output-names = "periph"; clock-output-names = "periph";
}; };
/* peripheral clock for system timer */
axi_clk: axi_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&armpll>;
clock-div = <2>;
clock-mult = <1>;
};
/* APB bus clock */
apb_clk: apb_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&armpll>;
clock-div = <4>;
clock-mult = <1>;
};
}; };
/* ARM bus */ /* ARM bus */
...@@ -93,14 +106,14 @@ global_timer: timer@1e200 { ...@@ -93,14 +106,14 @@ global_timer: timer@1e200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x1e200 0x20>; reg = <0x1e200 0x20>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&arm_timer_clk>; clocks = <&axi_clk>;
}; };
local_timer: local-timer@1e600 { local_timer: local-timer@1e600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x1e600 0x20>; reg = <0x1e600 0x20>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&arm_timer_clk>; clocks = <&axi_clk>;
}; };
twd_watchdog: watchdog@1e620 { twd_watchdog: watchdog@1e620 {
...@@ -109,6 +122,13 @@ twd_watchdog: watchdog@1e620 { ...@@ -109,6 +122,13 @@ twd_watchdog: watchdog@1e620 {
interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
}; };
armpll: armpll {
#clock-cells = <0>;
compatible = "brcm,bcm63138-armpll";
clocks = <&periph_clk>;
reg = <0x20000 0xf00>;
};
pmb0: reset-controller@4800c0 { pmb0: reset-controller@4800c0 {
compatible = "brcm,bcm63138-pmb"; compatible = "brcm,bcm63138-pmb";
reg = <0x4800c0 0x10>; reg = <0x4800c0 0x10>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment