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Commit 511ffaa3 authored by Tom Rini's avatar Tom Rini
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PPC32: Minor cleanups.

parent d64f6036
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Showing with 25 additions and 48 deletions
arch/ppc/boot/common/util.S
View file @ 511ffaa3
...@@ -198,7 +198,7 @@ udelay: ...@@ -198,7 +198,7 @@ udelay:
* timebase_period_ns defaults to 60 (16.6MHz) */ * timebase_period_ns defaults to 60 (16.6MHz) */
lis r5,timebase_period_ns@ha lis r5,timebase_period_ns@ha
lwz r5,timebase_period_ns@l(r5) lwz r5,timebase_period_ns@l(r5)
addi r4,r4,r5 add r4,r4,r5
addi r4,r4,-1 addi r4,r4,-1
divw r4,r4,r5 /* BUS ticks */ divw r4,r4,r5 /* BUS ticks */
1: mftbu r5 1: mftbu r5
......
arch/ppc/kernel/entry.S
View file @ 511ffaa3
...@@ -844,7 +844,7 @@ _GLOBAL(enter_rtas) ...@@ -844,7 +844,7 @@ _GLOBAL(enter_rtas)
LOAD_MSR_KERNEL(r0,MSR_KERNEL) LOAD_MSR_KERNEL(r0,MSR_KERNEL)
SYNC /* disable interrupts so SRR0/1 */ SYNC /* disable interrupts so SRR0/1 */
MTMSRD(r0) /* don't get trashed */ MTMSRD(r0) /* don't get trashed */
li r9,MSR_ li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
mtlr r6 mtlr r6
CLR_TOP32(r7) CLR_TOP32(r7)
mtspr SPRG2,r7 mtspr SPRG2,r7
......
arch/ppc/kernel/head.S
View file @ 511ffaa3
...@@ -276,7 +276,7 @@ __secondary_hold: ...@@ -276,7 +276,7 @@ __secondary_hold:
stw r1,GPR1(r11); \ stw r1,GPR1(r11); \
stw r1,0(r11); \ stw r1,0(r11); \
tovirt(r1,r11); /* set new kernel sp */ \ tovirt(r1,r11); /* set new kernel sp */ \
li r10,MSR_; /* can now take exceptions again */ \ li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
MTMSRD(r10); /* (except for mach check in rtas) */ \ MTMSRD(r10); /* (except for mach check in rtas) */ \
stw r0,GPR0(r11); \ stw r0,GPR0(r11); \
SAVE_4GPRS(3, r11); \ SAVE_4GPRS(3, r11); \
......
arch/ppc/kernel/head_44x.S
View file @ 511ffaa3
...@@ -974,7 +974,7 @@ _GLOBAL(giveup_fpu) ...@@ -974,7 +974,7 @@ _GLOBAL(giveup_fpu)
*/ */
_GLOBAL(abort) _GLOBAL(abort)
mfspr r13,SPRN_DBCR0 mfspr r13,SPRN_DBCR0
oris r13,r13,DBCR_RST(DBCR_RST_SYSTEM)@h oris r13,r13,DBCR0_RST_SYSTEM@h
mtspr SPRN_DBCR0,r13 mtspr SPRN_DBCR0,r13
_GLOBAL(set_context) _GLOBAL(set_context)
......
arch/ppc/kernel/head_4xx.S
View file @ 511ffaa3
...@@ -983,7 +983,7 @@ initial_mmu: ...@@ -983,7 +983,7 @@ initial_mmu:
_GLOBAL(abort) _GLOBAL(abort)
mfspr r13,SPRN_DBCR0 mfspr r13,SPRN_DBCR0
oris r13,r13,DBCR_RST(DBCR_RST_SYSTEM)@h oris r13,r13,DBCR0_RST_SYSTEM@h
mtspr SPRN_DBCR0,r13 mtspr SPRN_DBCR0,r13
_GLOBAL(set_context) _GLOBAL(set_context)
......
arch/ppc/kernel/idle_6xx.S
View file @ 511ffaa3
...@@ -32,8 +32,7 @@ ...@@ -32,8 +32,7 @@
* values for some CPU specific registers. Called with r24 * values for some CPU specific registers. Called with r24
* containing CPU number and r3 reloc offset * containing CPU number and r3 reloc offset
*/ */
.globl init_idle_6xx _GLOBAL(init_idle_6xx)
init_idle_6xx:
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
mfspr r4,SPRN_HID0 mfspr r4,SPRN_HID0
rlwinm r4,r4,0,10,8 /* Clear NAP */ rlwinm r4,r4,0,10,8 /* Clear NAP */
...@@ -61,8 +60,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX) ...@@ -61,8 +60,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
* split into several functions & changing the function pointer * split into several functions & changing the function pointer
* depending on the various features. * depending on the various features.
*/ */
.globl ppc6xx_idle _GLOBAL(ppc6xx_idle)
ppc6xx_idle:
/* Check if we can nap or doze, put HID0 mask in r3 /* Check if we can nap or doze, put HID0 mask in r3
*/ */
lis r3, 0 lis r3, 0
...@@ -173,8 +171,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) ...@@ -173,8 +171,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
* we are called with DR/IR still off and r2 containing physical * we are called with DR/IR still off and r2 containing physical
* address of current. * address of current.
*/ */
.globl power_save_6xx_restore _GLOBAL(power_save_6xx_restore)
power_save_6xx_restore:
mfspr r11,SPRN_HID0 mfspr r11,SPRN_HID0
rlwinm. r11,r11,0,10,8 /* Clear NAP & copy NAP bit !state to cr1 EQ */ rlwinm. r11,r11,0,10,8 /* Clear NAP & copy NAP bit !state to cr1 EQ */
cror 4*cr1+eq,4*cr0+eq,4*cr0+eq cror 4*cr1+eq,4*cr0+eq,4*cr0+eq
...@@ -217,26 +214,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX) ...@@ -217,26 +214,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
.data .data
.globl nap_save_msscr0 _GLOBAL(nap_save_msscr0)
nap_save_msscr0:
.space 4*NR_CPUS .space 4*NR_CPUS
.globl nap_save_hid1 _GLOBAL(nap_save_hid1)
nap_save_hid1:
.space 4*NR_CPUS .space 4*NR_CPUS
.globl powersave_nap _GLOBAL(powersave_nap)
powersave_nap:
.long 0 .long 0
.globl powersave_lowspeed _GLOBAL(powersave_lowspeed)
powersave_lowspeed:
.long 0 .long 0
#ifdef DEBUG #ifdef DEBUG
.globl nap_enter_count _GLOBAL(nap_enter_count)
nap_enter_count:
.space 4 .space 4
.globl nap_return_count _GLOBAL(nap_return_count)
nap_return_count:
.space 4 .space 4
#endif #endif
arch/ppc/kernel/l2cr.S
View file @ 511ffaa3
...@@ -387,9 +387,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR) ...@@ -387,9 +387,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
* clobbers r0, r3, ctr, cr0 * clobbers r0, r3, ctr, cr0
* *
*/ */
.globl __flush_disable_L1 _GLOBAL(__flush_disable_L1)
__flush_disable_L1:
/* Stop pending alitvec streams and memory accesses */ /* Stop pending alitvec streams and memory accesses */
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
DSSALL DSSALL
...@@ -435,8 +433,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) ...@@ -435,8 +433,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
* *
* clobbers r3 * clobbers r3
*/ */
.globl __inval_enable_L1 _GLOBAL(__inval_enable_L1)
__inval_enable_L1:
/* Enable and then Flash inval the instruction & data cache */ /* Enable and then Flash inval the instruction & data cache */
mfspr r3,SPRN_HID0 mfspr r3,SPRN_HID0
ori r3,r3, HID0_ICE|HID0_ICFI|HID0_DCE|HID0_DCI ori r3,r3, HID0_ICE|HID0_ICFI|HID0_DCE|HID0_DCI
......
arch/ppc/lib/locks.c
View file @ 511ffaa3
...@@ -4,14 +4,11 @@ ...@@ -4,14 +4,11 @@
* Written by Cort Dougan (cort@cs.nmt.edu) * Written by Cort Dougan (cort@cs.nmt.edu)
*/ */
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/delay.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <asm/processor.h> #include <asm/ppc_asm.h>
#include <asm/system.h> #include <asm/smp.h>
#include <asm/io.h>
#ifdef CONFIG_DEBUG_SPINLOCK #ifdef CONFIG_DEBUG_SPINLOCK
......
arch/ppc/mm/hashtable.S
View file @ 511ffaa3
...@@ -49,8 +49,7 @@ ...@@ -49,8 +49,7 @@
* Uses r0, r3 - r8, ctr, lr. * Uses r0, r3 - r8, ctr, lr.
*/ */
.text .text
.globl hash_page _GLOBAL(hash_page)
hash_page:
#ifdef CONFIG_PPC64BRIDGE #ifdef CONFIG_PPC64BRIDGE
mfmsr r0 mfmsr r0
clrldi r0,r0,1 /* make sure it's in 32-bit mode */ clrldi r0,r0,1 /* make sure it's in 32-bit mode */
...@@ -337,8 +336,7 @@ _GLOBAL(create_hpte) ...@@ -337,8 +336,7 @@ _GLOBAL(create_hpte)
SET_V(r5) /* set V (valid) bit */ SET_V(r5) /* set V (valid) bit */
/* Get the address of the primary PTE group in the hash table (r3) */ /* Get the address of the primary PTE group in the hash table (r3) */
.globl hash_page_patch_A _GLOBAL(hash_page_patch_A)
hash_page_patch_A:
addis r0,r7,Hash_base@h /* base address of hash table */ addis r0,r7,Hash_base@h /* base address of hash table */
rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */ rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
...@@ -368,8 +366,7 @@ hash_page_patch_A: ...@@ -368,8 +366,7 @@ hash_page_patch_A:
/* Search the secondary PTEG for a matching PTE */ /* Search the secondary PTEG for a matching PTE */
ori r5,r5,PTE_H /* set H (secondary hash) bit */ ori r5,r5,PTE_H /* set H (secondary hash) bit */
.globl hash_page_patch_B _GLOBAL(hash_page_patch_B)
hash_page_patch_B:
xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
xori r4,r4,(-PTEG_SIZE & 0xffff) xori r4,r4,(-PTEG_SIZE & 0xffff)
addi r4,r4,-PTE_SIZE addi r4,r4,-PTE_SIZE
...@@ -396,8 +393,7 @@ hash_page_patch_B: ...@@ -396,8 +393,7 @@ hash_page_patch_B:
/* Search the secondary PTEG for an empty slot */ /* Search the secondary PTEG for an empty slot */
ori r5,r5,PTE_H /* set H (secondary hash) bit */ ori r5,r5,PTE_H /* set H (secondary hash) bit */
.globl hash_page_patch_C _GLOBAL(hash_page_patch_C)
hash_page_patch_C:
xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
xori r4,r4,(-PTEG_SIZE & 0xffff) xori r4,r4,(-PTEG_SIZE & 0xffff)
addi r4,r4,-PTE_SIZE addi r4,r4,-PTE_SIZE
...@@ -562,8 +558,7 @@ _GLOBAL(flush_hash_pages) ...@@ -562,8 +558,7 @@ _GLOBAL(flush_hash_pages)
bne- 33b bne- 33b
/* Get the address of the primary PTE group in the hash table (r3) */ /* Get the address of the primary PTE group in the hash table (r3) */
.globl flush_hash_patch_A _GLOBAL(flush_hash_patch_A)
flush_hash_patch_A:
addis r8,r7,Hash_base@h /* base address of hash table */ addis r8,r7,Hash_base@h /* base address of hash table */
rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */ rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
...@@ -581,8 +576,7 @@ flush_hash_patch_A: ...@@ -581,8 +576,7 @@ flush_hash_patch_A:
/* Search the secondary PTEG for a matching PTE */ /* Search the secondary PTEG for a matching PTE */
ori r11,r11,PTE_H /* set H (secondary hash) bit */ ori r11,r11,PTE_H /* set H (secondary hash) bit */
li r0,8 /* PTEs/group */ li r0,8 /* PTEs/group */
.globl flush_hash_patch_B _GLOBAL(flush_hash_patch_B)
flush_hash_patch_B:
xoris r12,r8,Hash_msk>>16 /* compute secondary hash */ xoris r12,r8,Hash_msk>>16 /* compute secondary hash */
xori r12,r12,(-PTEG_SIZE & 0xffff) xori r12,r12,(-PTEG_SIZE & 0xffff)
addi r12,r12,-PTE_SIZE addi r12,r12,-PTE_SIZE
......
arch/ppc/platforms/gemini_prom.S
View file @ 511ffaa3
...@@ -14,8 +14,6 @@ ...@@ -14,8 +14,6 @@
#include <platforms/gemini.h> #include <platforms/gemini.h>
#include <asm/ppc_asm.h> #include <asm/ppc_asm.h>
#define HID0_ABE (1<<3)
/* /*
* On 750's the MMU is on when Linux is booted, so we need to clear out the * On 750's the MMU is on when Linux is booted, so we need to clear out the
* bootloader's BAT settings, make sure we're in supervisor state (gotcha!), * bootloader's BAT settings, make sure we're in supervisor state (gotcha!),
......
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