Commit 51931b37 authored by Haojian Zhuang's avatar Haojian Zhuang

ARM: mmp: enable tauros2 cache in mmp2 dt

Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@gmail.com>
parent a03d8b1e
......@@ -26,6 +26,11 @@ soc {
interrupt-parent = <&intc>;
ranges;
L2: l2-cache {
compatible = "marvell,tauros2-cache";
marvell,tauros2-cache-features = <0x3>;
};
axi@d4200000 { /* AXI */
compatible = "mrvl,axi-bus", "simple-bus";
#address-cells = <1>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment