Commit 519df8a6 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: calculate flexible array member's address.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e7b54945
...@@ -164,7 +164,7 @@ typedef struct _ATOM_Tonga_State { ...@@ -164,7 +164,7 @@ typedef struct _ATOM_Tonga_State {
typedef struct _ATOM_Tonga_State_Array { typedef struct _ATOM_Tonga_State_Array {
UCHAR ucRevId; UCHAR ucRevId;
UCHAR ucNumEntries; /* Number of entries. */ UCHAR ucNumEntries; /* Number of entries. */
ATOM_Tonga_State states[1]; /* Dynamically allocate entries. */ ATOM_Tonga_State entries[1]; /* Dynamically allocate entries. */
} ATOM_Tonga_State_Array; } ATOM_Tonga_State_Array;
typedef struct _ATOM_Tonga_MCLK_Dependency_Record { typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
......
...@@ -154,12 +154,14 @@ const void *get_powerplay_table(struct pp_hwmgr *hwmgr) ...@@ -154,12 +154,14 @@ const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
static int get_vddc_lookup_table( static int get_vddc_lookup_table(
struct pp_hwmgr *hwmgr, struct pp_hwmgr *hwmgr,
phm_ppt_v1_voltage_lookup_table **lookup_table, phm_ppt_v1_voltage_lookup_table **lookup_table,
const ATOM_Tonga_Voltage_Lookup_Table *vddc_lookup_pp_tables, const ATOM_Tonga_Voltage_Lookup_Table *vddc_lookup_pp_tables,
uint32_t max_levels uint32_t max_levels
) )
{ {
uint32_t table_size, i; uint32_t table_size, i;
phm_ppt_v1_voltage_lookup_table *table; phm_ppt_v1_voltage_lookup_table *table;
phm_ppt_v1_voltage_lookup_record *record;
ATOM_Tonga_Voltage_Lookup_Record *atom_record;
PP_ASSERT_WITH_CODE((0 != vddc_lookup_pp_tables->ucNumEntries), PP_ASSERT_WITH_CODE((0 != vddc_lookup_pp_tables->ucNumEntries),
"Invalid CAC Leakage PowerPlay Table!", return 1); "Invalid CAC Leakage PowerPlay Table!", return 1);
...@@ -177,15 +179,17 @@ static int get_vddc_lookup_table( ...@@ -177,15 +179,17 @@ static int get_vddc_lookup_table(
table->count = vddc_lookup_pp_tables->ucNumEntries; table->count = vddc_lookup_pp_tables->ucNumEntries;
for (i = 0; i < vddc_lookup_pp_tables->ucNumEntries; i++) { for (i = 0; i < vddc_lookup_pp_tables->ucNumEntries; i++) {
table->entries[i].us_calculated = 0; record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
table->entries[i].us_vdd = phm_ppt_v1_voltage_lookup_record,
vddc_lookup_pp_tables->entries[i].usVdd; entries, table, i);
table->entries[i].us_cac_low = atom_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
vddc_lookup_pp_tables->entries[i].usCACLow; ATOM_Tonga_Voltage_Lookup_Record,
table->entries[i].us_cac_mid = entries, vddc_lookup_pp_tables, i);
vddc_lookup_pp_tables->entries[i].usCACMid; record->us_calculated = 0;
table->entries[i].us_cac_high = record->us_vdd = atom_record->usVdd;
vddc_lookup_pp_tables->entries[i].usCACHigh; record->us_cac_low = atom_record->usCACLow;
record->us_cac_mid = atom_record->usCACMid;
record->us_cac_high = atom_record->usCACHigh;
} }
*lookup_table = table; *lookup_table = table;
...@@ -314,11 +318,12 @@ static int init_dpm_2_parameters( ...@@ -314,11 +318,12 @@ static int init_dpm_2_parameters(
static int get_valid_clk( static int get_valid_clk(
struct pp_hwmgr *hwmgr, struct pp_hwmgr *hwmgr,
struct phm_clock_array **clk_table, struct phm_clock_array **clk_table,
const phm_ppt_v1_clock_voltage_dependency_table * clk_volt_pp_table phm_ppt_v1_clock_voltage_dependency_table const *clk_volt_pp_table
) )
{ {
uint32_t table_size, i; uint32_t table_size, i;
struct phm_clock_array *table; struct phm_clock_array *table;
phm_ppt_v1_clock_voltage_dependency_record *dep_record;
PP_ASSERT_WITH_CODE((0 != clk_volt_pp_table->count), PP_ASSERT_WITH_CODE((0 != clk_volt_pp_table->count),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -335,9 +340,12 @@ static int get_valid_clk( ...@@ -335,9 +340,12 @@ static int get_valid_clk(
table->count = (uint32_t)clk_volt_pp_table->count; table->count = (uint32_t)clk_volt_pp_table->count;
for (i = 0; i < table->count; i++) for (i = 0; i < table->count; i++) {
table->values[i] = (uint32_t)clk_volt_pp_table->entries[i].clk; dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
phm_ppt_v1_clock_voltage_dependency_record,
entries, clk_volt_pp_table, i);
table->values[i] = (uint32_t)dep_record->clk;
}
*clk_table = table; *clk_table = table;
return 0; return 0;
...@@ -346,7 +354,7 @@ static int get_valid_clk( ...@@ -346,7 +354,7 @@ static int get_valid_clk(
static int get_hard_limits( static int get_hard_limits(
struct pp_hwmgr *hwmgr, struct pp_hwmgr *hwmgr,
struct phm_clock_and_voltage_limits *limits, struct phm_clock_and_voltage_limits *limits,
const ATOM_Tonga_Hard_Limit_Table * limitable ATOM_Tonga_Hard_Limit_Table const *limitable
) )
{ {
PP_ASSERT_WITH_CODE((0 != limitable->ucNumEntries), "Invalid PowerPlay Table!", return -1); PP_ASSERT_WITH_CODE((0 != limitable->ucNumEntries), "Invalid PowerPlay Table!", return -1);
...@@ -364,11 +372,13 @@ static int get_hard_limits( ...@@ -364,11 +372,13 @@ static int get_hard_limits(
static int get_mclk_voltage_dependency_table( static int get_mclk_voltage_dependency_table(
struct pp_hwmgr *hwmgr, struct pp_hwmgr *hwmgr,
phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_mclk_dep_table, phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_mclk_dep_table,
const ATOM_Tonga_MCLK_Dependency_Table * mclk_dep_table ATOM_Tonga_MCLK_Dependency_Table const *mclk_dep_table
) )
{ {
uint32_t table_size, i; uint32_t table_size, i;
phm_ppt_v1_clock_voltage_dependency_table *mclk_table; phm_ppt_v1_clock_voltage_dependency_table *mclk_table;
phm_ppt_v1_clock_voltage_dependency_record *mclk_table_record;
ATOM_Tonga_MCLK_Dependency_Record *mclk_dep_record;
PP_ASSERT_WITH_CODE((0 != mclk_dep_table->ucNumEntries), PP_ASSERT_WITH_CODE((0 != mclk_dep_table->ucNumEntries),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -386,16 +396,17 @@ static int get_mclk_voltage_dependency_table( ...@@ -386,16 +396,17 @@ static int get_mclk_voltage_dependency_table(
mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries;
for (i = 0; i < mclk_dep_table->ucNumEntries; i++) { for (i = 0; i < mclk_dep_table->ucNumEntries; i++) {
mclk_table->entries[i].vddInd = mclk_table_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
mclk_dep_table->entries[i].ucVddcInd; phm_ppt_v1_clock_voltage_dependency_record,
mclk_table->entries[i].vdd_offset = entries, mclk_table, i);
mclk_dep_table->entries[i].usVddgfxOffset; mclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
mclk_table->entries[i].vddci = ATOM_Tonga_MCLK_Dependency_Record,
mclk_dep_table->entries[i].usVddci; entries, mclk_dep_table, i);
mclk_table->entries[i].mvdd = mclk_table_record->vddInd = mclk_dep_record->ucVddcInd;
mclk_dep_table->entries[i].usMvdd; mclk_table_record->vdd_offset = mclk_dep_record->usVddgfxOffset;
mclk_table->entries[i].clk = mclk_table_record->vddci = mclk_dep_record->usVddci;
mclk_dep_table->entries[i].ulMclk; mclk_table_record->mvdd = mclk_dep_record->usMvdd;
mclk_table_record->clk = mclk_dep_record->ulMclk;
} }
*pp_tonga_mclk_dep_table = mclk_table; *pp_tonga_mclk_dep_table = mclk_table;
...@@ -411,10 +422,12 @@ static int get_sclk_voltage_dependency_table( ...@@ -411,10 +422,12 @@ static int get_sclk_voltage_dependency_table(
{ {
uint32_t table_size, i; uint32_t table_size, i;
phm_ppt_v1_clock_voltage_dependency_table *sclk_table; phm_ppt_v1_clock_voltage_dependency_table *sclk_table;
phm_ppt_v1_clock_voltage_dependency_record *sclk_table_record;
if (sclk_dep_table->ucRevId < 1) { if (sclk_dep_table->ucRevId < 1) {
const ATOM_Tonga_SCLK_Dependency_Table *tonga_table = const ATOM_Tonga_SCLK_Dependency_Table *tonga_table =
(ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table; (ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table;
ATOM_Tonga_SCLK_Dependency_Record *sclk_dep_record;
PP_ASSERT_WITH_CODE((0 != tonga_table->ucNumEntries), PP_ASSERT_WITH_CODE((0 != tonga_table->ucNumEntries),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -432,20 +445,23 @@ static int get_sclk_voltage_dependency_table( ...@@ -432,20 +445,23 @@ static int get_sclk_voltage_dependency_table(
sclk_table->count = (uint32_t)tonga_table->ucNumEntries; sclk_table->count = (uint32_t)tonga_table->ucNumEntries;
for (i = 0; i < tonga_table->ucNumEntries; i++) { for (i = 0; i < tonga_table->ucNumEntries; i++) {
sclk_table->entries[i].vddInd = sclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
tonga_table->entries[i].ucVddInd; ATOM_Tonga_SCLK_Dependency_Record,
sclk_table->entries[i].vdd_offset = entries, tonga_table, i);
tonga_table->entries[i].usVddcOffset; sclk_table_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
sclk_table->entries[i].clk = phm_ppt_v1_clock_voltage_dependency_record,
tonga_table->entries[i].ulSclk; entries, sclk_table, i);
sclk_table->entries[i].cks_enable = sclk_table_record->vddInd = sclk_dep_record->ucVddInd;
(((tonga_table->entries[i].ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0; sclk_table_record->vdd_offset = sclk_dep_record->usVddcOffset;
sclk_table->entries[i].cks_voffset = sclk_table_record->clk = sclk_dep_record->ulSclk;
(tonga_table->entries[i].ucCKSVOffsetandDisable & 0x7F); sclk_table_record->cks_enable =
(((sclk_dep_record->ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0;
sclk_table_record->cks_voffset = (sclk_dep_record->ucCKSVOffsetandDisable & 0x7F);
} }
} else { } else {
const ATOM_Polaris_SCLK_Dependency_Table *polaris_table = const ATOM_Polaris_SCLK_Dependency_Table *polaris_table =
(ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table; (ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table;
ATOM_Polaris_SCLK_Dependency_Record *sclk_dep_record;
PP_ASSERT_WITH_CODE((0 != polaris_table->ucNumEntries), PP_ASSERT_WITH_CODE((0 != polaris_table->ucNumEntries),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -463,17 +479,19 @@ static int get_sclk_voltage_dependency_table( ...@@ -463,17 +479,19 @@ static int get_sclk_voltage_dependency_table(
sclk_table->count = (uint32_t)polaris_table->ucNumEntries; sclk_table->count = (uint32_t)polaris_table->ucNumEntries;
for (i = 0; i < polaris_table->ucNumEntries; i++) { for (i = 0; i < polaris_table->ucNumEntries; i++) {
sclk_table->entries[i].vddInd = sclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
polaris_table->entries[i].ucVddInd; ATOM_Polaris_SCLK_Dependency_Record,
sclk_table->entries[i].vdd_offset = entries, polaris_table, i);
polaris_table->entries[i].usVddcOffset; sclk_table_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
sclk_table->entries[i].clk = phm_ppt_v1_clock_voltage_dependency_record,
polaris_table->entries[i].ulSclk; entries, sclk_table, i);
sclk_table->entries[i].cks_enable = sclk_table_record->vddInd = sclk_dep_record->ucVddInd;
(((polaris_table->entries[i].ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0; sclk_table_record->vdd_offset = sclk_dep_record->usVddcOffset;
sclk_table->entries[i].cks_voffset = sclk_table_record->clk = sclk_dep_record->ulSclk;
(polaris_table->entries[i].ucCKSVOffsetandDisable & 0x7F); sclk_table_record->cks_enable =
sclk_table->entries[i].sclk_offset = polaris_table->entries[i].ulSclkOffset; (((sclk_dep_record->ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0;
sclk_table_record->cks_voffset = (sclk_dep_record->ucCKSVOffsetandDisable & 0x7F);
sclk_table_record->sclk_offset = sclk_dep_record->ulSclkOffset;
} }
} }
*pp_tonga_sclk_dep_table = sclk_table; *pp_tonga_sclk_dep_table = sclk_table;
...@@ -484,16 +502,19 @@ static int get_sclk_voltage_dependency_table( ...@@ -484,16 +502,19 @@ static int get_sclk_voltage_dependency_table(
static int get_pcie_table( static int get_pcie_table(
struct pp_hwmgr *hwmgr, struct pp_hwmgr *hwmgr,
phm_ppt_v1_pcie_table **pp_tonga_pcie_table, phm_ppt_v1_pcie_table **pp_tonga_pcie_table,
const PPTable_Generic_SubTable_Header * pTable PPTable_Generic_SubTable_Header const *ptable
) )
{ {
uint32_t table_size, i, pcie_count; uint32_t table_size, i, pcie_count;
phm_ppt_v1_pcie_table *pcie_table; phm_ppt_v1_pcie_table *pcie_table;
struct phm_ppt_v1_information *pp_table_information = struct phm_ppt_v1_information *pp_table_information =
(struct phm_ppt_v1_information *)(hwmgr->pptable); (struct phm_ppt_v1_information *)(hwmgr->pptable);
phm_ppt_v1_pcie_record *pcie_record;
if (ptable->ucRevId < 1) {
const ATOM_Tonga_PCIE_Table *atom_pcie_table = (ATOM_Tonga_PCIE_Table *)ptable;
ATOM_Tonga_PCIE_Record *atom_pcie_record;
if (pTable->ucRevId < 1) {
const ATOM_Tonga_PCIE_Table *atom_pcie_table = (ATOM_Tonga_PCIE_Table *)pTable;
PP_ASSERT_WITH_CODE((atom_pcie_table->ucNumEntries != 0), PP_ASSERT_WITH_CODE((atom_pcie_table->ucNumEntries != 0),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -519,18 +540,23 @@ static int get_pcie_table( ...@@ -519,18 +540,23 @@ static int get_pcie_table(
Disregarding the excess entries... \n"); Disregarding the excess entries... \n");
pcie_table->count = pcie_count; pcie_table->count = pcie_count;
for (i = 0; i < pcie_count; i++) { for (i = 0; i < pcie_count; i++) {
pcie_table->entries[i].gen_speed = pcie_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
atom_pcie_table->entries[i].ucPCIEGenSpeed; phm_ppt_v1_pcie_record,
pcie_table->entries[i].lane_width = entries, pcie_table, i);
atom_pcie_table->entries[i].usPCIELaneWidth; atom_pcie_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_PCIE_Record,
entries, atom_pcie_table, i);
pcie_record->gen_speed = atom_pcie_record->ucPCIEGenSpeed;
pcie_record->lane_width = atom_pcie_record->usPCIELaneWidth;
} }
*pp_tonga_pcie_table = pcie_table; *pp_tonga_pcie_table = pcie_table;
} else { } else {
/* Polaris10/Polaris11 and newer. */ /* Polaris10/Polaris11 and newer. */
const ATOM_Polaris10_PCIE_Table *atom_pcie_table = (ATOM_Polaris10_PCIE_Table *)pTable; const ATOM_Polaris10_PCIE_Table *atom_pcie_table = (ATOM_Polaris10_PCIE_Table *)ptable;
ATOM_Polaris10_PCIE_Record *atom_pcie_record;
PP_ASSERT_WITH_CODE((atom_pcie_table->ucNumEntries != 0), PP_ASSERT_WITH_CODE((atom_pcie_table->ucNumEntries != 0),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -558,12 +584,15 @@ static int get_pcie_table( ...@@ -558,12 +584,15 @@ static int get_pcie_table(
pcie_table->count = pcie_count; pcie_table->count = pcie_count;
for (i = 0; i < pcie_count; i++) { for (i = 0; i < pcie_count; i++) {
pcie_table->entries[i].gen_speed = pcie_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
atom_pcie_table->entries[i].ucPCIEGenSpeed; phm_ppt_v1_pcie_record,
pcie_table->entries[i].lane_width = entries, pcie_table, i);
atom_pcie_table->entries[i].usPCIELaneWidth; atom_pcie_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
pcie_table->entries[i].pcie_sclk = ATOM_Polaris10_PCIE_Record,
atom_pcie_table->entries[i].ulPCIE_Sclk; entries, atom_pcie_table, i);
pcie_record->gen_speed = atom_pcie_record->ucPCIEGenSpeed;
pcie_record->lane_width = atom_pcie_record->usPCIELaneWidth;
pcie_record->pcie_sclk = atom_pcie_record->ulPCIE_Sclk;
} }
*pp_tonga_pcie_table = pcie_table; *pp_tonga_pcie_table = pcie_table;
...@@ -685,6 +714,7 @@ static int get_mm_clock_voltage_table( ...@@ -685,6 +714,7 @@ static int get_mm_clock_voltage_table(
uint32_t table_size, i; uint32_t table_size, i;
const ATOM_Tonga_MM_Dependency_Record *mm_dependency_record; const ATOM_Tonga_MM_Dependency_Record *mm_dependency_record;
phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table; phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table;
phm_ppt_v1_mm_clock_voltage_dependency_record *mm_table_record;
PP_ASSERT_WITH_CODE((0 != mm_dependency_table->ucNumEntries), PP_ASSERT_WITH_CODE((0 != mm_dependency_table->ucNumEntries),
"Invalid PowerPlay Table!", return -1); "Invalid PowerPlay Table!", return -1);
...@@ -701,14 +731,19 @@ static int get_mm_clock_voltage_table( ...@@ -701,14 +731,19 @@ static int get_mm_clock_voltage_table(
mm_table->count = mm_dependency_table->ucNumEntries; mm_table->count = mm_dependency_table->ucNumEntries;
for (i = 0; i < mm_dependency_table->ucNumEntries; i++) { for (i = 0; i < mm_dependency_table->ucNumEntries; i++) {
mm_dependency_record = &mm_dependency_table->entries[i]; mm_dependency_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
mm_table->entries[i].vddcInd = mm_dependency_record->ucVddcInd; ATOM_Tonga_MM_Dependency_Record,
mm_table->entries[i].vddgfx_offset = mm_dependency_record->usVddgfxOffset; entries, mm_dependency_table, i);
mm_table->entries[i].aclk = mm_dependency_record->ulAClk; mm_table_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
mm_table->entries[i].samclock = mm_dependency_record->ulSAMUClk; phm_ppt_v1_mm_clock_voltage_dependency_record,
mm_table->entries[i].eclk = mm_dependency_record->ulEClk; entries, mm_table, i);
mm_table->entries[i].vclk = mm_dependency_record->ulVClk; mm_table_record->vddcInd = mm_dependency_record->ucVddcInd;
mm_table->entries[i].dclk = mm_dependency_record->ulDClk; mm_table_record->vddgfx_offset = mm_dependency_record->usVddgfxOffset;
mm_table_record->aclk = mm_dependency_record->ulAClk;
mm_table_record->samclock = mm_dependency_record->ulSAMUClk;
mm_table_record->eclk = mm_dependency_record->ulEClk;
mm_table_record->vclk = mm_dependency_record->ulVClk;
mm_table_record->dclk = mm_dependency_record->ulDClk;
} }
*tonga_mm_table = mm_table; *tonga_mm_table = mm_table;
...@@ -1176,11 +1211,13 @@ static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr) ...@@ -1176,11 +1211,13 @@ static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr)
return vce_state_table->ucNumEntries; return vce_state_table->ucNumEntries;
} }
static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i, static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i,
struct pp_vce_state *vce_state, void **clock_info, uint32_t *flag) struct pp_vce_state *vce_state, void **clock_info, uint32_t *flag)
{ {
const ATOM_Tonga_VCE_State_Record *vce_state_record; const ATOM_Tonga_VCE_State_Record *vce_state_record;
ATOM_Tonga_SCLK_Dependency_Record *sclk_dep_record;
ATOM_Tonga_MCLK_Dependency_Record *mclk_dep_record;
ATOM_Tonga_MM_Dependency_Record *mm_dep_record;
const ATOM_Tonga_POWERPLAYTABLE *pptable = get_powerplay_table(hwmgr); const ATOM_Tonga_POWERPLAYTABLE *pptable = get_powerplay_table(hwmgr);
const ATOM_Tonga_VCE_State_Table *vce_state_table = (ATOM_Tonga_VCE_State_Table *)(((unsigned long)pptable) const ATOM_Tonga_VCE_State_Table *vce_state_table = (ATOM_Tonga_VCE_State_Table *)(((unsigned long)pptable)
+ le16_to_cpu(pptable->usVCEStateTableOffset)); + le16_to_cpu(pptable->usVCEStateTableOffset));
...@@ -1195,20 +1232,35 @@ static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i ...@@ -1195,20 +1232,35 @@ static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i
"Requested state entry ID is out of range!", "Requested state entry ID is out of range!",
return -EINVAL); return -EINVAL);
vce_state_record = (ATOM_Tonga_VCE_State_Record *)((char *)&vce_state_table->entries[1] vce_state_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
+ (sizeof(ATOM_Tonga_VCE_State_Record) * i)); ATOM_Tonga_VCE_State_Record,
entries, vce_state_table, i);
sclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_SCLK_Dependency_Record,
entries, sclk_dep_table,
vce_state_record->ucSCLKIndex);
mm_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_MM_Dependency_Record,
entries, mm_dep_table,
vce_state_record->ucVCEClockIndex);
*flag = vce_state_record->ucFlag; *flag = vce_state_record->ucFlag;
vce_state->evclk = mm_dep_table->entries[vce_state_record->ucVCEClockIndex].ulEClk; vce_state->evclk = mm_dep_record->ulEClk;
vce_state->ecclk = mm_dep_table->entries[vce_state_record->ucVCEClockIndex].ulEClk; vce_state->ecclk = mm_dep_record->ulEClk;
vce_state->sclk = sclk_dep_table->entries[vce_state_record->ucSCLKIndex].ulSclk; vce_state->sclk = sclk_dep_record->ulSclk;
if (vce_state_record->ucMCLKIndex >= mclk_dep_table->ucNumEntries) if (vce_state_record->ucMCLKIndex >= mclk_dep_table->ucNumEntries)
vce_state->mclk = mclk_dep_table->entries[mclk_dep_table->ucNumEntries - 1].ulMclk; mclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_MCLK_Dependency_Record,
entries, mclk_dep_table,
mclk_dep_table->ucNumEntries - 1);
else else
vce_state->mclk = mclk_dep_table->entries[vce_state_record->ucMCLKIndex].ulMclk; mclk_dep_record = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_MCLK_Dependency_Record,
entries, mclk_dep_table,
vce_state_record->ucMCLKIndex);
vce_state->mclk = mclk_dep_record->ulMclk;
return 0; return 0;
} }
...@@ -1226,7 +1278,7 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr *hwmgr, ...@@ -1226,7 +1278,7 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr *hwmgr,
struct pp_power_state *, void *, uint32_t)) struct pp_power_state *, void *, uint32_t))
{ {
int result = 0; int result = 0;
const ATOM_Tonga_State_Array * state_arrays; const ATOM_Tonga_State_Array *state_arrays;
const ATOM_Tonga_State *state_entry; const ATOM_Tonga_State *state_entry;
const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr); const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr);
int i, j; int i, j;
...@@ -1247,7 +1299,9 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr *hwmgr, ...@@ -1247,7 +1299,9 @@ int tonga_get_powerplay_table_entry(struct pp_hwmgr *hwmgr,
PP_ASSERT_WITH_CODE((entry_index <= state_arrays->ucNumEntries), PP_ASSERT_WITH_CODE((entry_index <= state_arrays->ucNumEntries),
"Invalid PowerPlay Table State Array Entry.", return -1); "Invalid PowerPlay Table State Array Entry.", return -1);
state_entry = &(state_arrays->states[entry_index]); state_entry = GET_FLEXIBLE_ARRAY_MEMBER_ADDR(
ATOM_Tonga_State, entries,
state_arrays, entry_index);
result = call_back_func(hwmgr, (void *)state_entry, power_state, result = call_back_func(hwmgr, (void *)state_entry, power_state,
(void *)pp_table, (void *)pp_table,
......
...@@ -43,5 +43,8 @@ ...@@ -43,5 +43,8 @@
} while (0) } while (0)
#define GET_FLEXIBLE_ARRAY_MEMBER_ADDR(type, member, ptr, n) \
(type *)((char *)&(ptr)->member + (sizeof(type) * (n)))
#endif /* PP_DEBUG_H */ #endif /* PP_DEBUG_H */
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