Commit 51c00a9f authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: r8a7745: Remove unit-address and reg from integrated cache

The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: c9536024 ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 37f0c804
...@@ -32,9 +32,8 @@ cpu0: cpu@0 { ...@@ -32,9 +32,8 @@ cpu0: cpu@0 {
next-level-cache = <&L2_CA7>; next-level-cache = <&L2_CA7>;
}; };
L2_CA7: cache-controller@0 { L2_CA7: cache-controller-0 {
compatible = "cache"; compatible = "cache";
reg = <0>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
power-domains = <&sysc R8A7745_PD_CA7_SCU>; power-domains = <&sysc R8A7745_PD_CA7_SCU>;
......
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