Commit 52dffd7f authored by Poonam Aggrwal's avatar Poonam Aggrwal Committed by Kumar Gala

powerpc/85xx: Added P1020RDB Platform support.

P1020 is another member of Freescale QorIQ series of processors.
It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences from P2020:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities(new controller).

From board perspective P1020RDB is same as P2020RDB.
Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 46d22934
This diff is collapsed.
...@@ -121,6 +121,7 @@ static int __init mpc85xxrdb_publish_devices(void) ...@@ -121,6 +121,7 @@ static int __init mpc85xxrdb_publish_devices(void)
return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL); return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL);
} }
machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices); machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xxrdb_publish_devices);
/* /*
* Called very early, device-tree isn't unflattened * Called very early, device-tree isn't unflattened
...@@ -134,6 +135,15 @@ static int __init p2020_rdb_probe(void) ...@@ -134,6 +135,15 @@ static int __init p2020_rdb_probe(void)
return 0; return 0;
} }
static int __init p1020_rdb_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
return 1;
return 0;
}
define_machine(p2020_rdb) { define_machine(p2020_rdb) {
.name = "P2020 RDB", .name = "P2020 RDB",
.probe = p2020_rdb_probe, .probe = p2020_rdb_probe,
...@@ -147,3 +157,17 @@ define_machine(p2020_rdb) { ...@@ -147,3 +157,17 @@ define_machine(p2020_rdb) {
.calibrate_decr = generic_calibrate_decr, .calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress, .progress = udbg_progress,
}; };
define_machine(p1020_rdb) {
.name = "P1020 RDB",
.probe = p1020_rdb_probe,
.setup_arch = mpc85xx_rdb_setup_arch,
.init_IRQ = mpc85xx_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
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