Commit 54f0ec0a authored by Russell King's avatar Russell King Committed by Gregory CLEMENT

ARM: dts: armada388-clearfog: move second PCIe port

Move the second PCIe port to the clearfog .dts file as this is only
present on the pro models.
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent d5bd6335
...@@ -54,6 +54,23 @@ / { ...@@ -54,6 +54,23 @@ / {
compatible = "solidrun,clearfog-a1", "marvell,armada388", compatible = "solidrun,clearfog-a1", "marvell,armada388",
"marvell,armada385", "marvell,armada380"; "marvell,armada385", "marvell,armada380";
soc {
internal-regs {
usb3@f0000 {
/* CON2, nearest CPU, USB2 only. */
status = "okay";
};
};
pcie-controller {
pcie@3,0 {
/* Port 2, Lane 0. CON2, nearest CPU. */
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
dsa@0 { dsa@0 {
compatible = "marvell,dsa"; compatible = "marvell,dsa";
dsa,ethernet = <&eth1>; dsa,ethernet = <&eth1>;
...@@ -119,6 +136,40 @@ fixed-link { ...@@ -119,6 +136,40 @@ fixed-link {
}; };
}; };
&expander0 {
/*
* PCA9655 GPIO expander:
* 0-CON3 CLKREQ#
* 1-CON3 PERST#
* 2-CON2 PERST#
* 3-CON3 W_DISABLE
* 4-CON2 CLKREQ#
* 5-USB3 overcurrent
* 6-USB3 power
* 7-CON2 W_DISABLE
* 8-JP4 P1
* 9-JP4 P4
* 10-JP4 P5
* 11-m.2 DEVSLP
* 12-SFP_LOS
* 13-SFP_TX_FAULT
* 14-SFP_TX_DISABLE
* 15-SFP_MOD_DEF0
*/
pcie2_0_clkreq {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie2.0-clkreq";
};
pcie2_0_w_disable {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pcie2.0-w-disable";
};
};
&pinctrl { &pinctrl {
clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
marvell,pins = "mpp46"; marvell,pins = "mpp46";
......
...@@ -103,12 +103,12 @@ i2c@11000 { ...@@ -103,12 +103,12 @@ i2c@11000 {
* PCA9655 GPIO expander, up to 1MHz clock. * PCA9655 GPIO expander, up to 1MHz clock.
* 0-CON3 CLKREQ# * 0-CON3 CLKREQ#
* 1-CON3 PERST# * 1-CON3 PERST#
* 2-CON2 PERST# * 2-
* 3-CON3 W_DISABLE * 3-CON3 W_DISABLE
* 4-CON2 CLKREQ# * 4-
* 5-USB3 overcurrent * 5-USB3 overcurrent
* 6-USB3 power * 6-USB3 power
* 7-CON2 W_DISABLE * 7-
* 8-JP4 P1 * 8-JP4 P1
* 9-JP4 P4 * 9-JP4 P4
* 10-JP4 P5 * 10-JP4 P5
...@@ -143,18 +143,6 @@ pcie1_0_w_disable { ...@@ -143,18 +143,6 @@ pcie1_0_w_disable {
output-low; output-low;
line-name = "pcie1.0-w-disable"; line-name = "pcie1.0-w-disable";
}; };
pcie2_0_clkreq {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie2.0-clkreq";
};
pcie2_0_w_disable {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pcie2.0-w-disable";
};
usb3_ilimit { usb3_ilimit {
gpio-hog; gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>; gpios = <5 GPIO_ACTIVE_LOW>;
...@@ -296,11 +284,6 @@ usb@58000 { ...@@ -296,11 +284,6 @@ usb@58000 {
status = "okay"; status = "okay";
}; };
usb3@f0000 {
/* CON2, nearest CPU, USB2 only. */
status = "okay";
};
usb3@f8000 { usb3@f8000 {
/* CON7 */ /* CON7 */
status = "okay"; status = "okay";
...@@ -318,11 +301,6 @@ pcie@2,0 { ...@@ -318,11 +301,6 @@ pcie@2,0 {
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
pcie@3,0 {
/* Port 2, Lane 0. CON2, nearest CPU. */
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
}; };
}; };
......
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