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Commit 5630b433 authored by Andrew F. Davis's avatar Andrew F. Davis Committed by Sebastian Reichel
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power_supply: bq27xxx_battery: Index register numbers by enum 

Currently we use tables to map from register function to register number,
these tables assume the enum used to describe the register function
and index the register number is ordered to match the enum order. Index
the register numbers by the enum instead. This also removes the need
to comment each value with its function.
Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
Signed-off-by: default avatarSebastian Reichel <sre@kernel.org>
parent 5d9e01b3
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Showing with 119 additions and 119 deletions
drivers/power/bq27xxx_battery.c
View file @ 5630b433
...@@ -104,143 +104,143 @@ enum bq27xxx_reg_index { ...@@ -104,143 +104,143 @@ enum bq27xxx_reg_index {
/* Register mappings */ /* Register mappings */
static u8 bq27000_regs[] = { static u8 bq27000_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
INVALID_REG_ADDR, /* INT TEMP - NA*/ [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
0x18, /* TTF */ [BQ27XXX_REG_TTF] = 0x18,
0x1c, /* TTES */ [BQ27XXX_REG_TTES] = 0x1c,
0x26, /* TTECP */ [BQ27XXX_REG_TTECP] = 0x26,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
0x22, /* AE */ [BQ27XXX_REG_AE] = 0x22,
0x0b, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x0b,
0x76, /* DCAP(ILMD) */ [BQ27XXX_REG_DCAP] = 0x76,
0x24, /* AP */ [BQ27XXX_REG_AP] = 0x24,
}; };
static u8 bq27010_regs[] = { static u8 bq27010_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
INVALID_REG_ADDR, /* INT TEMP - NA*/ [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
0x18, /* TTF */ [BQ27XXX_REG_TTF] = 0x18,
0x1c, /* TTES */ [BQ27XXX_REG_TTES] = 0x1c,
0x26, /* TTECP */ [BQ27XXX_REG_TTECP] = 0x26,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x0b, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x0b,
0x76, /* DCAP(ILMD) */ [BQ27XXX_REG_DCAP] = 0x76,
INVALID_REG_ADDR, /* AP - NA */ [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
}; };
static u8 bq27500_regs[] = { static u8 bq27500_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
0x28, /* INT TEMP */ [BQ27XXX_REG_INT_TEMP] = 0x28,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
INVALID_REG_ADDR, /* TTF - NA */ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
0x1a, /* TTES */ [BQ27XXX_REG_TTES] = 0x1a,
INVALID_REG_ADDR, /* TTECP - NA */ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x2c, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x2c,
0x3c, /* DCAP(ILMD) */ [BQ27XXX_REG_DCAP] = 0x3c,
INVALID_REG_ADDR, /* AP - NA */ [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
}; };
static u8 bq27530_regs[] = { static u8 bq27530_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
0x32, /* INT TEMP */ [BQ27XXX_REG_INT_TEMP] = 0x32,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
INVALID_REG_ADDR, /* TTF - NA */ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTES - NA */ [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTECP - NA */ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x2c, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x2c,
INVALID_REG_ADDR, /* DCAP - NA */ [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
0x24, /* AP */ [BQ27XXX_REG_AP] = 0x24,
}; };
static u8 bq27541_regs[] = { static u8 bq27541_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
0x28, /* INT TEMP */ [BQ27XXX_REG_INT_TEMP] = 0x28,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
INVALID_REG_ADDR, /* TTF - NA */ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTES - NA */ [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTECP - NA */ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x2c, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x2c,
0x3c, /* DCAP */ [BQ27XXX_REG_DCAP] = 0x3c,
0x24, /* AP */ [BQ27XXX_REG_AP] = 0x24,
}; };
static u8 bq27545_regs[] = { static u8 bq27545_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x06, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x06,
0x28, /* INT TEMP */ [BQ27XXX_REG_INT_TEMP] = 0x28,
0x08, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x08,
0x14, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x14,
0x0a, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x0a,
0x16, /* TTE */ [BQ27XXX_REG_TTE] = 0x16,
INVALID_REG_ADDR, /* TTF - NA */ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTES - NA */ [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTECP - NA */ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
0x0c, /* NAC */ [BQ27XXX_REG_NAC] = 0x0c,
0x12, /* LMD(FCC) */ [BQ27XXX_REG_FCC] = 0x12,
0x2a, /* CYCT */ [BQ27XXX_REG_CYCT] = 0x2a,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x2c, /* SOC(RSOC) */ [BQ27XXX_REG_SOC] = 0x2c,
INVALID_REG_ADDR, /* DCAP - NA */ [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
0x24, /* AP */ [BQ27XXX_REG_AP] = 0x24,
}; };
static u8 bq27421_regs[] = { static u8 bq27421_regs[] = {
0x00, /* CONTROL */ [BQ27XXX_REG_CTRL] = 0x00,
0x02, /* TEMP */ [BQ27XXX_REG_TEMP] = 0x02,
0x1e, /* INT TEMP */ [BQ27XXX_REG_INT_TEMP] = 0x1e,
0x04, /* VOLT */ [BQ27XXX_REG_VOLT] = 0x04,
0x10, /* AVG CURR */ [BQ27XXX_REG_AI] = 0x10,
0x06, /* FLAGS */ [BQ27XXX_REG_FLAGS] = 0x06,
INVALID_REG_ADDR, /* TTE - NA */ [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTF - NA */ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTES - NA */ [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* TTECP - NA */ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
0x08, /* NAC */ [BQ27XXX_REG_NAC] = 0x08,
0x0e, /* FCC */ [BQ27XXX_REG_FCC] = 0x0e,
INVALID_REG_ADDR, /* CYCT - NA */ [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
INVALID_REG_ADDR, /* AE - NA */ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
0x1c, /* SOC */ [BQ27XXX_REG_SOC] = 0x1c,
0x3c, /* DCAP */ [BQ27XXX_REG_DCAP] = 0x3c,
0x18, /* AP */ [BQ27XXX_REG_AP] = 0x18,
}; };
static u8 *bq27xxx_regs[] = { static u8 *bq27xxx_regs[] = {
......
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