Commit 567e4793 authored by Linus Torvalds's avatar Linus Torvalds

Merge branches 'sched-urgent-for-linus', 'perf-urgent-for-linus' and...

Merge branches 'sched-urgent-for-linus', 'perf-urgent-for-linus' and 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/accounting, proc: Fix /proc/stat interrupts sum

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tracepoints/module: Fix disabling tracepoints with taint CRAP or OOT
  x86/kprobes: Add arch/x86/tools/insn_sanity to .gitignore
  x86/kprobes: Fix typo transferred from Intel manual

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, syscall: Need __ARCH_WANT_SYS_IPC for 32 bits
  x86, tsc: Fix SMI induced variation in quick_pit_calibrate()
  x86, opcode: ANDN and Group 17 in x86-opcode-map.txt
  x86/kconfig: Move the ZONE_DMA entry under a menu
  x86/UV2: Add accounting for BAU strong nacks
  x86/UV2: Ack BAU interrupt earlier
  x86/UV2: Remove stale no-resources test for UV2 BAU
  x86/UV2: Work around BAU bug
  x86/UV2: Fix BAU destination timeout initialization
  x86/UV2: Fix new UV2 hardware by using native UV2 broadcast mode
  x86: Get rid of dubious one-bit signed bitfield
boot/compressed/vmlinux boot/compressed/vmlinux
tools/test_get_len tools/test_get_len
tools/insn_sanity
...@@ -125,16 +125,6 @@ config HAVE_LATENCYTOP_SUPPORT ...@@ -125,16 +125,6 @@ config HAVE_LATENCYTOP_SUPPORT
config MMU config MMU
def_bool y def_bool y
config ZONE_DMA
bool "DMA memory allocation support" if EXPERT
default y
help
DMA memory allocation support allows devices with less than 32-bit
addressing to allocate within the first 16MB of address space.
Disable if no such devices will be used.
If unsure, say Y.
config SBUS config SBUS
bool bool
...@@ -255,6 +245,16 @@ source "kernel/Kconfig.freezer" ...@@ -255,6 +245,16 @@ source "kernel/Kconfig.freezer"
menu "Processor type and features" menu "Processor type and features"
config ZONE_DMA
bool "DMA memory allocation support" if EXPERT
default y
help
DMA memory allocation support allows devices with less than 32-bit
addressing to allocate within the first 16MB of address space.
Disable if no such devices will be used.
If unsure, say Y.
source "kernel/time/Kconfig" source "kernel/time/Kconfig"
config SMP config SMP
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
# include <asm/unistd_32.h> # include <asm/unistd_32.h>
# define __ARCH_WANT_IPC_PARSE_VERSION # define __ARCH_WANT_IPC_PARSE_VERSION
# define __ARCH_WANT_STAT64 # define __ARCH_WANT_STAT64
# define __ARCH_WANT_SYS_IPC
# define __ARCH_WANT_SYS_OLD_MMAP # define __ARCH_WANT_SYS_OLD_MMAP
# define __ARCH_WANT_SYS_OLD_SELECT # define __ARCH_WANT_SYS_OLD_SELECT
......
...@@ -65,7 +65,7 @@ ...@@ -65,7 +65,7 @@
* UV2: Bit 19 selects between * UV2: Bit 19 selects between
* (0): 10 microsecond timebase and * (0): 10 microsecond timebase and
* (1): 80 microseconds * (1): 80 microseconds
* we're using 655us, similar to UV1: 65 units of 10us * we're using 560us, similar to UV1: 65 units of 10us
*/ */
#define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL) #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL) #define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)
...@@ -167,6 +167,7 @@ ...@@ -167,6 +167,7 @@
#define FLUSH_RETRY_TIMEOUT 2 #define FLUSH_RETRY_TIMEOUT 2
#define FLUSH_GIVEUP 3 #define FLUSH_GIVEUP 3
#define FLUSH_COMPLETE 4 #define FLUSH_COMPLETE 4
#define FLUSH_RETRY_BUSYBUG 5
/* /*
* tuning the action when the numalink network is extremely delayed * tuning the action when the numalink network is extremely delayed
...@@ -235,10 +236,10 @@ struct bau_msg_payload { ...@@ -235,10 +236,10 @@ struct bau_msg_payload {
/* /*
* Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor) * UV1 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
* see table 4.2.3.0.1 in broacast_assist spec. * see table 4.2.3.0.1 in broacast_assist spec.
*/ */
struct bau_msg_header { struct uv1_bau_msg_header {
unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
/* bits 5:0 */ /* bits 5:0 */
unsigned int base_dest_nasid:15; /* nasid of the first bit */ unsigned int base_dest_nasid:15; /* nasid of the first bit */
...@@ -317,6 +318,70 @@ struct bau_msg_header { ...@@ -317,6 +318,70 @@ struct bau_msg_header {
/* bits 127:107 */ /* bits 127:107 */
}; };
/*
* UV2 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
* see figure 9-2 of harp_sys.pdf
*/
struct uv2_bau_msg_header {
unsigned int base_dest_nasid:15; /* nasid of the first bit */
/* bits 14:0 */ /* in uvhub map */
unsigned int dest_subnodeid:5; /* must be 0x10, for the LB */
/* bits 19:15 */
unsigned int rsvd_1:1; /* must be zero */
/* bit 20 */
/* Address bits 59:21 */
/* bits 25:2 of address (44:21) are payload */
/* these next 24 bits become bytes 12-14 of msg */
/* bits 28:21 land in byte 12 */
unsigned int replied_to:1; /* sent as 0 by the source to
byte 12 */
/* bit 21 */
unsigned int msg_type:3; /* software type of the
message */
/* bits 24:22 */
unsigned int canceled:1; /* message canceled, resource
is to be freed*/
/* bit 25 */
unsigned int payload_1:3; /* not currently used */
/* bits 28:26 */
/* bits 36:29 land in byte 13 */
unsigned int payload_2a:3; /* not currently used */
unsigned int payload_2b:5; /* not currently used */
/* bits 36:29 */
/* bits 44:37 land in byte 14 */
unsigned int payload_3:8; /* not currently used */
/* bits 44:37 */
unsigned int rsvd_2:7; /* reserved */
/* bits 51:45 */
unsigned int swack_flag:1; /* software acknowledge flag */
/* bit 52 */
unsigned int rsvd_3a:3; /* must be zero */
unsigned int rsvd_3b:8; /* must be zero */
unsigned int rsvd_3c:8; /* must be zero */
unsigned int rsvd_3d:3; /* must be zero */
/* bits 74:53 */
unsigned int fairness:3; /* usually zero */
/* bits 77:75 */
unsigned int sequence:16; /* message sequence number */
/* bits 93:78 Suppl_A */
unsigned int chaining:1; /* next descriptor is part of
this activation*/
/* bit 94 */
unsigned int multilevel:1; /* multi-level multicast
format */
/* bit 95 */
unsigned int rsvd_4:24; /* ordered / source node /
source subnode / aging
must be zero */
/* bits 119:96 */
unsigned int command:8; /* message type */
/* bits 127:120 */
};
/* /*
* The activation descriptor: * The activation descriptor:
* The format of the message to send, plus all accompanying control * The format of the message to send, plus all accompanying control
...@@ -327,10 +392,14 @@ struct bau_desc { ...@@ -327,10 +392,14 @@ struct bau_desc {
/* /*
* message template, consisting of header and payload: * message template, consisting of header and payload:
*/ */
struct bau_msg_header header; union bau_msg_header {
struct uv1_bau_msg_header uv1_hdr;
struct uv2_bau_msg_header uv2_hdr;
} header;
struct bau_msg_payload payload; struct bau_msg_payload payload;
}; };
/* /* UV1:
* -payload-- ---------header------ * -payload-- ---------header------
* bytes 0-11 bits 41-56 bits 58-81 * bytes 0-11 bits 41-56 bits 58-81
* A B (2) C (3) * A B (2) C (3)
...@@ -340,6 +409,16 @@ struct bau_desc { ...@@ -340,6 +409,16 @@ struct bau_desc {
* bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector) * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
* ------------payload queue----------- * ------------payload queue-----------
*/ */
/* UV2:
* -payload-- ---------header------
* bytes 0-11 bits 70-78 bits 21-44
* A B (2) C (3)
*
* A/B/C are moved to:
* A C B
* bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
* ------------payload queue-----------
*/
/* /*
* The payload queue on the destination side is an array of these. * The payload queue on the destination side is an array of these.
...@@ -385,7 +464,6 @@ struct bau_pq_entry { ...@@ -385,7 +464,6 @@ struct bau_pq_entry {
struct msg_desc { struct msg_desc {
struct bau_pq_entry *msg; struct bau_pq_entry *msg;
int msg_slot; int msg_slot;
int swack_slot;
struct bau_pq_entry *queue_first; struct bau_pq_entry *queue_first;
struct bau_pq_entry *queue_last; struct bau_pq_entry *queue_last;
}; };
...@@ -405,6 +483,7 @@ struct ptc_stats { ...@@ -405,6 +483,7 @@ struct ptc_stats {
requests */ requests */
unsigned long s_stimeout; /* source side timeouts */ unsigned long s_stimeout; /* source side timeouts */
unsigned long s_dtimeout; /* destination side timeouts */ unsigned long s_dtimeout; /* destination side timeouts */
unsigned long s_strongnacks; /* number of strong nack's */
unsigned long s_time; /* time spent in sending side */ unsigned long s_time; /* time spent in sending side */
unsigned long s_retriesok; /* successful retries */ unsigned long s_retriesok; /* successful retries */
unsigned long s_ntargcpu; /* total number of cpu's unsigned long s_ntargcpu; /* total number of cpu's
...@@ -439,6 +518,9 @@ struct ptc_stats { ...@@ -439,6 +518,9 @@ struct ptc_stats {
unsigned long s_retry_messages; /* retry broadcasts */ unsigned long s_retry_messages; /* retry broadcasts */
unsigned long s_bau_reenabled; /* for bau enable/disable */ unsigned long s_bau_reenabled; /* for bau enable/disable */
unsigned long s_bau_disabled; /* for bau enable/disable */ unsigned long s_bau_disabled; /* for bau enable/disable */
unsigned long s_uv2_wars; /* uv2 workaround, perm. busy */
unsigned long s_uv2_wars_hw; /* uv2 workaround, hiwater */
unsigned long s_uv2_war_waits; /* uv2 workaround, long waits */
/* destination statistics */ /* destination statistics */
unsigned long d_alltlb; /* times all tlb's on this unsigned long d_alltlb; /* times all tlb's on this
cpu were flushed */ cpu were flushed */
...@@ -511,9 +593,12 @@ struct bau_control { ...@@ -511,9 +593,12 @@ struct bau_control {
short osnode; short osnode;
short uvhub_cpu; short uvhub_cpu;
short uvhub; short uvhub;
short uvhub_version;
short cpus_in_socket; short cpus_in_socket;
short cpus_in_uvhub; short cpus_in_uvhub;
short partition_base_pnode; short partition_base_pnode;
short using_desc; /* an index, like uvhub_cpu */
unsigned int inuse_map;
unsigned short message_number; unsigned short message_number;
unsigned short uvhub_quiesce; unsigned short uvhub_quiesce;
short socket_acknowledge_count[DEST_Q_SIZE]; short socket_acknowledge_count[DEST_Q_SIZE];
...@@ -531,6 +616,7 @@ struct bau_control { ...@@ -531,6 +616,7 @@ struct bau_control {
int cong_response_us; int cong_response_us;
int cong_reps; int cong_reps;
int cong_period; int cong_period;
unsigned long clocks_per_100_usec;
cycles_t period_time; cycles_t period_time;
long period_requests; long period_requests;
struct hub_and_pnode *thp; struct hub_and_pnode *thp;
...@@ -591,6 +677,11 @@ static inline void write_mmr_sw_ack(unsigned long mr) ...@@ -591,6 +677,11 @@ static inline void write_mmr_sw_ack(unsigned long mr)
uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr); uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
} }
static inline void write_gmmr_sw_ack(int pnode, unsigned long mr)
{
write_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
}
static inline unsigned long read_mmr_sw_ack(void) static inline unsigned long read_mmr_sw_ack(void)
{ {
return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE); return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
......
...@@ -290,14 +290,15 @@ static inline int pit_verify_msb(unsigned char val) ...@@ -290,14 +290,15 @@ static inline int pit_verify_msb(unsigned char val)
static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap) static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
{ {
int count; int count;
u64 tsc = 0; u64 tsc = 0, prev_tsc = 0;
for (count = 0; count < 50000; count++) { for (count = 0; count < 50000; count++) {
if (!pit_verify_msb(val)) if (!pit_verify_msb(val))
break; break;
prev_tsc = tsc;
tsc = get_cycles(); tsc = get_cycles();
} }
*deltap = get_cycles() - tsc; *deltap = get_cycles() - prev_tsc;
*tscp = tsc; *tscp = tsc;
/* /*
...@@ -311,9 +312,9 @@ static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *de ...@@ -311,9 +312,9 @@ static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *de
* How many MSB values do we want to see? We aim for * How many MSB values do we want to see? We aim for
* a maximum error rate of 500ppm (in practice the * a maximum error rate of 500ppm (in practice the
* real error is much smaller), but refuse to spend * real error is much smaller), but refuse to spend
* more than 25ms on it. * more than 50ms on it.
*/ */
#define MAX_QUICK_PIT_MS 25 #define MAX_QUICK_PIT_MS 50
#define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) #define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
static unsigned long quick_pit_calibrate(void) static unsigned long quick_pit_calibrate(void)
...@@ -383,15 +384,12 @@ static unsigned long quick_pit_calibrate(void) ...@@ -383,15 +384,12 @@ static unsigned long quick_pit_calibrate(void)
* *
* As a result, we can depend on there not being * As a result, we can depend on there not being
* any odd delays anywhere, and the TSC reads are * any odd delays anywhere, and the TSC reads are
* reliable (within the error). We also adjust the * reliable (within the error).
* delta to the middle of the error bars, just
* because it looks nicer.
* *
* kHz = ticks / time-in-seconds / 1000; * kHz = ticks / time-in-seconds / 1000;
* kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000 * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000
* kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000) * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)
*/ */
delta += (long)(d2 - d1)/2;
delta *= PIT_TICK_RATE; delta *= PIT_TICK_RATE;
do_div(delta, i*256*1000); do_div(delta, i*256*1000);
printk("Fast TSC calibration using PIT\n"); printk("Fast TSC calibration using PIT\n");
......
...@@ -219,7 +219,9 @@ ab: STOS/W/D/Q Yv,rAX ...@@ -219,7 +219,9 @@ ab: STOS/W/D/Q Yv,rAX
ac: LODS/B AL,Xb ac: LODS/B AL,Xb
ad: LODS/W/D/Q rAX,Xv ad: LODS/W/D/Q rAX,Xv
ae: SCAS/B AL,Yb ae: SCAS/B AL,Yb
af: SCAS/W/D/Q rAX,Xv # Note: The May 2011 Intel manual shows Xv for the second parameter of the
# next instruction but Yv is correct
af: SCAS/W/D/Q rAX,Yv
# 0xb0 - 0xbf # 0xb0 - 0xbf
b0: MOV AL/R8L,Ib b0: MOV AL/R8L,Ib
b1: MOV CL/R9L,Ib b1: MOV CL/R9L,Ib
...@@ -729,8 +731,8 @@ de: VAESDEC Vdq,Hdq,Wdq (66),(v1) ...@@ -729,8 +731,8 @@ de: VAESDEC Vdq,Hdq,Wdq (66),(v1)
df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1) df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1)
f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2)
f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2)
f3: ANDN Gy,By,Ey (v) f2: ANDN Gy,By,Ey (v)
f4: Grp17 (1A) f3: Grp17 (1A)
f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
f6: MULX By,Gy,rDX,Ey (F2),(v) f6: MULX By,Gy,rDX,Ey (F2),(v)
f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
......
This diff is collapsed.
...@@ -77,6 +77,8 @@ static int show_stat(struct seq_file *p, void *v) ...@@ -77,6 +77,8 @@ static int show_stat(struct seq_file *p, void *v)
steal += kcpustat_cpu(i).cpustat[CPUTIME_STEAL]; steal += kcpustat_cpu(i).cpustat[CPUTIME_STEAL];
guest += kcpustat_cpu(i).cpustat[CPUTIME_GUEST]; guest += kcpustat_cpu(i).cpustat[CPUTIME_GUEST];
guest_nice += kcpustat_cpu(i).cpustat[CPUTIME_GUEST_NICE]; guest_nice += kcpustat_cpu(i).cpustat[CPUTIME_GUEST_NICE];
sum += kstat_cpu_irqs_sum(i);
sum += arch_irq_stat_cpu(i);
for (j = 0; j < NR_SOFTIRQS; j++) { for (j = 0; j < NR_SOFTIRQS; j++) {
unsigned int softirq_stat = kstat_softirqs_cpu(j, i); unsigned int softirq_stat = kstat_softirqs_cpu(j, i);
......
...@@ -634,10 +634,11 @@ static int tracepoint_module_coming(struct module *mod) ...@@ -634,10 +634,11 @@ static int tracepoint_module_coming(struct module *mod)
int ret = 0; int ret = 0;
/* /*
* We skip modules that tain the kernel, especially those with different * We skip modules that taint the kernel, especially those with different
* module header (for forced load), to make sure we don't cause a crash. * module headers (for forced load), to make sure we don't cause a crash.
* Staging and out-of-tree GPL modules are fine.
*/ */
if (mod->taints) if (mod->taints & ~((1 << TAINT_OOT_MODULE) | (1 << TAINT_CRAP)))
return 0; return 0;
mutex_lock(&tracepoints_mutex); mutex_lock(&tracepoints_mutex);
tp_mod = kmalloc(sizeof(struct tp_module), GFP_KERNEL); tp_mod = kmalloc(sizeof(struct tp_module), GFP_KERNEL);
......
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