Commit 568cf2e6 authored by Dave Airlie's avatar Dave Airlie

Merge tag 'drm-amdkfd-next-2018-05-28' of git://people.freedesktop.org/~gabbayo/linux into drm-next

- Build amdkfd's related files inside amdgpu only if amdkfd is built
- Fix compile warning
- Print info message in case ASIC is not supported by amdkfd
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180528110435.GA17960@odedg-x270
parents 74860cbf ebe1d22b
...@@ -56,8 +56,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ ...@@ -56,8 +56,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
# add asic specific block # add asic specific block
amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o \ ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o
amdgpu_amdkfd_gfx_v7.o
amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o
...@@ -132,13 +131,21 @@ amdgpu-y += \ ...@@ -132,13 +131,21 @@ amdgpu-y += \
vcn_v1_0.o vcn_v1_0.o
# add amdkfd interfaces # add amdkfd interfaces
amdgpu-y += amdgpu_amdkfd.o
ifneq ($(CONFIG_HSA_AMD),)
amdgpu-y += \ amdgpu-y += \
amdgpu_amdkfd.o \
amdgpu_amdkfd_fence.o \ amdgpu_amdkfd_fence.o \
amdgpu_amdkfd_gpuvm.o \ amdgpu_amdkfd_gpuvm.o \
amdgpu_amdkfd_gfx_v8.o \ amdgpu_amdkfd_gfx_v8.o \
amdgpu_amdkfd_gfx_v9.o amdgpu_amdkfd_gfx_v9.o
ifneq ($(CONFIG_DRM_AMDGPU_CIK),)
amdgpu-y += amdgpu_amdkfd_gfx_v7.o
endif
endif
# add cgs # add cgs
amdgpu-y += amdgpu_cgs.o amdgpu-y += amdgpu_cgs.o
......
...@@ -50,15 +50,21 @@ int amdgpu_amdkfd_init(void) ...@@ -50,15 +50,21 @@ int amdgpu_amdkfd_init(void)
kgd2kfd = NULL; kgd2kfd = NULL;
} }
#elif defined(CONFIG_HSA_AMD) #elif defined(CONFIG_HSA_AMD)
ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd); ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
if (ret) if (ret)
kgd2kfd = NULL; kgd2kfd = NULL;
#else #else
kgd2kfd = NULL;
ret = -ENOENT; ret = -ENOENT;
#endif #endif
#if defined(CONFIG_HSA_AMD_MODULE) || defined(CONFIG_HSA_AMD)
amdgpu_amdkfd_gpuvm_init_mem_limits(); amdgpu_amdkfd_gpuvm_init_mem_limits();
#endif
return ret; return ret;
} }
...@@ -97,7 +103,7 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) ...@@ -97,7 +103,7 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)
kfd2kgd = amdgpu_amdkfd_gfx_9_0_get_functions(); kfd2kgd = amdgpu_amdkfd_gfx_9_0_get_functions();
break; break;
default: default:
dev_dbg(adev->dev, "kfd not supported on this ASIC\n"); dev_info(adev->dev, "kfd not supported on this ASIC\n");
return; return;
} }
...@@ -464,3 +470,44 @@ bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid) ...@@ -464,3 +470,44 @@ bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
return false; return false;
} }
#if !defined(CONFIG_HSA_AMD_MODULE) && !defined(CONFIG_HSA_AMD)
bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
{
return false;
}
void amdgpu_amdkfd_unreserve_system_memory_limit(struct amdgpu_bo *bo)
{
}
void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
struct amdgpu_vm *vm)
{
}
struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
{
return NULL;
}
int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)
{
return 0;
}
struct kfd2kgd_calls *amdgpu_amdkfd_gfx_7_get_functions(void)
{
return NULL;
}
struct kfd2kgd_calls *amdgpu_amdkfd_gfx_8_0_get_functions(void)
{
return NULL;
}
struct kfd2kgd_calls *amdgpu_amdkfd_gfx_9_0_get_functions(void)
{
return NULL;
}
#endif
...@@ -470,9 +470,9 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, ...@@ -470,9 +470,9 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI), WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI),
upper_32_bits(guessed_wptr)); upper_32_bits(guessed_wptr));
WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),
lower_32_bits((uint64_t)wptr)); lower_32_bits((uintptr_t)wptr));
WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI), WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
upper_32_bits((uint64_t)wptr)); upper_32_bits((uintptr_t)wptr));
WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1), WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1),
get_queue_mask(adev, pipe_id, queue_id)); get_queue_mask(adev, pipe_id, queue_id));
} }
......
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