Commit 56c05de6 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Extend Haswell GT1 PSMI workaround to all

A few times in CI, we have detected a GPU hang on our Haswell GT2
systems with the characteristic IPEHR of 0x780c0000. When the PSMI w/a
was first introducted, it was applied to all Haswell, but later on we
found an erratum that supposedly restricted the issue to GT1 and so
constrained it only be applied on GT1. That may have been a mistake...

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111692
Fixes: 167bc759 ("drm/i915: Restrict PSMI context load w/a to Haswell GT1")
References: 2c550183 ("drm/i915: Disable PSMI sleep messages on all rings around context switches")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190917194746.26710-1-chris@chris-wilson.co.uk
parent 8698ba53
...@@ -1574,7 +1574,7 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags) ...@@ -1574,7 +1574,7 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
struct intel_engine_cs *engine = rq->engine; struct intel_engine_cs *engine = rq->engine;
enum intel_engine_id id; enum intel_engine_id id;
const int num_engines = const int num_engines =
IS_HSW_GT1(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0; IS_HASWELL(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0;
bool force_restore = false; bool force_restore = false;
int len; int len;
u32 *cs; u32 *cs;
......
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