Commit 56d52bfb authored by Tomasz Figa's avatar Tomasz Figa Committed by Kukjin Kim

ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12

All SoCs from Exynos4x12 series contain the MSHC block, so its node can
be located in exynos4x12.dtsi. In addition, missing clock specifiers
are added, generic SoC attributes are moved from board dts files
to common dtsi file of SoC family and the node is renamed to a more
generic name to follow node naming recommendations.
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 14cd5714
......@@ -38,9 +38,7 @@ led2 {
};
};
mshc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
mmc@12550000 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
vmmc-supply = <&ldo20_reg &buck8_reg>;
......@@ -49,7 +47,6 @@ mshc@12550000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
......
......@@ -122,9 +122,7 @@ sdhci@12530000 {
status = "okay";
};
mshc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
mmc@12550000 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
......@@ -132,7 +130,6 @@ mshc@12550000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
......
......@@ -61,13 +61,4 @@ mct_map: mct-map {
};
};
mshc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 301>, <&clock 149>;
clock-name = "biu", "ciu";
};
};
......@@ -28,6 +28,7 @@ aliases {
pinctrl3 = &pinctrl_3;
fimc-lite0 = &fimc_lite_0;
fimc-lite1 = &fimc_lite_1;
mshc0 = &mshc_0;
};
pd_isp: isp-power-domain@10023CA0 {
......@@ -176,4 +177,16 @@ i2c1_isp: i2c-isp@12140000 {
};
};
};
mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <0x80>;
clocks = <&clock 301>, <&clock 149>;
clock-names = "biu", "ciu";
status = "disabled";
};
};
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