Commit 5765040e authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'x86-smep-for-linus' of...

Merge branch 'x86-smep-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-smep-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, cpu: Enable/disable Supervisor Mode Execution Protection
  x86, cpu: Add SMEP CPU feature in CR4
  x86, cpufeature: Add cpufeature flag for SMEP
parents 08839ff8 de5397ad
...@@ -1664,6 +1664,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. ...@@ -1664,6 +1664,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noexec=on: enable non-executable mappings (default) noexec=on: enable non-executable mappings (default)
noexec=off: disable non-executable mappings noexec=off: disable non-executable mappings
nosmep [X86]
Disable SMEP (Supervisor Mode Execution Protection)
even if it is supported by processor.
noexec32 [X86-64] noexec32 [X86-64]
This affects only 32-bit executables. This affects only 32-bit executables.
noexec32=on: enable non-executable mappings (default) noexec32=on: enable non-executable mappings (default)
......
...@@ -195,6 +195,7 @@ ...@@ -195,6 +195,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
#define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/ #define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
#define X86_FEATURE_SMEP (9*32+ 7) /* Supervisor Mode Execution Protection */
#define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ #define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */
#if defined(__KERNEL__) && !defined(__ASSEMBLY__) #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
......
...@@ -60,6 +60,7 @@ ...@@ -60,6 +60,7 @@
#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */ #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */ #define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */ #define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
#define X86_CR4_SMEP 0x00100000 /* enable SMEP support */
/* /*
* x86-64 Task Priority Register, CR8 * x86-64 Task Priority Register, CR8
......
...@@ -254,6 +254,25 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) ...@@ -254,6 +254,25 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
} }
#endif #endif
static int disable_smep __initdata;
static __init int setup_disable_smep(char *arg)
{
disable_smep = 1;
return 1;
}
__setup("nosmep", setup_disable_smep);
static __init void setup_smep(struct cpuinfo_x86 *c)
{
if (cpu_has(c, X86_FEATURE_SMEP)) {
if (unlikely(disable_smep)) {
setup_clear_cpu_cap(X86_FEATURE_SMEP);
clear_in_cr4(X86_CR4_SMEP);
} else
set_in_cr4(X86_CR4_SMEP);
}
}
/* /*
* Some CPU features depend on higher CPUID levels, which may not always * Some CPU features depend on higher CPUID levels, which may not always
* be available due to CPUID level capping or broken virtualization * be available due to CPUID level capping or broken virtualization
...@@ -667,6 +686,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) ...@@ -667,6 +686,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
c->cpu_index = 0; c->cpu_index = 0;
#endif #endif
filter_cpuid_features(c, false); filter_cpuid_features(c, false);
setup_smep(c);
} }
void __init early_cpu_init(void) void __init early_cpu_init(void)
...@@ -752,6 +773,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) ...@@ -752,6 +773,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
#endif #endif
} }
setup_smep(c);
get_model_name(c); /* Default name */ get_model_name(c); /* Default name */
detect_nopl(c); detect_nopl(c);
......
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