Commit 57afe2f0 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab

[media] drx-j: Don't use CamelCase

There's no reason at all to use CamelCase here. Convert all of
them to normal case.
Acked-by: default avatarDevin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 7ef66759
...@@ -48,13 +48,13 @@ ...@@ -48,13 +48,13 @@
#include "bsp_types.h" #include "bsp_types.h"
/* /*
* This structure contains the I2C address, the device ID and a userData pointer. * This structure contains the I2C address, the device ID and a user_data pointer.
* The userData pointer can be used for application specific purposes. * The user_data pointer can be used for application specific purposes.
*/ */
struct i2c_device_addr { struct i2c_device_addr {
u16 i2cAddr; /* The I2C address of the device. */ u16 i2c_addr; /* The I2C address of the device. */
u16 i2cDevId; /* The device identifier. */ u16 i2c_dev_id; /* The device identifier. */
void *userData; /* User data pointer */ void *user_data; /* User data pointer */
}; };
...@@ -74,44 +74,44 @@ Exported FUNCTIONS ...@@ -74,44 +74,44 @@ Exported FUNCTIONS
------------------------------------------------------------------------------*/ ------------------------------------------------------------------------------*/
/** /**
* \fn DRXBSP_I2C_Init() * \fn drxbsp_i2c_init()
* \brief Initialize I2C communication module. * \brief Initialize I2C communication module.
* \return DRXStatus_t Return status. * \return drx_status_t Return status.
* \retval DRX_STS_OK Initialization successful. * \retval DRX_STS_OK Initialization successful.
* \retval DRX_STS_ERROR Initialization failed. * \retval DRX_STS_ERROR Initialization failed.
*/ */
DRXStatus_t DRXBSP_I2C_Init(void); drx_status_t drxbsp_i2c_init(void);
/** /**
* \fn DRXBSP_I2C_Term() * \fn drxbsp_i2c_term()
* \brief Terminate I2C communication module. * \brief Terminate I2C communication module.
* \return DRXStatus_t Return status. * \return drx_status_t Return status.
* \retval DRX_STS_OK Termination successful. * \retval DRX_STS_OK Termination successful.
* \retval DRX_STS_ERROR Termination failed. * \retval DRX_STS_ERROR Termination failed.
*/ */
DRXStatus_t DRXBSP_I2C_Term(void); drx_status_t drxbsp_i2c_term(void);
/** /**
* \fn DRXStatus_t DRXBSP_I2C_WriteRead( struct i2c_device_addr *wDevAddr, * \fn drx_status_t drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr,
* u16 wCount, * u16 w_count,
* u8 *wData, * u8 *wData,
* struct i2c_device_addr *rDevAddr, * struct i2c_device_addr *r_dev_addr,
* u16 rCount, * u16 r_count,
* u8 *rData) * u8 *r_data)
* \brief Read and/or write count bytes from I2C bus, store them in data[]. * \brief Read and/or write count bytes from I2C bus, store them in data[].
* \param wDevAddr The device i2c address and the device ID to write to * \param w_dev_addr The device i2c address and the device ID to write to
* \param wCount The number of bytes to write * \param w_count The number of bytes to write
* \param wData The array to write the data to * \param wData The array to write the data to
* \param rDevAddr The device i2c address and the device ID to read from * \param r_dev_addr The device i2c address and the device ID to read from
* \param rCount The number of bytes to read * \param r_count The number of bytes to read
* \param rData The array to read the data from * \param r_data The array to read the data from
* \return DRXStatus_t Return status. * \return drx_status_t Return status.
* \retval DRX_STS_OK Succes. * \retval DRX_STS_OK Succes.
* \retval DRX_STS_ERROR Failure. * \retval DRX_STS_ERROR Failure.
* \retval DRX_STS_INVALID_ARG Parameter 'wcount' is not zero but parameter * \retval DRX_STS_INVALID_ARG Parameter 'wcount' is not zero but parameter
* 'wdata' contains NULL. * 'wdata' contains NULL.
* Idem for 'rcount' and 'rdata'. * Idem for 'rcount' and 'rdata'.
* Both wDevAddr and rDevAddr are NULL. * Both w_dev_addr and r_dev_addr are NULL.
* *
* This function must implement an atomic write and/or read action on the I2C bus * This function must implement an atomic write and/or read action on the I2C bus
* No other process may use the I2C bus when this function is executing. * No other process may use the I2C bus when this function is executing.
...@@ -121,25 +121,25 @@ Exported FUNCTIONS ...@@ -121,25 +121,25 @@ Exported FUNCTIONS
* The device ID can be useful if several devices share an I2C address. * The device ID can be useful if several devices share an I2C address.
* It can be used to control a "switch" on the I2C bus to the correct device. * It can be used to control a "switch" on the I2C bus to the correct device.
*/ */
DRXStatus_t DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr, drx_status_t drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
u16 wCount, u16 w_count,
u8 *wData, u8 *wData,
struct i2c_device_addr *rDevAddr, struct i2c_device_addr *r_dev_addr,
u16 rCount, u8 *rData); u16 r_count, u8 *r_data);
/** /**
* \fn DRXBSP_I2C_ErrorText() * \fn drxbsp_i2c_error_text()
* \brief Returns a human readable error. * \brief Returns a human readable error.
* Counter part of numerical DRX_I2C_Error_g. * Counter part of numerical drx_i2c_error_g.
* *
* \return char* Pointer to human readable error text. * \return char* Pointer to human readable error text.
*/ */
char *DRXBSP_I2C_ErrorText(void); char *drxbsp_i2c_error_text(void);
/** /**
* \var DRX_I2C_Error_g; * \var drx_i2c_error_g;
* \brief I2C specific error codes, platform dependent. * \brief I2C specific error codes, platform dependent.
*/ */
extern int DRX_I2C_Error_g; extern int drx_i2c_error_g;
#endif /* __BSPI2C_H__ */ #endif /* __BSPI2C_H__ */
...@@ -79,90 +79,90 @@ DEFINES ...@@ -79,90 +79,90 @@ DEFINES
TYPEDEFS TYPEDEFS
------------------------------------------------------------------------------*/ ------------------------------------------------------------------------------*/
typedef u32 TUNERMode_t; typedef u32 tuner_mode_t;
typedef u32 *pTUNERMode_t; typedef u32 *ptuner_mode_t;
typedef char *TUNERSubMode_t; /* description of submode */ typedef char *tuner_sub_mode_t; /* description of submode */
typedef TUNERSubMode_t *pTUNERSubMode_t; typedef tuner_sub_mode_t *ptuner_sub_mode_t;
typedef enum { typedef enum {
TUNER_LOCKED, TUNER_LOCKED,
TUNER_NOT_LOCKED TUNER_NOT_LOCKED
} TUNERLockStatus_t, *pTUNERLockStatus_t; } tuner_lock_status_t, *ptuner_lock_status_t;
typedef struct { typedef struct {
char *name; /* Tuner brand & type name */ char *name; /* Tuner brand & type name */
s32 minFreqRF; /* Lowest RF input frequency, in kHz */ s32 min_freq_rf; /* Lowest RF input frequency, in kHz */
s32 maxFreqRF; /* Highest RF input frequency, in kHz */ s32 max_freq_rf; /* Highest RF input frequency, in kHz */
u8 subMode; /* Index to sub-mode in use */ u8 sub_mode; /* Index to sub-mode in use */
pTUNERSubMode_t subModeDescriptions; /* Pointer to description of sub-modes */ ptuner_sub_mode_t sub_modeDescriptions; /* Pointer to description of sub-modes */
u8 subModes; /* Number of available sub-modes */ u8 sub_modes; /* Number of available sub-modes */
/* The following fields will be either 0, NULL or false and do not need /* The following fields will be either 0, NULL or false and do not need
initialisation */ initialisation */
void *selfCheck; /* gives proof of initialization */ void *self_check; /* gives proof of initialization */
bool programmed; /* only valid if selfCheck is OK */ bool programmed; /* only valid if self_check is OK */
s32 RFfrequency; /* only valid if programmed */ s32 r_ffrequency; /* only valid if programmed */
s32 IFfrequency; /* only valid if programmed */ s32 i_ffrequency; /* only valid if programmed */
void *myUserData; /* pointer to associated demod instance */ void *myUser_data; /* pointer to associated demod instance */
u16 myCapabilities; /* value for storing application flags */ u16 my_capabilities; /* value for storing application flags */
} TUNERCommonAttr_t, *pTUNERCommonAttr_t; } tuner_common_attr_t, *ptuner_common_attr_t;
/* /*
* Generic functions for DRX devices. * Generic functions for DRX devices.
*/ */
typedef struct TUNERInstance_s *pTUNERInstance_t; typedef struct tuner_instance_s *p_tuner_instance_t;
typedef DRXStatus_t(*TUNEROpenFunc_t) (pTUNERInstance_t tuner); typedef drx_status_t(*tuner_open_func_t) (p_tuner_instance_t tuner);
typedef DRXStatus_t(*TUNERCloseFunc_t) (pTUNERInstance_t tuner); typedef drx_status_t(*tuner_close_func_t) (p_tuner_instance_t tuner);
typedef DRXStatus_t(*TUNERSetFrequencyFunc_t) (pTUNERInstance_t tuner, typedef drx_status_t(*tuner_set_frequency_func_t) (p_tuner_instance_t tuner,
TUNERMode_t mode, tuner_mode_t mode,
s32 s32
frequency); frequency);
typedef DRXStatus_t(*TUNERGetFrequencyFunc_t) (pTUNERInstance_t tuner, typedef drx_status_t(*tuner_get_frequency_func_t) (p_tuner_instance_t tuner,
TUNERMode_t mode, tuner_mode_t mode,
s32 * s32 *
RFfrequency, r_ffrequency,
s32 * s32 *
IFfrequency); i_ffrequency);
typedef DRXStatus_t(*TUNERLockStatusFunc_t) (pTUNERInstance_t tuner, typedef drx_status_t(*tuner_lock_status_func_t) (p_tuner_instance_t tuner,
pTUNERLockStatus_t ptuner_lock_status_t
lockStat); lock_stat);
typedef DRXStatus_t(*TUNERi2cWriteReadFunc_t) (pTUNERInstance_t tuner, typedef drx_status_t(*tune_ri2c_write_read_func_t) (p_tuner_instance_t tuner,
struct i2c_device_addr * struct i2c_device_addr *
wDevAddr, u16 wCount, w_dev_addr, u16 w_count,
u8 *wData, u8 *wData,
struct i2c_device_addr * struct i2c_device_addr *
rDevAddr, u16 rCount, r_dev_addr, u16 r_count,
u8 *rData); u8 *r_data);
typedef struct { typedef struct {
TUNEROpenFunc_t openFunc; tuner_open_func_t open_func;
TUNERCloseFunc_t closeFunc; tuner_close_func_t close_func;
TUNERSetFrequencyFunc_t setFrequencyFunc; tuner_set_frequency_func_t set_frequency_func;
TUNERGetFrequencyFunc_t getFrequencyFunc; tuner_get_frequency_func_t get_frequency_func;
TUNERLockStatusFunc_t lockStatusFunc; tuner_lock_status_func_t lock_statusFunc;
TUNERi2cWriteReadFunc_t i2cWriteReadFunc; tune_ri2c_write_read_func_t i2c_write_read_func;
} TUNERFunc_t, *pTUNERFunc_t; } tuner_func_t, *ptuner_func_t;
typedef struct TUNERInstance_s { typedef struct tuner_instance_s {
struct i2c_device_addr myI2CDevAddr; struct i2c_device_addr my_i2c_dev_addr;
pTUNERCommonAttr_t myCommonAttr; ptuner_common_attr_t my_common_attr;
void *myExtAttr; void *my_ext_attr;
pTUNERFunc_t myFunct; ptuner_func_t my_funct;
} TUNERInstance_t; } tuner_instance_t;
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
ENUM ENUM
...@@ -176,28 +176,28 @@ STRUCTS ...@@ -176,28 +176,28 @@ STRUCTS
Exported FUNCTIONS Exported FUNCTIONS
------------------------------------------------------------------------------*/ ------------------------------------------------------------------------------*/
DRXStatus_t DRXBSP_TUNER_Open(pTUNERInstance_t tuner); drx_status_t drxbsp_tuner_open(p_tuner_instance_t tuner);
DRXStatus_t DRXBSP_TUNER_Close(pTUNERInstance_t tuner); drx_status_t drxbsp_tuner_close(p_tuner_instance_t tuner);
DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner, drx_status_t drxbsp_tuner_set_frequency(p_tuner_instance_t tuner,
TUNERMode_t mode, tuner_mode_t mode,
s32 frequency); s32 frequency);
DRXStatus_t DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner, drx_status_t drxbsp_tuner_get_frequency(p_tuner_instance_t tuner,
TUNERMode_t mode, tuner_mode_t mode,
s32 *RFfrequency, s32 *r_ffrequency,
s32 *IFfrequency); s32 *i_ffrequency);
DRXStatus_t DRXBSP_TUNER_LockStatus(pTUNERInstance_t tuner, drx_status_t drxbsp_tuner_lock_status(p_tuner_instance_t tuner,
pTUNERLockStatus_t lockStat); ptuner_lock_status_t lock_stat);
DRXStatus_t DRXBSP_TUNER_DefaultI2CWriteRead(pTUNERInstance_t tuner, drx_status_t drxbsp_tuner_default_i2c_write_read(p_tuner_instance_t tuner,
struct i2c_device_addr *wDevAddr, struct i2c_device_addr *w_dev_addr,
u16 wCount, u16 w_count,
u8 *wData, u8 *wData,
struct i2c_device_addr *rDevAddr, struct i2c_device_addr *r_dev_addr,
u16 rCount, u8 *rData); u16 r_count, u8 *r_data);
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
THE END THE END
......
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
struct drx39xxj_state { struct drx39xxj_state {
struct i2c_adapter *i2c; struct i2c_adapter *i2c;
DRXDemodInstance_t *demod; drx_demod_instance_t *demod;
enum drx_standard current_standard; enum drx_standard current_standard;
struct dvb_frontend frontend; struct dvb_frontend frontend;
int powered_up:1; int powered_up:1;
......
...@@ -11,90 +11,90 @@ ...@@ -11,90 +11,90 @@
#include "drx39xxj.h" #include "drx39xxj.h"
/* Dummy function to satisfy drxj.c */ /* Dummy function to satisfy drxj.c */
int DRXBSP_TUNER_Open(struct tuner_instance *tuner) int drxbsp_tuner_open(struct tuner_instance *tuner)
{ {
return DRX_STS_OK; return DRX_STS_OK;
} }
int DRXBSP_TUNER_Close(struct tuner_instance *tuner) int drxbsp_tuner_close(struct tuner_instance *tuner)
{ {
return DRX_STS_OK; return DRX_STS_OK;
} }
int DRXBSP_TUNER_SetFrequency(struct tuner_instance *tuner, int drxbsp_tuner_set_frequency(struct tuner_instance *tuner,
u32 mode, u32 mode,
s32 centerFrequency) s32 center_frequency)
{ {
return DRX_STS_OK; return DRX_STS_OK;
} }
int int
DRXBSP_TUNER_GetFrequency(struct tuner_instance *tuner, drxbsp_tuner_get_frequency(struct tuner_instance *tuner,
u32 mode, u32 mode,
s32 *RFfrequency, s32 *r_ffrequency,
s32 *IFfrequency) s32 *i_ffrequency)
{ {
return DRX_STS_OK; return DRX_STS_OK;
} }
int DRXBSP_HST_Sleep(u32 n) int drxbsp_hst_sleep(u32 n)
{ {
msleep(n); msleep(n);
return DRX_STS_OK; return DRX_STS_OK;
} }
u32 DRXBSP_HST_Clock(void) u32 drxbsp_hst_clock(void)
{ {
return jiffies_to_msecs(jiffies); return jiffies_to_msecs(jiffies);
} }
int DRXBSP_HST_Memcmp(void *s1, void *s2, u32 n) int drxbsp_hst_memcmp(void *s1, void *s2, u32 n)
{ {
return (memcmp(s1, s2, (size_t) n)); return (memcmp(s1, s2, (size_t) n));
} }
void *DRXBSP_HST_Memcpy(void *to, void *from, u32 n) void *drxbsp_hst_memcpy(void *to, void *from, u32 n)
{ {
return (memcpy(to, from, (size_t) n)); return (memcpy(to, from, (size_t) n));
} }
int DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr, int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
u16 wCount, u16 w_count,
u8 *wData, u8 *wData,
struct i2c_device_addr *rDevAddr, struct i2c_device_addr *r_dev_addr,
u16 rCount, u8 *rData) u16 r_count, u8 *r_data)
{ {
struct drx39xxj_state *state; struct drx39xxj_state *state;
struct i2c_msg msg[2]; struct i2c_msg msg[2];
unsigned int num_msgs; unsigned int num_msgs;
if (wDevAddr == NULL) { if (w_dev_addr == NULL) {
/* Read only */ /* Read only */
state = rDevAddr->userData; state = r_dev_addr->user_data;
msg[0].addr = rDevAddr->i2cAddr >> 1; msg[0].addr = r_dev_addr->i2c_addr >> 1;
msg[0].flags = I2C_M_RD; msg[0].flags = I2C_M_RD;
msg[0].buf = rData; msg[0].buf = r_data;
msg[0].len = rCount; msg[0].len = r_count;
num_msgs = 1; num_msgs = 1;
} else if (rDevAddr == NULL) { } else if (r_dev_addr == NULL) {
/* Write only */ /* Write only */
state = wDevAddr->userData; state = w_dev_addr->user_data;
msg[0].addr = wDevAddr->i2cAddr >> 1; msg[0].addr = w_dev_addr->i2c_addr >> 1;
msg[0].flags = 0; msg[0].flags = 0;
msg[0].buf = wData; msg[0].buf = wData;
msg[0].len = wCount; msg[0].len = w_count;
num_msgs = 1; num_msgs = 1;
} else { } else {
/* Both write and read */ /* Both write and read */
state = wDevAddr->userData; state = w_dev_addr->user_data;
msg[0].addr = wDevAddr->i2cAddr >> 1; msg[0].addr = w_dev_addr->i2c_addr >> 1;
msg[0].flags = 0; msg[0].flags = 0;
msg[0].buf = wData; msg[0].buf = wData;
msg[0].len = wCount; msg[0].len = w_count;
msg[1].addr = rDevAddr->i2cAddr >> 1; msg[1].addr = r_dev_addr->i2c_addr >> 1;
msg[1].flags = I2C_M_RD; msg[1].flags = I2C_M_RD;
msg[1].buf = rData; msg[1].buf = r_data;
msg[1].len = rCount; msg[1].len = r_count;
num_msgs = 2; num_msgs = 2;
} }
...@@ -110,17 +110,17 @@ int DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr, ...@@ -110,17 +110,17 @@ int DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
return DRX_STS_OK; return DRX_STS_OK;
#ifdef DJH_DEBUG #ifdef DJH_DEBUG
struct drx39xxj_state *state = wDevAddr->userData; struct drx39xxj_state *state = w_dev_addr->user_data;
struct i2c_msg msg[2] = { struct i2c_msg msg[2] = {
{.addr = wDevAddr->i2cAddr, {.addr = w_dev_addr->i2c_addr,
.flags = 0, .buf = wData, .len = wCount}, .flags = 0, .buf = wData, .len = w_count},
{.addr = rDevAddr->i2cAddr, {.addr = r_dev_addr->i2c_addr,
.flags = I2C_M_RD, .buf = rData, .len = rCount}, .flags = I2C_M_RD, .buf = r_data, .len = r_count},
}; };
printk("drx3933 i2c operation addr=%x i2c=%p, wc=%x rc=%x\n", printk("drx3933 i2c operation addr=%x i2c=%p, wc=%x rc=%x\n",
wDevAddr->i2cAddr, state->i2c, wCount, rCount); w_dev_addr->i2c_addr, state->i2c, w_count, r_count);
if (i2c_transfer(state->i2c, msg, 2) != 2) { if (i2c_transfer(state->i2c, msg, 2) != 2) {
printk(KERN_WARNING "drx3933: I2C write/read failed\n"); printk(KERN_WARNING "drx3933: I2C write/read failed\n");
......
...@@ -238,7 +238,7 @@ ...@@ -238,7 +238,7 @@
extern "C" { extern "C" {
#endif #endif
extern DRXAccessFunc_t drxDapFASIFunct_g; extern drx_access_func_t drx_dap_fasi_funct_g;
#define DRXDAP_FASI_RMW 0x10000000 #define DRXDAP_FASI_RMW 0x10000000
#define DRXDAP_FASI_BROADCAST 0x20000000 #define DRXDAP_FASI_BROADCAST 0x20000000
......
...@@ -53,8 +53,8 @@ extern "C" { ...@@ -53,8 +53,8 @@ extern "C" {
#ifdef _REGISTERTABLE_ #ifdef _REGISTERTABLE_
#include <registertable.h> #include <registertable.h>
extern RegisterTable_t drx_driver_version[]; extern register_table_t drx_driver_version[];
extern RegisterTableInfo_t drx_driver_version_info[]; extern register_table_info_t drx_driver_version_info[];
#endif /* _REGISTERTABLE_ */ #endif /* _REGISTERTABLE_ */
/* /*
......
This diff is collapsed.
This diff is collapsed.
...@@ -53,8 +53,8 @@ extern "C" { ...@@ -53,8 +53,8 @@ extern "C" {
#ifdef _REGISTERTABLE_ #ifdef _REGISTERTABLE_
#include <registertable.h> #include <registertable.h>
extern RegisterTable_t drxj_map[]; extern register_table_t drxj_map[];
extern RegisterTableInfo_t drxj_map_info[]; extern register_table_info_t drxj_map_info[];
#endif #endif
#define ATV_COMM_EXEC__A 0xC00000 #define ATV_COMM_EXEC__A 0xC00000
......
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