Commit 57beea8e authored by Amit Cohen's avatar Amit Cohen Committed by Jakub Kicinski

mlxsw: pci: Remove unused counters

The structure 'mlxsw_pci_queue' stores several counters which were consumed
via debugfs. Since commit 9a32562b ("mlxsw: Remove debugfs interface"),
these counters are not used. Remove them. This makes the 'union u' and
'struct eq' redundant. Maintain 'struct cq' as it will be extended later.

Replace increasing 'q->u.eq.ev_other_count' with WARN_ON_ONCE(), as it is
used in an unreasonable case of receiving event in EQ which is not EQ0 or
EQ1. When the queues are initialized, we check number of event queues and
fail with the print "Unsupported number of queues" in case that the driver
tries to initialize more than two queues.
Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Link: https://lore.kernel.org/r/ee9e658800aa0390e08342100bc27daff4c176c0.1712062203.git.petrm@nvidia.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 38b124cb
...@@ -80,18 +80,9 @@ struct mlxsw_pci_queue { ...@@ -80,18 +80,9 @@ struct mlxsw_pci_queue {
enum mlxsw_pci_queue_type type; enum mlxsw_pci_queue_type type;
struct tasklet_struct tasklet; /* queue processing tasklet */ struct tasklet_struct tasklet; /* queue processing tasklet */
struct mlxsw_pci *pci; struct mlxsw_pci *pci;
union {
struct { struct {
u32 comp_sdq_count;
u32 comp_rdq_count;
enum mlxsw_pci_cqe_v v; enum mlxsw_pci_cqe_v v;
} cq; } cq;
struct {
u32 ev_cmd_count;
u32 ev_comp_count;
u32 ev_other_count;
} eq;
} u;
}; };
struct mlxsw_pci_queue_type_group { struct mlxsw_pci_queue_type_group {
...@@ -462,12 +453,12 @@ static void mlxsw_pci_rdq_fini(struct mlxsw_pci *mlxsw_pci, ...@@ -462,12 +453,12 @@ static void mlxsw_pci_rdq_fini(struct mlxsw_pci *mlxsw_pci,
static void mlxsw_pci_cq_pre_init(struct mlxsw_pci *mlxsw_pci, static void mlxsw_pci_cq_pre_init(struct mlxsw_pci *mlxsw_pci,
struct mlxsw_pci_queue *q) struct mlxsw_pci_queue *q)
{ {
q->u.cq.v = mlxsw_pci->max_cqe_ver; q->cq.v = mlxsw_pci->max_cqe_ver;
if (q->u.cq.v == MLXSW_PCI_CQE_V2 && if (q->cq.v == MLXSW_PCI_CQE_V2 &&
q->num < mlxsw_pci->num_sdq_cqs && q->num < mlxsw_pci->num_sdq_cqs &&
!mlxsw_core_sdq_supports_cqe_v2(mlxsw_pci->core)) !mlxsw_core_sdq_supports_cqe_v2(mlxsw_pci->core))
q->u.cq.v = MLXSW_PCI_CQE_V1; q->cq.v = MLXSW_PCI_CQE_V1;
} }
static unsigned int mlxsw_pci_read32_off(struct mlxsw_pci *mlxsw_pci, static unsigned int mlxsw_pci_read32_off(struct mlxsw_pci *mlxsw_pci,
...@@ -663,7 +654,7 @@ static char *mlxsw_pci_cq_sw_cqe_get(struct mlxsw_pci_queue *q) ...@@ -663,7 +654,7 @@ static char *mlxsw_pci_cq_sw_cqe_get(struct mlxsw_pci_queue *q)
elem_info = mlxsw_pci_queue_elem_info_consumer_get(q); elem_info = mlxsw_pci_queue_elem_info_consumer_get(q);
elem = elem_info->elem; elem = elem_info->elem;
owner_bit = mlxsw_pci_cqe_owner_get(q->u.cq.v, elem); owner_bit = mlxsw_pci_cqe_owner_get(q->cq.v, elem);
if (mlxsw_pci_elem_hw_owned(q, owner_bit)) if (mlxsw_pci_elem_hw_owned(q, owner_bit))
return NULL; return NULL;
q->consumer_counter++; q->consumer_counter++;
...@@ -681,8 +672,8 @@ static void mlxsw_pci_cq_tasklet(struct tasklet_struct *t) ...@@ -681,8 +672,8 @@ static void mlxsw_pci_cq_tasklet(struct tasklet_struct *t)
while ((cqe = mlxsw_pci_cq_sw_cqe_get(q))) { while ((cqe = mlxsw_pci_cq_sw_cqe_get(q))) {
u16 wqe_counter = mlxsw_pci_cqe_wqe_counter_get(cqe); u16 wqe_counter = mlxsw_pci_cqe_wqe_counter_get(cqe);
u8 sendq = mlxsw_pci_cqe_sr_get(q->u.cq.v, cqe); u8 sendq = mlxsw_pci_cqe_sr_get(q->cq.v, cqe);
u8 dqn = mlxsw_pci_cqe_dqn_get(q->u.cq.v, cqe); u8 dqn = mlxsw_pci_cqe_dqn_get(q->cq.v, cqe);
char ncqe[MLXSW_PCI_CQE_SIZE_MAX]; char ncqe[MLXSW_PCI_CQE_SIZE_MAX];
memcpy(ncqe, cqe, q->elem_size); memcpy(ncqe, cqe, q->elem_size);
...@@ -693,15 +684,13 @@ static void mlxsw_pci_cq_tasklet(struct tasklet_struct *t) ...@@ -693,15 +684,13 @@ static void mlxsw_pci_cq_tasklet(struct tasklet_struct *t)
sdq = mlxsw_pci_sdq_get(mlxsw_pci, dqn); sdq = mlxsw_pci_sdq_get(mlxsw_pci, dqn);
mlxsw_pci_cqe_sdq_handle(mlxsw_pci, sdq, mlxsw_pci_cqe_sdq_handle(mlxsw_pci, sdq,
wqe_counter, q->u.cq.v, ncqe); wqe_counter, q->cq.v, ncqe);
q->u.cq.comp_sdq_count++;
} else { } else {
struct mlxsw_pci_queue *rdq; struct mlxsw_pci_queue *rdq;
rdq = mlxsw_pci_rdq_get(mlxsw_pci, dqn); rdq = mlxsw_pci_rdq_get(mlxsw_pci, dqn);
mlxsw_pci_cqe_rdq_handle(mlxsw_pci, rdq, mlxsw_pci_cqe_rdq_handle(mlxsw_pci, rdq,
wqe_counter, q->u.cq.v, ncqe); wqe_counter, q->cq.v, ncqe);
q->u.cq.comp_rdq_count++;
} }
if (++items == credits) if (++items == credits)
break; break;
...@@ -721,13 +710,13 @@ static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox, ...@@ -721,13 +710,13 @@ static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,
for (i = 0; i < q->count; i++) { for (i = 0; i < q->count; i++) {
char *elem = mlxsw_pci_queue_elem_get(q, i); char *elem = mlxsw_pci_queue_elem_get(q, i);
mlxsw_pci_cqe_owner_set(q->u.cq.v, elem, 1); mlxsw_pci_cqe_owner_set(q->cq.v, elem, 1);
} }
if (q->u.cq.v == MLXSW_PCI_CQE_V1) if (q->cq.v == MLXSW_PCI_CQE_V1)
mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox, mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox,
MLXSW_CMD_MBOX_SW2HW_CQ_CQE_VER_1); MLXSW_CMD_MBOX_SW2HW_CQ_CQE_VER_1);
else if (q->u.cq.v == MLXSW_PCI_CQE_V2) else if (q->cq.v == MLXSW_PCI_CQE_V2)
mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox, mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox,
MLXSW_CMD_MBOX_SW2HW_CQ_CQE_VER_2); MLXSW_CMD_MBOX_SW2HW_CQ_CQE_VER_2);
...@@ -756,13 +745,13 @@ static void mlxsw_pci_cq_fini(struct mlxsw_pci *mlxsw_pci, ...@@ -756,13 +745,13 @@ static void mlxsw_pci_cq_fini(struct mlxsw_pci *mlxsw_pci,
static u16 mlxsw_pci_cq_elem_count(const struct mlxsw_pci_queue *q) static u16 mlxsw_pci_cq_elem_count(const struct mlxsw_pci_queue *q)
{ {
return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_COUNT : return q->cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_COUNT :
MLXSW_PCI_CQE01_COUNT; MLXSW_PCI_CQE01_COUNT;
} }
static u8 mlxsw_pci_cq_elem_size(const struct mlxsw_pci_queue *q) static u8 mlxsw_pci_cq_elem_size(const struct mlxsw_pci_queue *q)
{ {
return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_SIZE : return q->cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_SIZE :
MLXSW_PCI_CQE01_SIZE; MLXSW_PCI_CQE01_SIZE;
} }
...@@ -815,16 +804,14 @@ static void mlxsw_pci_eq_tasklet(struct tasklet_struct *t) ...@@ -815,16 +804,14 @@ static void mlxsw_pci_eq_tasklet(struct tasklet_struct *t)
switch (q->num) { switch (q->num) {
case MLXSW_PCI_EQ_ASYNC_NUM: case MLXSW_PCI_EQ_ASYNC_NUM:
mlxsw_pci_eq_cmd_event(mlxsw_pci, eqe); mlxsw_pci_eq_cmd_event(mlxsw_pci, eqe);
q->u.eq.ev_cmd_count++;
break; break;
case MLXSW_PCI_EQ_COMP_NUM: case MLXSW_PCI_EQ_COMP_NUM:
cqn = mlxsw_pci_eqe_cqn_get(eqe); cqn = mlxsw_pci_eqe_cqn_get(eqe);
set_bit(cqn, active_cqns); set_bit(cqn, active_cqns);
cq_handle = true; cq_handle = true;
q->u.eq.ev_comp_count++;
break; break;
default: default:
q->u.eq.ev_other_count++; WARN_ON_ONCE(1);
} }
if (++items == credits) if (++items == credits)
break; break;
......
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