Commit 5815c2d1 authored by Damien Le Moal's avatar Damien Le Moal Committed by Lorenzo Pieralisi

PCI: rockchip-ep: Use INTX instead of legacy

Rename the function rockchip_pcie_ep_send_legacy_irq() of the rockchip
endpoint driver to rockchip_pcie_ep_send_intx_irq(). Uses of the term
"legacy" are also replaced with "INTX" in comments.

Link: https://lore.kernel.org/r/20231122060406.14695-15-dlemoal@kernel.orgSigned-off-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
parent c0dcdeea
...@@ -26,16 +26,16 @@ ...@@ -26,16 +26,16 @@
* @max_regions: maximum number of regions supported by hardware * @max_regions: maximum number of regions supported by hardware
* @ob_region_map: bitmask of mapped outbound regions * @ob_region_map: bitmask of mapped outbound regions
* @ob_addr: base addresses in the AXI bus where the outbound regions start * @ob_addr: base addresses in the AXI bus where the outbound regions start
* @irq_phys_addr: base address on the AXI bus where the MSI/legacy IRQ * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
* dedicated outbound regions is mapped. * dedicated outbound regions is mapped.
* @irq_cpu_addr: base address in the CPU space where a write access triggers * @irq_cpu_addr: base address in the CPU space where a write access triggers
* the sending of a memory write (MSI) / normal message (legacy * the sending of a memory write (MSI) / normal message (INTX
* IRQ) TLP through the PCIe bus. * IRQ) TLP through the PCIe bus.
* @irq_pci_addr: used to save the current mapping of the MSI/legacy IRQ * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
* dedicated outbound region. * dedicated outbound region.
* @irq_pci_fn: the latest PCI function that has updated the mapping of * @irq_pci_fn: the latest PCI function that has updated the mapping of
* the MSI/legacy IRQ dedicated outbound region. * the MSI/INTX IRQ dedicated outbound region.
* @irq_pending: bitmask of asserted legacy IRQs. * @irq_pending: bitmask of asserted INTX IRQs.
*/ */
struct rockchip_pcie_ep { struct rockchip_pcie_ep {
struct rockchip_pcie rockchip; struct rockchip_pcie rockchip;
...@@ -325,7 +325,7 @@ static void rockchip_pcie_ep_assert_intx(struct rockchip_pcie_ep *ep, u8 fn, ...@@ -325,7 +325,7 @@ static void rockchip_pcie_ep_assert_intx(struct rockchip_pcie_ep *ep, u8 fn,
} }
} }
static int rockchip_pcie_ep_send_legacy_irq(struct rockchip_pcie_ep *ep, u8 fn, static int rockchip_pcie_ep_send_intx_irq(struct rockchip_pcie_ep *ep, u8 fn,
u8 intx) u8 intx)
{ {
u16 cmd; u16 cmd;
...@@ -413,7 +413,7 @@ static int rockchip_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, u8 vfn, ...@@ -413,7 +413,7 @@ static int rockchip_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, u8 vfn,
switch (type) { switch (type) {
case PCI_IRQ_INTX: case PCI_IRQ_INTX:
return rockchip_pcie_ep_send_legacy_irq(ep, fn, 0); return rockchip_pcie_ep_send_intx_irq(ep, fn, 0);
case PCI_IRQ_MSI: case PCI_IRQ_MSI:
return rockchip_pcie_ep_send_msi_irq(ep, fn, interrupt_num); return rockchip_pcie_ep_send_msi_irq(ep, fn, interrupt_num);
default: default:
......
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