Commit 58810cb7 authored by Emil Medve's avatar Emil Medve Committed by Scott Wood

powerpc/dts: Add node(s) for the platform PLL

Signed-off-by: default avatarEmil Medve <Emilian.Medve@Freescale.com>
Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent f1aa77c9
...@@ -75,4 +75,11 @@ mux1: mux1@20 { ...@@ -75,4 +75,11 @@ mux1: mux1@20 {
clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
clock-output-names = "cmux1"; clock-output-names = "cmux1";
}; };
platform_pll: platform-pll@c00 {
#clock-cells = <1>;
reg = <0xc00 0x4>;
compatible = "fsl,qoriq-platform-pll-1.0";
clocks = <&sysclk>;
clock-output-names = "platform-pll", "platform-pll-div2";
};
}; };
...@@ -58,4 +58,11 @@ pll1: pll1@820 { ...@@ -58,4 +58,11 @@ pll1: pll1@820 {
clocks = <&sysclk>; clocks = <&sysclk>;
clock-output-names = "pll1", "pll1-div2", "pll1-div4"; clock-output-names = "pll1", "pll1-div2", "pll1-div4";
}; };
platform_pll: platform-pll@c00 {
#clock-cells = <1>;
reg = <0xc00 0x4>;
compatible = "fsl,qoriq-platform-pll-2.0";
clocks = <&sysclk>;
clock-output-names = "platform-pll", "platform-pll-div2";
};
}; };
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment