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Commit 590a94d9 authored by Russell King's avatar Russell King Committed by Russell King
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Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable

parents 6973ee7e c35d3a41
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arch/arm/Makefile
View file @ 590a94d9
...@@ -142,6 +142,7 @@ machine-$(CONFIG_ARCH_MSM) := msm ...@@ -142,6 +142,7 @@ machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_MX1) := mx1 machine-$(CONFIG_ARCH_MX1) := mx1
machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX2) := mx2
machine-$(CONFIG_ARCH_MX25) := mx25
machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_MX3) := mx3
machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx
...@@ -165,6 +166,7 @@ machine-$(CONFIG_ARCH_U300) := u300 ...@@ -165,6 +166,7 @@ machine-$(CONFIG_ARCH_U300) := u300
machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_VERSATILE) := versatile
machine-$(CONFIG_ARCH_W90X900) := w90x900 machine-$(CONFIG_ARCH_W90X900) := w90x900
machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_FOOTBRIDGE) := footbridge
machine-$(CONFIG_ARCH_MXC91231) := mxc91231
# Platform directory name. This list is sorted alphanumerically # Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name. # by CONFIG_* macro name.
......
arch/arm/mach-mx1/clock.c
View file @ 590a94d9
...@@ -18,11 +18,14 @@ ...@@ -18,11 +18,14 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/list.h>
#include <linux/math64.h> #include <linux/math64.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/io.h> #include <linux/io.h>
#include <asm/clkdev.h>
#include <mach/clock.h> #include <mach/clock.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/common.h> #include <mach/common.h>
...@@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk) ...@@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk)
} }
static struct clk clk16m = { static struct clk clk16m = {
.name = "CLK16M",
.get_rate = clk16m_get_rate, .get_rate = clk16m_get_rate,
.enable = _clk_enable, .enable = _clk_enable,
.enable_reg = CCM_CSCR, .enable_reg = CCM_CSCR,
...@@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk) ...@@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk)
} }
static struct clk clk32 = { static struct clk clk32 = {
.name = "CLK32",
.get_rate = clk32_get_rate, .get_rate = clk32_get_rate,
}; };
...@@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk) ...@@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk)
} }
static struct clk clk32_premult = { static struct clk clk32_premult = {
.name = "CLK32_premultiplier",
.parent = &clk32, .parent = &clk32,
.get_rate = clk32_premult_get_rate, .get_rate = clk32_premult_get_rate,
}; };
...@@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent) ...@@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent)
} }
static struct clk prem_clk = { static struct clk prem_clk = {
.name = "prem_clk",
.set_parent = prem_clk_set_parent, .set_parent = prem_clk_set_parent,
}; };
...@@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk) ...@@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk)
} }
static struct clk system_clk = { static struct clk system_clk = {
.name = "system_clk",
.parent = &prem_clk, .parent = &prem_clk,
.get_rate = system_clk_get_rate, .get_rate = system_clk_get_rate,
}; };
...@@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk) ...@@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk)
} }
static struct clk mcu_clk = { static struct clk mcu_clk = {
.name = "mcu_clk",
.parent = &clk32_premult, .parent = &clk32_premult,
.get_rate = mcu_clk_get_rate, .get_rate = mcu_clk_get_rate,
}; };
...@@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk) ...@@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk)
} }
static struct clk fclk = { static struct clk fclk = {
.name = "fclk",
.parent = &mcu_clk, .parent = &mcu_clk,
.get_rate = fclk_get_rate, .get_rate = fclk_get_rate,
}; };
...@@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate) ...@@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate)
} }
static struct clk hclk = { static struct clk hclk = {
.name = "hclk",
.parent = &system_clk, .parent = &system_clk,
.get_rate = hclk_get_rate, .get_rate = hclk_get_rate,
.round_rate = hclk_round_rate, .round_rate = hclk_round_rate,
...@@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate) ...@@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate)
} }
static struct clk clk48m = { static struct clk clk48m = {
.name = "CLK48M",
.parent = &system_clk, .parent = &system_clk,
.get_rate = clk48m_get_rate, .get_rate = clk48m_get_rate,
.round_rate = clk48m_round_rate, .round_rate = clk48m_round_rate,
...@@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate) ...@@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate)
static struct clk perclk[] = { static struct clk perclk[] = {
{ {
.name = "perclk",
.id = 0, .id = 0,
.parent = &system_clk, .parent = &system_clk,
.get_rate = perclk1_get_rate, .get_rate = perclk1_get_rate,
.round_rate = perclk1_round_rate, .round_rate = perclk1_round_rate,
.set_rate = perclk1_set_rate, .set_rate = perclk1_set_rate,
}, { }, {
.name = "perclk",
.id = 1, .id = 1,
.parent = &system_clk, .parent = &system_clk,
.get_rate = perclk2_get_rate, .get_rate = perclk2_get_rate,
.round_rate = perclk2_round_rate, .round_rate = perclk2_round_rate,
.set_rate = perclk2_set_rate, .set_rate = perclk2_set_rate,
}, { }, {
.name = "perclk",
.id = 2, .id = 2,
.parent = &system_clk, .parent = &system_clk,
.get_rate = perclk3_get_rate, .get_rate = perclk3_get_rate,
...@@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent) ...@@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent)
} }
static struct clk clko_clk = { static struct clk clko_clk = {
.name = "clko_clk",
.set_parent = clko_set_parent, .set_parent = clko_set_parent,
}; };
static struct clk dma_clk = { static struct clk dma_clk = {
.name = "dma",
.parent = &hclk, .parent = &hclk,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
...@@ -473,7 +462,6 @@ static struct clk dma_clk = { ...@@ -473,7 +462,6 @@ static struct clk dma_clk = {
}; };
static struct clk csi_clk = { static struct clk csi_clk = {
.name = "csi_clk",
.parent = &hclk, .parent = &hclk,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
...@@ -484,7 +472,6 @@ static struct clk csi_clk = { ...@@ -484,7 +472,6 @@ static struct clk csi_clk = {
}; };
static struct clk mma_clk = { static struct clk mma_clk = {
.name = "mma_clk",
.parent = &hclk, .parent = &hclk,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
...@@ -495,7 +482,6 @@ static struct clk mma_clk = { ...@@ -495,7 +482,6 @@ static struct clk mma_clk = {
}; };
static struct clk usbd_clk = { static struct clk usbd_clk = {
.name = "usbd_clk",
.parent = &clk48m, .parent = &clk48m,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
...@@ -506,99 +492,85 @@ static struct clk usbd_clk = { ...@@ -506,99 +492,85 @@ static struct clk usbd_clk = {
}; };
static struct clk gpt_clk = { static struct clk gpt_clk = {
.name = "gpt_clk",
.parent = &perclk[0], .parent = &perclk[0],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk uart_clk = { static struct clk uart_clk = {
.name = "uart",
.parent = &perclk[0], .parent = &perclk[0],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk i2c_clk = { static struct clk i2c_clk = {
.name = "i2c_clk",
.parent = &hclk, .parent = &hclk,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk spi_clk = { static struct clk spi_clk = {
.name = "spi_clk",
.parent = &perclk[1], .parent = &perclk[1],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk sdhc_clk = { static struct clk sdhc_clk = {
.name = "sdhc_clk",
.parent = &perclk[1], .parent = &perclk[1],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk lcdc_clk = { static struct clk lcdc_clk = {
.name = "lcdc_clk",
.parent = &perclk[1], .parent = &perclk[1],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk mshc_clk = { static struct clk mshc_clk = {
.name = "mshc_clk",
.parent = &hclk, .parent = &hclk,
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk ssi_clk = { static struct clk ssi_clk = {
.name = "ssi_clk",
.parent = &perclk[2], .parent = &perclk[2],
.round_rate = _clk_parent_round_rate, .round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate, .set_rate = _clk_parent_set_rate,
}; };
static struct clk rtc_clk = { static struct clk rtc_clk = {
.name = "rtc_clk",
.parent = &clk32, .parent = &clk32,
}; };
static struct clk *mxc_clks[] = { #define _REGISTER_CLOCK(d, n, c) \
&clk16m, { \
&clk32, .dev_id = d, \
&clk32_premult, .con_id = n, \
&prem_clk, .clk = &c, \
&system_clk, },
&mcu_clk, static struct clk_lookup lookups[] __initdata = {
&fclk, _REGISTER_CLOCK(NULL, "dma", dma_clk)
&hclk, _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)
&clk48m, _REGISTER_CLOCK(NULL, "mma", mma_clk)
&perclk[0], _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)
&perclk[1], _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
&perclk[2], _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk)
&clko_clk, _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk)
&dma_clk, _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk)
&csi_clk, _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
&mma_clk, _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk)
&usbd_clk, _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)
&gpt_clk, _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
&uart_clk, _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
&i2c_clk, _REGISTER_CLOCK(NULL, "ssi", ssi_clk)
&spi_clk, _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)
&sdhc_clk,
&lcdc_clk,
&mshc_clk,
&ssi_clk,
&rtc_clk,
}; };
int __init mx1_clocks_init(unsigned long fref) int __init mx1_clocks_init(unsigned long fref)
{ {
struct clk **clkp;
unsigned int reg; unsigned int reg;
int i;
/* disable clocks we are able to */ /* disable clocks we are able to */
__raw_writel(0, SCM_GCCR); __raw_writel(0, SCM_GCCR);
...@@ -620,13 +592,13 @@ int __init mx1_clocks_init(unsigned long fref) ...@@ -620,13 +592,13 @@ int __init mx1_clocks_init(unsigned long fref)
reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET; reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET;
clko_clk.parent = (struct clk *)clko_clocks[reg]; clko_clk.parent = (struct clk *)clko_clocks[reg];
for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) for (i = 0; i < ARRAY_SIZE(lookups); i++)
clk_register(*clkp); clkdev_add(&lookups[i]);
clk_enable(&hclk); clk_enable(&hclk);
clk_enable(&fclk); clk_enable(&fclk);
mxc_timer_init(&gpt_clk); mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT);
return 0; return 0;
} }
arch/arm/mach-mx1/devices.c
View file @ 590a94d9
...@@ -29,12 +29,11 @@ ...@@ -29,12 +29,11 @@
#include "devices.h" #include "devices.h"
static struct resource imx_csi_resources[] = { static struct resource imx_csi_resources[] = {
[0] = { {
.start = 0x00224000, .start = 0x00224000,
.end = 0x00224010, .end = 0x00224010,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = CSI_INT, .start = CSI_INT,
.end = CSI_INT, .end = CSI_INT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -55,12 +54,11 @@ struct platform_device imx_csi_device = { ...@@ -55,12 +54,11 @@ struct platform_device imx_csi_device = {
}; };
static struct resource imx_i2c_resources[] = { static struct resource imx_i2c_resources[] = {
[0] = { {
.start = 0x00217000, .start = 0x00217000,
.end = 0x00217010, .end = 0x00217010,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = I2C_INT, .start = I2C_INT,
.end = I2C_INT, .end = I2C_INT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -75,22 +73,19 @@ struct platform_device imx_i2c_device = { ...@@ -75,22 +73,19 @@ struct platform_device imx_i2c_device = {
}; };
static struct resource imx_uart1_resources[] = { static struct resource imx_uart1_resources[] = {
[0] = { {
.start = UART1_BASE_ADDR, .start = UART1_BASE_ADDR,
.end = UART1_BASE_ADDR + 0xD0, .end = UART1_BASE_ADDR + 0xD0,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = UART1_MINT_RX, .start = UART1_MINT_RX,
.end = UART1_MINT_RX, .end = UART1_MINT_RX,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[2] = {
.start = UART1_MINT_TX, .start = UART1_MINT_TX,
.end = UART1_MINT_TX, .end = UART1_MINT_TX,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[3] = {
.start = UART1_MINT_RTS, .start = UART1_MINT_RTS,
.end = UART1_MINT_RTS, .end = UART1_MINT_RTS,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -105,22 +100,19 @@ struct platform_device imx_uart1_device = { ...@@ -105,22 +100,19 @@ struct platform_device imx_uart1_device = {
}; };
static struct resource imx_uart2_resources[] = { static struct resource imx_uart2_resources[] = {
[0] = { {
.start = UART2_BASE_ADDR, .start = UART2_BASE_ADDR,
.end = UART2_BASE_ADDR + 0xD0, .end = UART2_BASE_ADDR + 0xD0,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = UART2_MINT_RX, .start = UART2_MINT_RX,
.end = UART2_MINT_RX, .end = UART2_MINT_RX,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[2] = {
.start = UART2_MINT_TX, .start = UART2_MINT_TX,
.end = UART2_MINT_TX, .end = UART2_MINT_TX,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[3] = {
.start = UART2_MINT_RTS, .start = UART2_MINT_RTS,
.end = UART2_MINT_RTS, .end = UART2_MINT_RTS,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -135,17 +127,15 @@ struct platform_device imx_uart2_device = { ...@@ -135,17 +127,15 @@ struct platform_device imx_uart2_device = {
}; };
static struct resource imx_rtc_resources[] = { static struct resource imx_rtc_resources[] = {
[0] = { {
.start = 0x00204000, .start = 0x00204000,
.end = 0x00204024, .end = 0x00204024,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = RTC_INT, .start = RTC_INT,
.end = RTC_INT, .end = RTC_INT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[2] = {
.start = RTC_SAMINT, .start = RTC_SAMINT,
.end = RTC_SAMINT, .end = RTC_SAMINT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -160,12 +150,11 @@ struct platform_device imx_rtc_device = { ...@@ -160,12 +150,11 @@ struct platform_device imx_rtc_device = {
}; };
static struct resource imx_wdt_resources[] = { static struct resource imx_wdt_resources[] = {
[0] = { {
.start = 0x00201000, .start = 0x00201000,
.end = 0x00201008, .end = 0x00201008,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = WDT_INT, .start = WDT_INT,
.end = WDT_INT, .end = WDT_INT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -180,42 +169,35 @@ struct platform_device imx_wdt_device = { ...@@ -180,42 +169,35 @@ struct platform_device imx_wdt_device = {
}; };
static struct resource imx_usb_resources[] = { static struct resource imx_usb_resources[] = {
[0] = { {
.start = 0x00212000, .start = 0x00212000,
.end = 0x00212148, .end = 0x00212148,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = USBD_INT0, .start = USBD_INT0,
.end = USBD_INT0, .end = USBD_INT0,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[2] = {
.start = USBD_INT1, .start = USBD_INT1,
.end = USBD_INT1, .end = USBD_INT1,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[3] = {
.start = USBD_INT2, .start = USBD_INT2,
.end = USBD_INT2, .end = USBD_INT2,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[4] = {
.start = USBD_INT3, .start = USBD_INT3,
.end = USBD_INT3, .end = USBD_INT3,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[5] = {
.start = USBD_INT4, .start = USBD_INT4,
.end = USBD_INT4, .end = USBD_INT4,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[6] = {
.start = USBD_INT5, .start = USBD_INT5,
.end = USBD_INT5, .end = USBD_INT5,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, }, {
[7] = {
.start = USBD_INT6, .start = USBD_INT6,
.end = USBD_INT6, .end = USBD_INT6,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -231,29 +213,26 @@ struct platform_device imx_usb_device = { ...@@ -231,29 +213,26 @@ struct platform_device imx_usb_device = {
/* GPIO port description */ /* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = { static struct mxc_gpio_port imx_gpio_ports[] = {
[0] = { {
.chip.label = "gpio-0", .chip.label = "gpio-0",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR),
.irq = GPIO_INT_PORTA, .irq = GPIO_INT_PORTA,
.virtual_irq_start = MXC_GPIO_IRQ_START .virtual_irq_start = MXC_GPIO_IRQ_START,
}, }, {
[1] = {
.chip.label = "gpio-1", .chip.label = "gpio-1",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
.irq = GPIO_INT_PORTB, .irq = GPIO_INT_PORTB,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
}, }, {
[2] = {
.chip.label = "gpio-2", .chip.label = "gpio-2",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
.irq = GPIO_INT_PORTC, .irq = GPIO_INT_PORTC,
.virtual_irq_start = MXC_GPIO_IRQ_START + 64 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
}, }, {
[3] = {
.chip.label = "gpio-3", .chip.label = "gpio-3",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
.irq = GPIO_INT_PORTD, .irq = GPIO_INT_PORTD,
.virtual_irq_start = MXC_GPIO_IRQ_START + 96 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
} }
}; };
......
arch/arm/mach-mx1/generic.c
View file @ 590a94d9
...@@ -41,6 +41,13 @@ static struct map_desc imx_io_desc[] __initdata = { ...@@ -41,6 +41,13 @@ static struct map_desc imx_io_desc[] __initdata = {
void __init mx1_map_io(void) void __init mx1_map_io(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX1); mxc_set_cpu_type(MXC_CPU_MX1);
mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
} }
void __init mx1_init_irq(void)
{
mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
}
arch/arm/mach-mx1/mx1ads.c
View file @ 590a94d9
...@@ -104,12 +104,10 @@ static struct imxi2c_platform_data mx1ads_i2c_data = { ...@@ -104,12 +104,10 @@ static struct imxi2c_platform_data mx1ads_i2c_data = {
static struct i2c_board_info mx1ads_i2c_devices[] = { static struct i2c_board_info mx1ads_i2c_devices[] = {
{ {
I2C_BOARD_INFO("pcf857x", 0x22), I2C_BOARD_INFO("pcf8575", 0x22),
.type = "pcf8575",
.platform_data = &pcf857x_data[0], .platform_data = &pcf857x_data[0],
}, { }, {
I2C_BOARD_INFO("pcf857x", 0x24), I2C_BOARD_INFO("pcf8575", 0x24),
.type = "pcf8575",
.platform_data = &pcf857x_data[1], .platform_data = &pcf857x_data[1],
}, },
}; };
...@@ -151,7 +149,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") ...@@ -151,7 +149,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
.io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx1_map_io, .map_io = mx1_map_io,
.init_irq = mxc_init_irq, .init_irq = mx1_init_irq,
.timer = &mx1ads_timer, .timer = &mx1ads_timer,
.init_machine = mx1ads_init, .init_machine = mx1ads_init,
MACHINE_END MACHINE_END
...@@ -161,7 +159,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS") ...@@ -161,7 +159,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
.io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx1_map_io, .map_io = mx1_map_io,
.init_irq = mxc_init_irq, .init_irq = mx1_init_irq,
.timer = &mx1ads_timer, .timer = &mx1ads_timer,
.init_machine = mx1ads_init, .init_machine = mx1ads_init,
MACHINE_END MACHINE_END
arch/arm/mach-mx1/scb9328.c
View file @ 590a94d9
...@@ -68,22 +68,20 @@ static struct dm9000_plat_data dm9000_platdata = { ...@@ -68,22 +68,20 @@ static struct dm9000_plat_data dm9000_platdata = {
* to gain access to address latch registers and the data path. * to gain access to address latch registers and the data path.
*/ */
static struct resource dm9000x_resources[] = { static struct resource dm9000x_resources[] = {
[0] = { {
.name = "address area", .name = "address area",
.start = IMX_CS5_PHYS, .start = IMX_CS5_PHYS,
.end = IMX_CS5_PHYS + 1, .end = IMX_CS5_PHYS + 1,
.flags = IORESOURCE_MEM /* address access */ .flags = IORESOURCE_MEM, /* address access */
}, }, {
[1] = {
.name = "data area", .name = "data area",
.start = IMX_CS5_PHYS + 4, .start = IMX_CS5_PHYS + 4,
.end = IMX_CS5_PHYS + 5, .end = IMX_CS5_PHYS + 5,
.flags = IORESOURCE_MEM /* data access */ .flags = IORESOURCE_MEM, /* data access */
}, }, {
[2] = {
.start = IRQ_GPIOC(3), .start = IRQ_GPIOC(3),
.end = IRQ_GPIOC(3), .end = IRQ_GPIOC(3),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
}, },
}; };
...@@ -154,7 +152,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328") ...@@ -154,7 +152,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
.io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc,
.boot_params = 0x08000100, .boot_params = 0x08000100,
.map_io = mx1_map_io, .map_io = mx1_map_io,
.init_irq = mxc_init_irq, .init_irq = mx1_init_irq,
.timer = &scb9328_timer, .timer = &scb9328_timer,
.init_machine = scb9328_init, .init_machine = scb9328_init,
MACHINE_END MACHINE_END
arch/arm/mach-mx2/Kconfig
View file @ 590a94d9
...@@ -53,6 +53,34 @@ config MACH_PCM970_BASEBOARD ...@@ -53,6 +53,34 @@ config MACH_PCM970_BASEBOARD
endchoice endchoice
config MACH_EUKREA_CPUIMX27
bool "Eukrea CPUIMX27 module"
depends on MACH_MX27
help
Include support for Eukrea CPUIMX27 platform. This includes
specific configurations for the module and its peripherals.
config MACH_EUKREA_CPUIMX27_USESDHC2
bool "CPUIMX27 integrates SDHC2 module"
depends on MACH_EUKREA_CPUIMX27
help
This adds support for the internal SDHC2 used on CPUIMX27 used
for wifi or eMMC.
choice
prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX27
default MACH_EUKREA_MBIMX27_BASEBOARD
config MACH_EUKREA_MBIMX27_BASEBOARD
prompt "Eukrea MBIMX27 development board"
bool
help
This adds board specific devices that can be found on Eukrea's
MBIMX27 evaluation board.
endchoice
config MACH_MX27_3DS config MACH_MX27_3DS
bool "MX27PDK platform" bool "MX27PDK platform"
depends on MACH_MX27 depends on MACH_MX27
...@@ -67,4 +95,11 @@ config MACH_MX27LITE ...@@ -67,4 +95,11 @@ config MACH_MX27LITE
Include support for MX27 LITEKIT platform. This includes specific Include support for MX27 LITEKIT platform. This includes specific
configurations for the board and its peripherals. configurations for the board and its peripherals.
config MACH_PCA100
bool "Phytec phyCARD-s (pca100)"
depends on MACH_MX27
help
Include support for phyCARD-s (aka pca100) platform. This
includes specific configurations for the module and its peripherals.
endif endif
arch/arm/mach-mx2/Makefile
View file @ 590a94d9
...@@ -17,4 +17,7 @@ obj-$(CONFIG_MACH_PCM038) += pcm038.o ...@@ -17,4 +17,7 @@ obj-$(CONFIG_MACH_PCM038) += pcm038.o
obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o
obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o
obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
obj-$(CONFIG_MACH_PCA100) += pca100.o
arch/arm/mach-mx2/clock_imx21.c
View file @ 590a94d9
...@@ -1004,6 +1004,6 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) ...@@ -1004,6 +1004,6 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_enable(&uart_clk[0]); clk_enable(&uart_clk[0]);
#endif #endif
mxc_timer_init(&gpt_clk[0]); mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
return 0; return 0;
} }
arch/arm/mach-mx2/clock_imx27.c
View file @ 590a94d9
...@@ -643,7 +643,14 @@ static struct clk_lookup lookups[] = { ...@@ -643,7 +643,14 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "cspi3", cspi3_clk) _REGISTER_CLOCK(NULL, "cspi3", cspi3_clk)
_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk) _REGISTER_CLOCK(NULL, "csi", csi_clk)
_REGISTER_CLOCK(NULL, "usb", usb_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)
_REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk)
_REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk)
_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1)
_REGISTER_CLOCK(NULL, "ssi1", ssi1_clk) _REGISTER_CLOCK(NULL, "ssi1", ssi1_clk)
_REGISTER_CLOCK(NULL, "ssi2", ssi2_clk) _REGISTER_CLOCK(NULL, "ssi2", ssi2_clk)
_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
...@@ -748,7 +755,7 @@ int __init mx27_clocks_init(unsigned long fref) ...@@ -748,7 +755,7 @@ int __init mx27_clocks_init(unsigned long fref)
clk_enable(&uart1_clk); clk_enable(&uart1_clk);
#endif #endif
mxc_timer_init(&gpt1_clk); mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
return 0; return 0;
} }
......
arch/arm/mach-mx2/devices.c
View file @ 590a94d9
This diff is collapsed.
arch/arm/mach-mx2/devices.h
View file @ 590a94d9
...@@ -4,7 +4,6 @@ extern struct platform_device mxc_gpt3; ...@@ -4,7 +4,6 @@ extern struct platform_device mxc_gpt3;
extern struct platform_device mxc_gpt4; extern struct platform_device mxc_gpt4;
extern struct platform_device mxc_gpt5; extern struct platform_device mxc_gpt5;
extern struct platform_device mxc_wdt; extern struct platform_device mxc_wdt;
extern struct platform_device mxc_irda_device;
extern struct platform_device mxc_uart_device0; extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1; extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2; extern struct platform_device mxc_uart_device2;
...@@ -20,3 +19,11 @@ extern struct platform_device mxc_i2c_device0; ...@@ -20,3 +19,11 @@ extern struct platform_device mxc_i2c_device0;
extern struct platform_device mxc_i2c_device1; extern struct platform_device mxc_i2c_device1;
extern struct platform_device mxc_sdhc_device0; extern struct platform_device mxc_sdhc_device0;
extern struct platform_device mxc_sdhc_device1; extern struct platform_device mxc_sdhc_device1;
extern struct platform_device mxc_otg_udc_device;
extern struct platform_device mxc_otg_host;
extern struct platform_device mxc_usbh1;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;
arch/arm/mach-mx2/eukrea_cpuimx27.c 0 → 100644
View file @ 590a94d9
/*
* Copyright (C) 2009 Eric Benard - eric@eukrea.com
*
* Based on pcm038.c which is :
* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/board-eukrea_cpuimx27.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/iomux.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include "devices.h"
static int eukrea_cpuimx27_pins[] = {
/* UART1 */
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
/* UART4 */
PB26_AF_UART4_RTS,
PB28_AF_UART4_TXD,
PB29_AF_UART4_CTS,
PB31_AF_UART4_RXD,
/* FEC */
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
PD2_AIN_FEC_TXD2,
PD3_AIN_FEC_TXD3,
PD4_AOUT_FEC_RX_ER,
PD5_AOUT_FEC_RXD1,
PD6_AOUT_FEC_RXD2,
PD7_AOUT_FEC_RXD3,
PD8_AF_FEC_MDIO,
PD9_AIN_FEC_MDC,
PD10_AOUT_FEC_CRS,
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
/* I2C1 */
PD17_PF_I2C_DATA,
PD18_PF_I2C_CLK,
/* SDHC2 */
PB4_PF_SD2_D0,
PB5_PF_SD2_D1,
PB6_PF_SD2_D2,
PB7_PF_SD2_D3,
PB8_PF_SD2_CMD,
PB9_PF_SD2_CLK,
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/* Quad UART's IRQ */
GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN,
#endif
};
static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
.width = 2,
};
static struct resource eukrea_cpuimx27_flash_resource = {
.start = 0xc0000000,
.end = 0xc3ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &eukrea_cpuimx27_flash_data,
},
.num_resources = 1,
.resource = &eukrea_cpuimx27_flash_resource,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
};
static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = {
.width = 1,
.hw_ecc = 1,
};
static struct platform_device *platform_devices[] __initdata = {
&eukrea_cpuimx27_nor_mtd_device,
&mxc_fec_device,
};
static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
.bitrate = 100000,
};
static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
{
I2C_BOARD_INFO("pcf8563", 0x51),
},
};
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
.irq = IRQ_GPIOB(23),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
.irq = IRQ_GPIOB(22),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
.irq = IRQ_GPIOB(27),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
.irq = IRQ_GPIOB(30),
.uartclk = 14745600,
.regshift = 1,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
}, {
}
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = serial_platform_data,
},
};
#endif
static void __init eukrea_cpuimx27_init(void)
{
mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info);
i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
/* SDHC2 can be used for Wifi */
mxc_register_device(&mxc_sdhc_device1, NULL);
/* in which case UART4 is also used for Bluetooth */
mxc_register_device(&mxc_uart_device3, &uart_pdata[1]);
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
platform_device_register(&serial_device);
#endif
#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
eukrea_mbimx27_baseboard_init();
#endif
}
static void __init eukrea_cpuimx27_timer_init(void)
{
mx27_clocks_init(26000000);
}
static struct sys_timer eukrea_cpuimx27_timer = {
.init = eukrea_cpuimx27_timer_init,
};
MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
.phys_io = AIPI_BASE_ADDR,
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mx27_init_irq,
.init_machine = eukrea_cpuimx27_init,
.timer = &eukrea_cpuimx27_timer,
MACHINE_END
arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c 0 → 100644
View file @ 590a94d9
/*
* Copyright (C) 2009 Eric Benard - eric@eukrea.com
*
* Based on pcm970-baseboard.c which is :
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/iomux.h>
#include <mach/imxfb.h>
#include <mach/hardware.h>
#include <mach/mmc.h>
#include <mach/imx-uart.h>
#include "devices.h"
static int eukrea_mbimx27_pins[] = {
/* UART2 */
PE3_PF_UART2_CTS,
PE4_PF_UART2_RTS,
PE6_PF_UART2_TXD,
PE7_PF_UART2_RXD,
/* UART3 */
PE8_PF_UART3_TXD,
PE9_PF_UART3_RXD,
PE10_PF_UART3_CTS,
PE11_PF_UART3_RTS,
/* UART4 */
PB26_AF_UART4_RTS,
PB28_AF_UART4_TXD,
PB29_AF_UART4_CTS,
PB31_AF_UART4_RXD,
/* SDHC1*/
PE18_PF_SD1_D0,
PE19_PF_SD1_D1,
PE20_PF_SD1_D2,
PE21_PF_SD1_D3,
PE22_PF_SD1_CMD,
PE23_PF_SD1_CLK,
/* display */
PA5_PF_LSCLK,
PA6_PF_LD0,
PA7_PF_LD1,
PA8_PF_LD2,
PA9_PF_LD3,
PA10_PF_LD4,
PA11_PF_LD5,
PA12_PF_LD6,
PA13_PF_LD7,
PA14_PF_LD8,
PA15_PF_LD9,
PA16_PF_LD10,
PA17_PF_LD11,
PA18_PF_LD12,
PA19_PF_LD13,
PA20_PF_LD14,
PA21_PF_LD15,
PA22_PF_LD16,
PA23_PF_LD17,
PA28_PF_HSYNC,
PA29_PF_VSYNC,
PA30_PF_CONTRAST,
PA31_PF_OE_ACD,
/* SPI1 */
PD28_PF_CSPI1_SS0,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
};
static struct gpio_led gpio_leds[] = {
{
.name = "led1",
.default_trigger = "heartbeat",
.active_low = 1,
.gpio = GPIO_PORTF | 16,
},
{
.name = "led2",
.default_trigger = "none",
.active_low = 1,
.gpio = GPIO_PORTF | 19,
},
{
.name = "backlight",
.default_trigger = "backlight",
.active_low = 0,
.gpio = GPIO_PORTE | 5,
},
};
static struct gpio_led_platform_data gpio_led_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
};
static struct platform_device leds_gpio = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_led_info,
},
};
static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
{
.mode = {
.name = "CMO-QGVA",
.refresh = 60,
.xres = 320,
.yres = 240,
.pixclock = 156000,
.hsync_len = 30,
.left_margin = 38,
.right_margin = 20,
.vsync_len = 3,
.upper_margin = 15,
.lower_margin = 4,
},
.pcr = 0xFAD08B80,
.bpp = 16,
},
};
static struct imx_fb_platform_data eukrea_mbimx27_fb_data = {
.mode = eukrea_mbimx27_modes,
.num_modes = ARRAY_SIZE(eukrea_mbimx27_modes),
.pwmr = 0x00A903FF,
.lscr1 = 0x00120300,
.dmacr = 0x00040060,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
},
{
.flags = IMXUART_HAVE_RTSCTS,
},
};
#if defined(CONFIG_TOUCHSCREEN_ADS7846)
|| defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
#define ADS7846_PENDOWN (GPIO_PORTD | 25)
static void ads7846_dev_init(void)
{
if (gpio_request(ADS7846_PENDOWN, "ADS7846 pendown") < 0) {
printk(KERN_ERR "can't get ads746 pen down GPIO\n");
return;
}
gpio_direction_input(ADS7846_PENDOWN);
}
static int ads7846_get_pendown_state(void)
{
return !gpio_get_value(ADS7846_PENDOWN);
}
static struct ads7846_platform_data ads7846_config __initdata = {
.get_pendown_state = ads7846_get_pendown_state,
.keep_vref_on = 1,
};
static struct spi_board_info eukrea_mbimx27_spi_board_info[] __initdata = {
[0] = {
.modalias = "ads7846",
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 1500000,
.irq = IRQ_GPIOD(25),
.platform_data = &ads7846_config,
.mode = SPI_MODE_2,
},
};
static int eukrea_mbimx27_spi_cs[] = {GPIO_PORTD | 28};
static struct spi_imx_master eukrea_mbimx27_spi_0_data = {
.chipselect = eukrea_mbimx27_spi_cs,
.num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs),
};
#endif
static struct platform_device *platform_devices[] __initdata = {
&leds_gpio,
};
/*
* system init for baseboard usage. Will be called by cpuimx27 init.
*
* Add platform devices present on this baseboard and init
* them from CPU side as far as required to use them later on
*/
void __init eukrea_mbimx27_baseboard_init(void)
{
mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins,
ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27");
mxc_register_device(&mxc_uart_device1, &uart_pdata[0]);
mxc_register_device(&mxc_uart_device2, &uart_pdata[1]);
mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data);
mxc_register_device(&mxc_sdhc_device0, NULL);
#if defined(CONFIG_TOUCHSCREEN_ADS7846)
|| defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
/* SPI and ADS7846 Touchscreen controler init */
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTD | 25 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_spi_device0, &eukrea_mbimx27_spi_0_data);
spi_register_board_info(eukrea_mbimx27_spi_board_info,
ARRAY_SIZE(eukrea_mbimx27_spi_board_info));
ads7846_dev_init();
#endif
/* Leds configuration */
mxc_gpio_mode(GPIO_PORTF | 16 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTF | 19 | GPIO_GPIO | GPIO_OUT);
/* Backlight */
mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
arch/arm/mach-mx2/generic.c
View file @ 590a94d9
...@@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = { ...@@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
void __init mx21_map_io(void) void __init mx21_map_io(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX21); mxc_set_cpu_type(MXC_CPU_MX21);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
...@@ -79,7 +80,18 @@ void __init mx21_map_io(void) ...@@ -79,7 +80,18 @@ void __init mx21_map_io(void)
void __init mx27_map_io(void) void __init mx27_map_io(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX27); mxc_set_cpu_type(MXC_CPU_MX27);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
void __init mx27_init_irq(void)
{
mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
}
void __init mx21_init_irq(void)
{
mx27_init_irq();
}
arch/arm/mach-mx2/mx21ads.c
View file @ 590a94d9
...@@ -164,23 +164,31 @@ static void mx21ads_fb_exit(struct platform_device *pdev) ...@@ -164,23 +164,31 @@ static void mx21ads_fb_exit(struct platform_device *pdev)
* Connected is a portrait Sharp-QVGA display * Connected is a portrait Sharp-QVGA display
* of type: LQ035Q7DB02 * of type: LQ035Q7DB02
*/ */
static struct imx_fb_platform_data mx21ads_fb_data = { static struct imx_fb_videomode mx21ads_modes[] = {
.pixclock = 188679, /* in ps */ {
.mode = {
.name = "Sharp-LQ035Q7",
.refresh = 60,
.xres = 240, .xres = 240,
.yres = 320, .yres = 320,
.pixclock = 188679, /* in ps (5.3MHz) */
.bpp = 16,
.hsync_len = 2, .hsync_len = 2,
.left_margin = 6, .left_margin = 6,
.right_margin = 16, .right_margin = 16,
.vsync_len = 1, .vsync_len = 1,
.upper_margin = 8, .upper_margin = 8,
.lower_margin = 10, .lower_margin = 10,
.fixed_screen_cpu = 0, },
.pcr = 0xfb108bc7,
.bpp = 16,
},
};
static struct imx_fb_platform_data mx21ads_fb_data = {
.mode = mx21ads_modes,
.num_modes = ARRAY_SIZE(mx21ads_modes),
.pcr = 0xFB108BC7, .pwmr = 0x00a903ff,
.pwmr = 0x00A901ff,
.lscr1 = 0x00120300, .lscr1 = 0x00120300,
.dmacr = 0x00020008, .dmacr = 0x00020008,
...@@ -280,7 +288,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS") ...@@ -280,7 +288,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx21ads_map_io, .map_io = mx21ads_map_io,
.init_irq = mxc_init_irq, .init_irq = mx21_init_irq,
.init_machine = mx21ads_board_init, .init_machine = mx21ads_board_init,
.timer = &mx21ads_timer, .timer = &mx21ads_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx2/mx27ads.c
View file @ 590a94d9
...@@ -183,20 +183,29 @@ void lcd_power(int on) ...@@ -183,20 +183,29 @@ void lcd_power(int on)
__raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG); __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
} }
static struct imx_fb_platform_data mx27ads_fb_data = { static struct imx_fb_videomode mx27ads_modes[] = {
.pixclock = 188679, {
.mode = {
.name = "Sharp-LQ035Q7",
.refresh = 60,
.xres = 240, .xres = 240,
.yres = 320, .yres = 320,
.pixclock = 188679, /* in ps (5.3MHz) */
.bpp = 16,
.hsync_len = 1, .hsync_len = 1,
.left_margin = 9, .left_margin = 9,
.right_margin = 16, .right_margin = 16,
.vsync_len = 1, .vsync_len = 1,
.upper_margin = 7, .upper_margin = 7,
.lower_margin = 9, .lower_margin = 9,
.fixed_screen_cpu = 0, },
.bpp = 16,
.pcr = 0xFB008BC0,
},
};
static struct imx_fb_platform_data mx27ads_fb_data = {
.mode = mx27ads_modes,
.num_modes = ARRAY_SIZE(mx27ads_modes),
/* /*
* - HSYNC active high * - HSYNC active high
...@@ -207,7 +216,6 @@ static struct imx_fb_platform_data mx27ads_fb_data = { ...@@ -207,7 +216,6 @@ static struct imx_fb_platform_data mx27ads_fb_data = {
* - data enable low active * - data enable low active
* - enable sharp mode * - enable sharp mode
*/ */
.pcr = 0xFB008BC0,
.pwmr = 0x00A903FF, .pwmr = 0x00A903FF,
.lscr1 = 0x00120300, .lscr1 = 0x00120300,
.dmacr = 0x00020010, .dmacr = 0x00020010,
...@@ -330,7 +338,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS") ...@@ -330,7 +338,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27ads_map_io, .map_io = mx27ads_map_io,
.init_irq = mxc_init_irq, .init_irq = mx27_init_irq,
.init_machine = mx27ads_board_init, .init_machine = mx27ads_board_init,
.timer = &mx27ads_timer, .timer = &mx27ads_timer,
MACHINE_END MACHINE_END
......
arch/arm/mach-mx2/mx27lite.c
View file @ 590a94d9
...@@ -89,7 +89,7 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") ...@@ -89,7 +89,7 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io, .map_io = mx27_map_io,
.init_irq = mxc_init_irq, .init_irq = mx27_init_irq,
.init_machine = mx27lite_init, .init_machine = mx27lite_init,
.timer = &mx27lite_timer, .timer = &mx27lite_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx2/mx27pdk.c
View file @ 590a94d9
...@@ -89,7 +89,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") ...@@ -89,7 +89,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io, .map_io = mx27_map_io,
.init_irq = mxc_init_irq, .init_irq = mx27_init_irq,
.init_machine = mx27pdk_init, .init_machine = mx27pdk_init,
.timer = &mx27pdk_timer, .timer = &mx27pdk_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx2/pca100.c 0 → 100644
View file @ 590a94d9
/*
* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
* Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux.h>
#include <mach/i2c.h>
#include <asm/mach/time.h>
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
#include <mach/spi.h>
#endif
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/irqs.h>
#include <mach/mmc.h>
#include "devices.h"
static int pca100_pins[] = {
/* UART1 */
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
/* SDHC */
PB4_PF_SD2_D0,
PB5_PF_SD2_D1,
PB6_PF_SD2_D2,
PB7_PF_SD2_D3,
PB8_PF_SD2_CMD,
PB9_PF_SD2_CLK,
/* FEC */
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
PD2_AIN_FEC_TXD2,
PD3_AIN_FEC_TXD3,
PD4_AOUT_FEC_RX_ER,
PD5_AOUT_FEC_RXD1,
PD6_AOUT_FEC_RXD2,
PD7_AOUT_FEC_RXD3,
PD8_AF_FEC_MDIO,
PD9_AIN_FEC_MDC,
PD10_AOUT_FEC_CRS,
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
/* SSI1 */
PC20_PF_SSI1_FS,
PC21_PF_SSI1_RXD,
PC22_PF_SSI1_TXD,
PC23_PF_SSI1_CLK,
/* onboard I2C */
PC5_PF_I2C2_SDA,
PC6_PF_I2C2_SCL,
/* external I2C */
PD17_PF_I2C_DATA,
PD18_PF_I2C_CLK,
/* SPI1 */
PD25_PF_CSPI1_RDY,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
};
static struct imxuart_platform_data uart_pdata = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data pca100_nand_board_info = {
.width = 1,
.hw_ecc = 1,
};
static struct platform_device *platform_devices[] __initdata = {
&mxc_w1_master_device,
&mxc_fec_device,
};
static struct imxi2c_platform_data pca100_i2c_1_data = {
.bitrate = 100000,
};
static struct at24_platform_data board_eeprom = {
.byte_len = 4096,
.page_size = 32,
.flags = AT24_FLAG_ADDR16,
};
static struct i2c_board_info pca100_i2c_devices[] = {
{
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
.platform_data = &board_eeprom,
}, {
I2C_BOARD_INFO("rtc-pcf8563", 0x51),
.type = "pcf8563"
}, {
I2C_BOARD_INFO("lm75", 0x4a),
.type = "lm75"
}
};
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
static struct spi_eeprom at25320 = {
.name = "at25320an",
.byte_len = 4096,
.page_size = 32,
.flags = EE_ADDR2,
};
static struct spi_board_info pca100_spi_board_info[] __initdata = {
{
.modalias = "at25",
.max_speed_hz = 30000,
.bus_num = 0,
.chip_select = 1,
.platform_data = &at25320,
},
};
static int pca100_spi_cs[] = {GPIO_PORTD + 28, GPIO_PORTD + 27};
static struct spi_imx_master pca100_spi_0_data = {
.chipselect = pca100_spi_cs,
.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
};
#endif
static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = request_irq(IRQ_GPIOC(29), detect_irq,
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
"imx-mmc-detect", data);
if (ret)
printk(KERN_ERR
"pca100: Failed to reuest irq for sd/mmc detection\n");
return ret;
}
static void pca100_sdhc2_exit(struct device *dev, void *data)
{
free_irq(IRQ_GPIOC(29), data);
}
static struct imxmmc_platform_data sdhc_pdata = {
.init = pca100_sdhc2_init,
.exit = pca100_sdhc2_exit,
};
static void __init pca100_init(void)
{
int ret;
ret = mxc_gpio_setup_multiple_pins(pca100_pins,
ARRAY_SIZE(pca100_pins), "PCA100");
if (ret)
printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
mxc_register_device(&mxc_nand_device, &pca100_nand_board_info);
/* only the i2c master 1 is used on this CPU card */
i2c_register_board_info(1, pca100_i2c_devices,
ARRAY_SIZE(pca100_i2c_devices));
mxc_register_device(&mxc_i2c_device1, &pca100_i2c_1_data);
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_OUT);
/* GPIO0_IRQ */
mxc_gpio_mode(GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN);
/* GPIO1_IRQ */
mxc_gpio_mode(GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN);
/* GPIO2_IRQ */
mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN);
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
spi_register_board_info(pca100_spi_board_info,
ARRAY_SIZE(pca100_spi_board_info));
mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
#endif
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
static void __init pca100_timer_init(void)
{
mx27_clocks_init(26000000);
}
static struct sys_timer pca100_timer = {
.init = pca100_timer_init,
};
MACHINE_START(PCA100, "phyCARD-i.MX27")
.phys_io = AIPI_BASE_ADDR,
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io,
.init_irq = mxc_init_irq,
.init_machine = pca100_init,
.timer = &pca100_timer,
MACHINE_END
arch/arm/mach-mx2/pcm038.c
View file @ 590a94d9
...@@ -186,17 +186,13 @@ static struct at24_platform_data board_eeprom = { ...@@ -186,17 +186,13 @@ static struct at24_platform_data board_eeprom = {
}; };
static struct i2c_board_info pcm038_i2c_devices[] = { static struct i2c_board_info pcm038_i2c_devices[] = {
[0] = { {
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
.platform_data = &board_eeprom, .platform_data = &board_eeprom,
}, }, {
[1] = { I2C_BOARD_INFO("pcf8563", 0x51),
I2C_BOARD_INFO("rtc-pcf8563", 0x51), }, {
.type = "pcf8563"
},
[2] = {
I2C_BOARD_INFO("lm75", 0x4a), I2C_BOARD_INFO("lm75", 0x4a),
.type = "lm75"
} }
}; };
...@@ -220,6 +216,9 @@ static void __init pcm038_init(void) ...@@ -220,6 +216,9 @@ static void __init pcm038_init(void)
mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
/* PE18 for user-LED D40 */
mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
#ifdef CONFIG_MACH_PCM970_BASEBOARD #ifdef CONFIG_MACH_PCM970_BASEBOARD
...@@ -241,7 +240,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27") ...@@ -241,7 +240,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx27_map_io, .map_io = mx27_map_io,
.init_irq = mxc_init_irq, .init_irq = mx27_init_irq,
.init_machine = pcm038_init, .init_machine = pcm038_init,
.timer = &pcm038_timer, .timer = &pcm038_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx2/pcm970-baseboard.c
View file @ 590a94d9
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/can/platform/sja1000.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
...@@ -125,25 +126,21 @@ static struct imxmmc_platform_data sdhc_pdata = { ...@@ -125,25 +126,21 @@ static struct imxmmc_platform_data sdhc_pdata = {
.exit = pcm970_sdhc2_exit, .exit = pcm970_sdhc2_exit,
}; };
/* static struct imx_fb_videomode pcm970_modes[] = {
* Connected is a portrait Sharp-QVGA display {
* of type: LQ035Q7DH06 .mode = {
*/ .name = "Sharp-LQ035Q7",
static struct imx_fb_platform_data pcm038_fb_data = { .refresh = 60,
.pixclock = 188679, /* in ps (5.3MHz) */
.xres = 240, .xres = 240,
.yres = 320, .yres = 320,
.pixclock = 188679, /* in ps (5.3MHz) */
.bpp = 16,
.hsync_len = 7, .hsync_len = 7,
.left_margin = 5, .left_margin = 5,
.right_margin = 16, .right_margin = 16,
.vsync_len = 1, .vsync_len = 1,
.upper_margin = 7, .upper_margin = 7,
.lower_margin = 9, .lower_margin = 9,
.fixed_screen_cpu = 0, },
/* /*
* - HSYNC active high * - HSYNC active high
* - VSYNC active high * - VSYNC active high
...@@ -153,12 +150,72 @@ static struct imx_fb_platform_data pcm038_fb_data = { ...@@ -153,12 +150,72 @@ static struct imx_fb_platform_data pcm038_fb_data = {
* - data enable low active * - data enable low active
* - enable sharp mode * - enable sharp mode
*/ */
.pcr = 0xFA0080C0, .pcr = 0xF00080C0,
.bpp = 16,
}, {
.mode = {
.name = "TX090",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 38255,
.left_margin = 144,
.right_margin = 0,
.upper_margin = 7,
.lower_margin = 40,
.hsync_len = 96,
.vsync_len = 1,
},
/*
* - HSYNC active low (1 << 22)
* - VSYNC active low (1 << 23)
* - clk notenabled while idle
* - clock not inverted
* - data not inverted
* - data enable low active
* - enable sharp mode
*/
.pcr = 0xF0008080 | (1<<22) | (1<<23) | (1<<19),
.bpp = 32,
},
};
static struct imx_fb_platform_data pcm038_fb_data = {
.mode = pcm970_modes,
.num_modes = ARRAY_SIZE(pcm970_modes),
.pwmr = 0x00A903FF, .pwmr = 0x00A903FF,
.lscr1 = 0x00120300, .lscr1 = 0x00120300,
.dmacr = 0x00020010, .dmacr = 0x00020010,
}; };
static struct resource pcm970_sja1000_resources[] = {
{
.start = CS4_BASE_ADDR,
.end = CS4_BASE_ADDR + 0x100 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_GPIOE(19),
.end = IRQ_GPIOE(19),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
struct sja1000_platform_data pcm970_sja1000_platform_data = {
.clock = 16000000 / 2,
.ocr = 0x40 | 0x18,
.cdr = 0x40,
};
static struct platform_device pcm970_sja1000 = {
.name = "sja1000_platform",
.dev = {
.platform_data = &pcm970_sja1000_platform_data,
},
.resource = pcm970_sja1000_resources,
.num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
};
/* /*
* system init for baseboard usage. Will be called by pcm038 init. * system init for baseboard usage. Will be called by pcm038 init.
* *
...@@ -172,4 +229,5 @@ void __init pcm970_baseboard_init(void) ...@@ -172,4 +229,5 @@ void __init pcm970_baseboard_init(void)
mxc_register_device(&mxc_fb_device, &pcm038_fb_data); mxc_register_device(&mxc_fb_device, &pcm038_fb_data);
mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
platform_device_register(&pcm970_sja1000);
} }
arch/arm/mach-mx25/Kconfig 0 → 100644
View file @ 590a94d9
if ARCH_MX25
comment "MX25 platforms:"
config MACH_MX25_3DS
select ARCH_MXC_IOMUX_V3
bool "Support MX25PDK (3DS) Platform"
endif
arch/arm/mach-mx25/Makefile 0 → 100644
View file @ 590a94d9
obj-y := mm.o devices.o
obj-$(CONFIG_ARCH_MX25) += clock.o
obj-$(CONFIG_MACH_MX25_3DS) += mx25pdk.o
arch/arm/mach-mx25/Makefile.boot 0 → 100644
View file @ 590a94d9
zreladdr-y := 0x80008000
params_phys-y := 0x80000100
initrd_phys-y := 0x80800000
arch/arm/mach-mx25/clock.c 0 → 100644
View file @ 590a94d9
/*
* Copyright (C) 2009 by Sascha Hauer, Pengutronix
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <asm/clkdev.h>
#include <mach/clock.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/mx25.h>
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
#define CCM_MPCTL 0x00
#define CCM_UPCTL 0x04
#define CCM_CCTL 0x08
#define CCM_CGCR0 0x0C
#define CCM_CGCR1 0x10
#define CCM_CGCR2 0x14
#define CCM_PCDR0 0x18
#define CCM_PCDR1 0x1C
#define CCM_PCDR2 0x20
#define CCM_PCDR3 0x24
#define CCM_RCSR 0x28
#define CCM_CRDR 0x2C
#define CCM_DCVR0 0x30
#define CCM_DCVR1 0x34
#define CCM_DCVR2 0x38
#define CCM_DCVR3 0x3c
#define CCM_LTR0 0x40
#define CCM_LTR1 0x44
#define CCM_LTR2 0x48
#define CCM_LTR3 0x4c
static unsigned long get_rate_mpll(void)
{
ulong mpctl = __raw_readl(CRM_BASE + CCM_MPCTL);
return mxc_decode_pll(mpctl, 24000000);
}
static unsigned long get_rate_upll(void)
{
ulong mpctl = __raw_readl(CRM_BASE + CCM_UPCTL);
return mxc_decode_pll(mpctl, 24000000);
}
unsigned long get_rate_arm(struct clk *clk)
{
unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
unsigned long rate = get_rate_mpll();
if (cctl & (1 << 14))
rate = (rate * 3) >> 1;
return rate / ((cctl >> 30) + 1);
}
static unsigned long get_rate_ahb(struct clk *clk)
{
unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
return get_rate_arm(NULL) / (((cctl >> 28) & 0x3) + 1);
}
static unsigned long get_rate_ipg(struct clk *clk)
{
return get_rate_ahb(NULL) >> 1;
}
static unsigned long get_rate_per(int per)
{
unsigned long ofs = (per & 0x3) * 8;
unsigned long reg = per & ~0x3;
unsigned long val = (readl(CRM_BASE + CCM_PCDR0 + reg) >> ofs) & 0x3f;
unsigned long fref;
if (readl(CRM_BASE + 0x64) & (1 << per))
fref = get_rate_upll();
else
fref = get_rate_ipg(NULL);
return fref / (val + 1);
}
static unsigned long get_rate_uart(struct clk *clk)
{
return get_rate_per(15);
}
static unsigned long get_rate_i2c(struct clk *clk)
{
return get_rate_per(6);
}
static unsigned long get_rate_nfc(struct clk *clk)
{
return get_rate_per(8);
}
static unsigned long get_rate_otg(struct clk *clk)
{
return 48000000; /* FIXME */
}
static int clk_cgcr_enable(struct clk *clk)
{
u32 reg;
reg = __raw_readl(clk->enable_reg);
reg |= 1 << clk->enable_shift;
__raw_writel(reg, clk->enable_reg);
return 0;
}
static void clk_cgcr_disable(struct clk *clk)
{
u32 reg;
reg = __raw_readl(clk->enable_reg);
reg &= ~(1 << clk->enable_shift);
__raw_writel(reg, clk->enable_reg);
}
#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
static struct clk name = { \
.id = i, \
.enable_reg = CRM_BASE + er, \
.enable_shift = es, \
.get_rate = gr, \
.set_rate = sr, \
.enable = clk_cgcr_enable, \
.disable = clk_cgcr_disable, \
}
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL);
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL);
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL);
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL);
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL);
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL);
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL);
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
#define _REGISTER_CLOCK(d, n, c) \
{ \
.dev_id = d, \
.con_id = n, \
.clk = &c, \
},
static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
_REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
_REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk)
_REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk)
_REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
_REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
_REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
_REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
_REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)
_REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
_REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
_REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
_REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
_REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
};
int __init mx25_clocks_init(unsigned long fref)
{
int i;
for (i = 0; i < ARRAY_SIZE(lookups); i++)
clkdev_add(&lookups[i]);
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
return 0;
}
arch/arm/mach-mx25/devices.c 0 → 100644
View file @ 590a94d9
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <mach/mx25.h>
#include <mach/irqs.h>
static struct resource uart0[] = {
{
.start = 0x43f90000,
.end = 0x43f93fff,
.flags = IORESOURCE_MEM,
}, {
.start = 45,
.end = 45,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device0 = {
.name = "imx-uart",
.id = 0,
.resource = uart0,
.num_resources = ARRAY_SIZE(uart0),
};
static struct resource uart1[] = {
{
.start = 0x43f94000,
.end = 0x43f97fff,
.flags = IORESOURCE_MEM,
}, {
.start = 32,
.end = 32,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device1 = {
.name = "imx-uart",
.id = 1,
.resource = uart1,
.num_resources = ARRAY_SIZE(uart1),
};
static struct resource uart2[] = {
{
.start = 0x5000c000,
.end = 0x5000ffff,
.flags = IORESOURCE_MEM,
}, {
.start = 18,
.end = 18,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device2 = {
.name = "imx-uart",
.id = 2,
.resource = uart2,
.num_resources = ARRAY_SIZE(uart2),
};
static struct resource uart3[] = {
{
.start = 0x50008000,
.end = 0x5000bfff,
.flags = IORESOURCE_MEM,
}, {
.start = 5,
.end = 5,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device3 = {
.name = "imx-uart",
.id = 3,
.resource = uart3,
.num_resources = ARRAY_SIZE(uart3),
};
static struct resource uart4[] = {
{
.start = 0x5002c000,
.end = 0x5002ffff,
.flags = IORESOURCE_MEM,
}, {
.start = 40,
.end = 40,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device4 = {
.name = "imx-uart",
.id = 4,
.resource = uart4,
.num_resources = ARRAY_SIZE(uart4),
};
#define MX25_OTG_BASE_ADDR 0x53FF4000
static u64 otg_dmamask = DMA_BIT_MASK(32);
static struct resource mxc_otg_resources[] = {
{
.start = MX25_OTG_BASE_ADDR,
.end = MX25_OTG_BASE_ADDR + 0x1ff,
.flags = IORESOURCE_MEM,
}, {
.start = 37,
.end = 37,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_otg = {
.name = "mxc-ehci",
.id = 0,
.dev = {
.coherent_dma_mask = 0xffffffff,
.dma_mask = &otg_dmamask,
},
.resource = mxc_otg_resources,
.num_resources = ARRAY_SIZE(mxc_otg_resources),
};
/* OTG gadget device */
struct platform_device otg_udc_device = {
.name = "fsl-usb2-udc",
.id = -1,
.dev = {
.dma_mask = &otg_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = mxc_otg_resources,
.num_resources = ARRAY_SIZE(mxc_otg_resources),
};
static u64 usbh2_dmamask = DMA_BIT_MASK(32);
static struct resource mxc_usbh2_resources[] = {
{
.start = MX25_OTG_BASE_ADDR + 0x400,
.end = MX25_OTG_BASE_ADDR + 0x5ff,
.flags = IORESOURCE_MEM,
}, {
.start = 35,
.end = 35,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_usbh2 = {
.name = "mxc-ehci",
.id = 1,
.dev = {
.coherent_dma_mask = 0xffffffff,
.dma_mask = &usbh2_dmamask,
},
.resource = mxc_usbh2_resources,
.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
};
static struct resource mxc_spi_resources0[] = {
{
.start = 0x43fa4000,
.end = 0x43fa7fff,
.flags = IORESOURCE_MEM,
}, {
.start = 14,
.end = 14,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device0 = {
.name = "spi_imx",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_spi_resources0),
.resource = mxc_spi_resources0,
};
static struct resource mxc_spi_resources1[] = {
{
.start = 0x50010000,
.end = 0x50013fff,
.flags = IORESOURCE_MEM,
}, {
.start = 13,
.end = 13,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device1 = {
.name = "spi_imx",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_spi_resources1),
.resource = mxc_spi_resources1,
};
static struct resource mxc_spi_resources2[] = {
{
.start = 0x50004000,
.end = 0x50007fff,
.flags = IORESOURCE_MEM,
}, {
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device2 = {
.name = "spi_imx",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_spi_resources2),
.resource = mxc_spi_resources2,
};
static struct resource mxc_pwm_resources0[] = {
{
.start = 0x53fe0000,
.end = 0x53fe3fff,
.flags = IORESOURCE_MEM,
}, {
.start = 26,
.end = 26,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_pwm_device0 = {
.name = "mxc_pwm",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_pwm_resources0),
.resource = mxc_pwm_resources0,
};
static struct resource mxc_pwm_resources1[] = {
{
.start = 0x53fa0000,
.end = 0x53fa3fff,
.flags = IORESOURCE_MEM,
}, {
.start = 36,
.end = 36,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_pwm_device1 = {
.name = "mxc_pwm",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_pwm_resources1),
.resource = mxc_pwm_resources1,
};
static struct resource mxc_pwm_resources2[] = {
{
.start = 0x53fa8000,
.end = 0x53fabfff,
.flags = IORESOURCE_MEM,
}, {
.start = 41,
.end = 41,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_pwm_device2 = {
.name = "mxc_pwm",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_pwm_resources2),
.resource = mxc_pwm_resources2,
};
static struct resource mxc_keypad_resources[] = {
{
.start = 0x43fa8000,
.end = 0x43fabfff,
.flags = IORESOURCE_MEM,
}, {
.start = 24,
.end = 24,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_keypad_device = {
.name = "mxc-keypad",
.id = -1,
.num_resources = ARRAY_SIZE(mxc_keypad_resources),
.resource = mxc_keypad_resources,
};
static struct resource mxc_pwm_resources3[] = {
{
.start = 0x53fc8000,
.end = 0x53fcbfff,
.flags = IORESOURCE_MEM,
}, {
.start = 42,
.end = 42,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_pwm_device3 = {
.name = "mxc_pwm",
.id = 3,
.num_resources = ARRAY_SIZE(mxc_pwm_resources3),
.resource = mxc_pwm_resources3,
};
static struct resource mxc_i2c_1_resources[] = {
{
.start = 0x43f80000,
.end = 0x43f83fff,
.flags = IORESOURCE_MEM,
}, {
.start = 3,
.end = 3,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device0 = {
.name = "imx-i2c",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
.resource = mxc_i2c_1_resources,
};
static struct resource mxc_i2c_2_resources[] = {
{
.start = 0x43f98000,
.end = 0x43f9bfff,
.flags = IORESOURCE_MEM,
}, {
.start = 4,
.end = 4,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device1 = {
.name = "imx-i2c",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
.resource = mxc_i2c_2_resources,
};
static struct resource mxc_i2c_3_resources[] = {
{
.start = 0x43f84000,
.end = 0x43f87fff,
.flags = IORESOURCE_MEM,
}, {
.start = 10,
.end = 10,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device2 = {
.name = "imx-i2c",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_i2c_3_resources),
.resource = mxc_i2c_3_resources,
};
static struct mxc_gpio_port imx_gpio_ports[] = {
{
.chip.label = "gpio-0",
.base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT,
.irq = 52,
.virtual_irq_start = MXC_GPIO_IRQ_START,
}, {
.chip.label = "gpio-1",
.base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT,
.irq = 51,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
}, {
.chip.label = "gpio-2",
.base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT,
.irq = 16,
.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
}, {
.chip.label = "gpio-3",
.base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT,
.irq = 23,
.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
}
};
int __init mxc_register_gpios(void)
{
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
}
arch/arm/mach-mx25/devices.h 0 → 100644
View file @ 590a94d9
extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_uart_device3;
extern struct platform_device mxc_uart_device4;
extern struct platform_device mxc_otg;
extern struct platform_device otg_udc_device;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;
extern struct platform_device mxc_pwm_device0;
extern struct platform_device mxc_pwm_device1;
extern struct platform_device mxc_pwm_device2;
extern struct platform_device mxc_pwm_device3;
extern struct platform_device mxc_keypad_device;
extern struct platform_device mxc_i2c_device0;
extern struct platform_device mxc_i2c_device1;
extern struct platform_device mxc_i2c_device2;
arch/arm/mach-mx25/mm.c 0 → 100644
View file @ 590a94d9
/*
* Copyright (C) 1999,2000 Arm Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* - add MX31 specific definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/err.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/mx25.h>
#include <mach/iomux-v3.h>
/*
* This table defines static virtual address mappings for I/O regions.
* These are the mappings common across all MX3 boards.
*/
static struct map_desc mxc_io_desc[] __initdata = {
{
.virtual = MX25_AVIC_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR),
.length = MX25_AVIC_SIZE,
.type = MT_DEVICE_NONSHARED
}, {
.virtual = MX25_AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
.length = MX25_AIPS1_SIZE,
.type = MT_DEVICE_NONSHARED
}, {
.virtual = MX25_AIPS2_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
.length = MX25_AIPS2_SIZE,
.type = MT_DEVICE_NONSHARED
},
};
/*
* This function initializes the memory map. It is called during the
* system startup to create static physical to virtual memory mappings
* for the IO modules.
*/
void __init mx25_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX25);
mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
void __init mx25_init_irq(void)
{
mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
}
arch/arm/mach-mx25/mx25pdk.c 0 → 100644
View file @ 590a94d9
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/mx25.h>
#include <mach/mxc_nand.h>
#include "devices.h"
#include <mach/iomux-v3.h>
static struct imxuart_platform_data uart_pdata = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data nand_board_info = {
.width = 1,
.hw_ecc = 1,
};
static void __init mx25pdk_init(void)
{
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_usbh2, NULL);
mxc_register_device(&mxc_nand_device, &nand_board_info);
}
static void __init mx25pdk_timer_init(void)
{
mx25_clocks_init(26000000);
}
static struct sys_timer mx25pdk_timer = {
.init = mx25pdk_timer_init,
};
MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
/* Maintainer: Freescale Semiconductor, Inc. */
.phys_io = MX25_AIPS1_BASE_ADDR,
.io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx25_map_io,
.init_irq = mx25_init_irq,
.init_machine = mx25pdk_init,
.timer = &mx25pdk_timer,
MACHINE_END
arch/arm/mach-mx3/armadillo5x0.c
View file @ 590a94d9
...@@ -352,7 +352,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") ...@@ -352,7 +352,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.map_io = mx31_map_io, .map_io = mx31_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.timer = &armadillo5x0_timer, .timer = &armadillo5x0_timer,
.init_machine = armadillo5x0_init, .init_machine = armadillo5x0_init,
MACHINE_END MACHINE_END
arch/arm/mach-mx3/clock-imx35.c
View file @ 590a94d9
...@@ -273,6 +273,19 @@ static unsigned long get_rate_csi(struct clk *clk) ...@@ -273,6 +273,19 @@ static unsigned long get_rate_csi(struct clk *clk)
return rate / get_3_3_div((pdr2 >> 16) & 0x3f); return rate / get_3_3_div((pdr2 >> 16) & 0x3f);
} }
static unsigned long get_rate_otg(struct clk *clk)
{
unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
unsigned long rate;
if (pdr4 & (1 << 9))
rate = get_rate_arm();
else
rate = get_rate_ppll();
return rate / get_3_3_div((pdr4 >> 22) & 0x3f);
}
static unsigned long get_rate_ipg_per(struct clk *clk) static unsigned long get_rate_ipg_per(struct clk *clk)
{ {
unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
...@@ -365,7 +378,7 @@ DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); ...@@ -365,7 +378,7 @@ DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL);
DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL);
DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL);
DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL);
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, NULL, NULL); DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL);
DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL);
DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL);
DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL);
...@@ -426,7 +439,10 @@ static struct clk_lookup lookups[] = { ...@@ -426,7 +439,10 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
_REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
_REGISTER_CLOCK(NULL, "usbotg", usbotg_clk) _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "max", max_clk) _REGISTER_CLOCK(NULL, "max", max_clk)
_REGISTER_CLOCK(NULL, "admux", admux_clk) _REGISTER_CLOCK(NULL, "admux", admux_clk)
...@@ -456,7 +472,7 @@ int __init mx35_clocks_init() ...@@ -456,7 +472,7 @@ int __init mx35_clocks_init()
__raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
__raw_writel(0, CCM_BASE + CCM_CGR3); __raw_writel(0, CCM_BASE + CCM_CGR3);
mxc_timer_init(&gpt_clk); mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
return 0; return 0;
} }
......
arch/arm/mach-mx3/clock.c
View file @ 590a94d9
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <mach/clock.h> #include <mach/clock.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/mx31.h>
#include <mach/common.h> #include <mach/common.h>
#include "crm_regs.h" #include "crm_regs.h"
...@@ -402,6 +403,11 @@ static unsigned long clk_ckih_get_rate(struct clk *clk) ...@@ -402,6 +403,11 @@ static unsigned long clk_ckih_get_rate(struct clk *clk)
return ckih_rate; return ckih_rate;
} }
static unsigned long clk_ckil_get_rate(struct clk *clk)
{
return CKIL_CLK_FREQ;
}
static struct clk ckih_clk = { static struct clk ckih_clk = {
.get_rate = clk_ckih_get_rate, .get_rate = clk_ckih_get_rate,
}; };
...@@ -508,6 +514,7 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk) ...@@ -508,6 +514,7 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk)
DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk);
DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL);
#define _REGISTER_CLOCK(d, n, c) \ #define _REGISTER_CLOCK(d, n, c) \
{ \ { \
...@@ -518,9 +525,9 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); ...@@ -518,9 +525,9 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "emi", emi_clk) _REGISTER_CLOCK(NULL, "emi", emi_clk)
_REGISTER_CLOCK(NULL, "cspi", cspi1_clk) _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
_REGISTER_CLOCK(NULL, "cspi", cspi2_clk) _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
_REGISTER_CLOCK(NULL, "cspi", cspi3_clk) _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
_REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
_REGISTER_CLOCK(NULL, "pwm", pwm_clk) _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
_REGISTER_CLOCK(NULL, "wdog", wdog_clk) _REGISTER_CLOCK(NULL, "wdog", wdog_clk)
...@@ -531,6 +538,12 @@ static struct clk_lookup lookups[] = { ...@@ -531,6 +538,12 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("ipu-core", NULL, ipu_clk) _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
_REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
_REGISTER_CLOCK(NULL, "kpp", kpp_clk) _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
_REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2)
_REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2)
_REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
_REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk) _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
...@@ -559,6 +572,7 @@ static struct clk_lookup lookups[] = { ...@@ -559,6 +572,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "iim", iim_clk)
_REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
_REGISTER_CLOCK(NULL, "mbx", mbx_clk) _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
_REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk)
}; };
int __init mx31_clocks_init(unsigned long fref) int __init mx31_clocks_init(unsigned long fref)
...@@ -609,7 +623,7 @@ int __init mx31_clocks_init(unsigned long fref) ...@@ -609,7 +623,7 @@ int __init mx31_clocks_init(unsigned long fref)
__raw_writel(reg, MXC_CCM_PMCR1); __raw_writel(reg, MXC_CCM_PMCR1);
} }
mxc_timer_init(&ipg_clk); mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
return 0; return 0;
} }
......
arch/arm/mach-mx3/devices.c
View file @ 590a94d9
...@@ -129,19 +129,17 @@ struct platform_device mxc_uart_device4 = { ...@@ -129,19 +129,17 @@ struct platform_device mxc_uart_device4 = {
/* GPIO port description */ /* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = { static struct mxc_gpio_port imx_gpio_ports[] = {
[0] = { {
.chip.label = "gpio-0", .chip.label = "gpio-0",
.base = IO_ADDRESS(GPIO1_BASE_ADDR), .base = IO_ADDRESS(GPIO1_BASE_ADDR),
.irq = MXC_INT_GPIO1, .irq = MXC_INT_GPIO1,
.virtual_irq_start = MXC_GPIO_IRQ_START, .virtual_irq_start = MXC_GPIO_IRQ_START,
}, }, {
[1] = {
.chip.label = "gpio-1", .chip.label = "gpio-1",
.base = IO_ADDRESS(GPIO2_BASE_ADDR), .base = IO_ADDRESS(GPIO2_BASE_ADDR),
.irq = MXC_INT_GPIO2, .irq = MXC_INT_GPIO2,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32, .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
}, }, {
[2] = {
.chip.label = "gpio-2", .chip.label = "gpio-2",
.base = IO_ADDRESS(GPIO3_BASE_ADDR), .base = IO_ADDRESS(GPIO3_BASE_ADDR),
.irq = MXC_INT_GPIO3, .irq = MXC_INT_GPIO3,
...@@ -173,11 +171,11 @@ static struct resource mxc_nand_resources[] = { ...@@ -173,11 +171,11 @@ static struct resource mxc_nand_resources[] = {
{ {
.start = 0, /* runtime dependent */ .start = 0, /* runtime dependent */
.end = 0, .end = 0,
.flags = IORESOURCE_MEM .flags = IORESOURCE_MEM,
}, { }, {
.start = MXC_INT_NANDFC, .start = MXC_INT_NANDFC,
.end = MXC_INT_NANDFC, .end = MXC_INT_NANDFC,
.flags = IORESOURCE_IRQ .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -193,8 +191,7 @@ static struct resource mxc_i2c0_resources[] = { ...@@ -193,8 +191,7 @@ static struct resource mxc_i2c0_resources[] = {
.start = I2C_BASE_ADDR, .start = I2C_BASE_ADDR,
.end = I2C_BASE_ADDR + SZ_4K - 1, .end = I2C_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
{
.start = MXC_INT_I2C, .start = MXC_INT_I2C,
.end = MXC_INT_I2C, .end = MXC_INT_I2C,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -213,8 +210,7 @@ static struct resource mxc_i2c1_resources[] = { ...@@ -213,8 +210,7 @@ static struct resource mxc_i2c1_resources[] = {
.start = I2C2_BASE_ADDR, .start = I2C2_BASE_ADDR,
.end = I2C2_BASE_ADDR + SZ_4K - 1, .end = I2C2_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
{
.start = MXC_INT_I2C2, .start = MXC_INT_I2C2,
.end = MXC_INT_I2C2, .end = MXC_INT_I2C2,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -233,8 +229,7 @@ static struct resource mxc_i2c2_resources[] = { ...@@ -233,8 +229,7 @@ static struct resource mxc_i2c2_resources[] = {
.start = I2C3_BASE_ADDR, .start = I2C3_BASE_ADDR,
.end = I2C3_BASE_ADDR + SZ_4K - 1, .end = I2C3_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
{
.start = MXC_INT_I2C3, .start = MXC_INT_I2C3,
.end = MXC_INT_I2C3, .end = MXC_INT_I2C3,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -371,8 +366,8 @@ struct platform_device mx3_camera = { ...@@ -371,8 +366,8 @@ struct platform_device mx3_camera = {
static struct resource otg_resources[] = { static struct resource otg_resources[] = {
{ {
.start = OTG_BASE_ADDR, .start = MX31_OTG_BASE_ADDR,
.end = OTG_BASE_ADDR + 0x1ff, .end = MX31_OTG_BASE_ADDR + 0x1ff,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, { }, {
.start = MXC_INT_USB3, .start = MXC_INT_USB3,
...@@ -395,16 +390,142 @@ struct platform_device mxc_otg_udc_device = { ...@@ -395,16 +390,142 @@ struct platform_device mxc_otg_udc_device = {
.num_resources = ARRAY_SIZE(otg_resources), .num_resources = ARRAY_SIZE(otg_resources),
}; };
/* OTG host */
struct platform_device mxc_otg_host = {
.name = "mxc-ehci",
.id = 0,
.dev = {
.coherent_dma_mask = 0xffffffff,
.dma_mask = &otg_dmamask,
},
.resource = otg_resources,
.num_resources = ARRAY_SIZE(otg_resources),
};
/* USB host 1 */
static u64 usbh1_dmamask = ~(u32)0;
static struct resource mxc_usbh1_resources[] = {
{
.start = MX31_OTG_BASE_ADDR + 0x200,
.end = MX31_OTG_BASE_ADDR + 0x3ff,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_USB1,
.end = MXC_INT_USB1,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_usbh1 = {
.name = "mxc-ehci",
.id = 1,
.dev = {
.coherent_dma_mask = 0xffffffff,
.dma_mask = &usbh1_dmamask,
},
.resource = mxc_usbh1_resources,
.num_resources = ARRAY_SIZE(mxc_usbh1_resources),
};
/* USB host 2 */
static u64 usbh2_dmamask = ~(u32)0;
static struct resource mxc_usbh2_resources[] = {
{
.start = MX31_OTG_BASE_ADDR + 0x400,
.end = MX31_OTG_BASE_ADDR + 0x5ff,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_USB2,
.end = MXC_INT_USB2,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_usbh2 = {
.name = "mxc-ehci",
.id = 2,
.dev = {
.coherent_dma_mask = 0xffffffff,
.dma_mask = &usbh2_dmamask,
},
.resource = mxc_usbh2_resources,
.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
};
/*
* SPI master controller
* 3 channels
*/
static struct resource imx_spi_0_resources[] = {
{
.start = CSPI1_BASE_ADDR,
.end = CSPI1_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI1,
.end = MXC_INT_CSPI1,
.flags = IORESOURCE_IRQ,
},
};
static struct resource imx_spi_1_resources[] = {
{
.start = CSPI2_BASE_ADDR,
.end = CSPI2_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI2,
.end = MXC_INT_CSPI2,
.flags = IORESOURCE_IRQ,
},
};
static struct resource imx_spi_2_resources[] = {
{
.start = CSPI3_BASE_ADDR,
.end = CSPI3_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI3,
.end = MXC_INT_CSPI3,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_spi_device0 = {
.name = "spi_imx",
.id = 0,
.num_resources = ARRAY_SIZE(imx_spi_0_resources),
.resource = imx_spi_0_resources,
};
struct platform_device imx_spi_device1 = {
.name = "spi_imx",
.id = 1,
.num_resources = ARRAY_SIZE(imx_spi_1_resources),
.resource = imx_spi_1_resources,
};
struct platform_device imx_spi_device2 = {
.name = "spi_imx",
.id = 2,
.num_resources = ARRAY_SIZE(imx_spi_2_resources),
.resource = imx_spi_2_resources,
};
#ifdef CONFIG_ARCH_MX35 #ifdef CONFIG_ARCH_MX35
static struct resource mxc_fec_resources[] = { static struct resource mxc_fec_resources[] = {
{ {
.start = MXC_FEC_BASE_ADDR, .start = MXC_FEC_BASE_ADDR,
.end = MXC_FEC_BASE_ADDR + 0xfff, .end = MXC_FEC_BASE_ADDR + 0xfff,
.flags = IORESOURCE_MEM .flags = IORESOURCE_MEM,
}, { }, {
.start = MXC_INT_FEC, .start = MXC_INT_FEC,
.end = MXC_INT_FEC, .end = MXC_INT_FEC,
.flags = IORESOURCE_IRQ .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -426,6 +547,14 @@ static int mx3_devices_init(void) ...@@ -426,6 +547,14 @@ static int mx3_devices_init(void)
if (cpu_is_mx35()) { if (cpu_is_mx35()) {
mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
otg_resources[0].start = MX35_OTG_BASE_ADDR;
otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
otg_resources[1].start = MXC_INT_USBOTG;
otg_resources[1].end = MXC_INT_USBOTG;
mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
mxc_usbh1_resources[1].start = MXC_INT_USBHS;
mxc_usbh1_resources[1].end = MXC_INT_USBHS;
} }
return 0; return 0;
......
arch/arm/mach-mx3/devices.h
View file @ 590a94d9
...@@ -16,5 +16,11 @@ extern struct platform_device mxc_fec_device; ...@@ -16,5 +16,11 @@ extern struct platform_device mxc_fec_device;
extern struct platform_device mxcsdhc_device0; extern struct platform_device mxcsdhc_device0;
extern struct platform_device mxcsdhc_device1; extern struct platform_device mxcsdhc_device1;
extern struct platform_device mxc_otg_udc_device; extern struct platform_device mxc_otg_udc_device;
extern struct platform_device mxc_otg_host;
extern struct platform_device mxc_usbh1;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_rnga_device; extern struct platform_device mxc_rnga_device;
extern struct platform_device imx_spi_device0;
extern struct platform_device imx_spi_device1;
extern struct platform_device imx_spi_device2;
arch/arm/mach-mx3/mm.c
View file @ 590a94d9
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include <mach/common.h> #include <mach/common.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/iomux-v3.h>
/*! /*!
* @file mm.c * @file mm.c
...@@ -75,6 +76,7 @@ static struct map_desc mxc_io_desc[] __initdata = { ...@@ -75,6 +76,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
void __init mx31_map_io(void) void __init mx31_map_io(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX31); mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
...@@ -82,10 +84,22 @@ void __init mx31_map_io(void) ...@@ -82,10 +84,22 @@ void __init mx31_map_io(void)
void __init mx35_map_io(void) void __init mx35_map_io(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX35); mxc_set_cpu_type(MXC_CPU_MX35);
mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR));
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
void __init mx31_init_irq(void)
{
mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
}
void __init mx35_init_irq(void)
{
mx31_init_irq();
}
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
static int mxc_init_l2x0(void) static int mxc_init_l2x0(void)
{ {
......
arch/arm/mach-mx3/mx31ads.c
View file @ 590a94d9
...@@ -517,7 +517,7 @@ static void __init mx31ads_map_io(void) ...@@ -517,7 +517,7 @@ static void __init mx31ads_map_io(void)
static void __init mx31ads_init_irq(void) static void __init mx31ads_init_irq(void)
{ {
mxc_init_irq(); mx31_init_irq();
mx31ads_init_expio(); mx31ads_init_expio();
} }
......
arch/arm/mach-mx3/mx31lilly.c
View file @ 590a94d9
...@@ -148,7 +148,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") ...@@ -148,7 +148,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io, .map_io = mx31_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mx31lilly_board_init, .init_machine = mx31lilly_board_init,
.timer = &mx31lilly_timer, .timer = &mx31lilly_timer,
MACHINE_END MACHINE_END
......
arch/arm/mach-mx3/mx31lite.c
View file @ 590a94d9
...@@ -71,12 +71,11 @@ static struct smsc911x_platform_config smsc911x_config = { ...@@ -71,12 +71,11 @@ static struct smsc911x_platform_config smsc911x_config = {
}; };
static struct resource smsc911x_resources[] = { static struct resource smsc911x_resources[] = {
[0] = { {
.start = CS4_BASE_ADDR, .start = CS4_BASE_ADDR,
.end = CS4_BASE_ADDR + 0x100, .end = CS4_BASE_ADDR + 0x100,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = IOMUX_TO_IRQ(MX31_PIN_SFS6), .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
.end = IOMUX_TO_IRQ(MX31_PIN_SFS6), .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -162,7 +161,7 @@ MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT") ...@@ -162,7 +161,7 @@ MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31lite_map_io, .map_io = mx31lite_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &mx31lite_timer, .timer = &mx31lite_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx3/mx31moboard-devboard.c
View file @ 590a94d9
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <linux/fsl_devices.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
...@@ -40,18 +39,6 @@ static unsigned int devboard_pins[] = { ...@@ -40,18 +39,6 @@ static unsigned int devboard_pins[] = {
MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
/* USB OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
MX31_PIN_USB_OC__GPIO1_30,
}; };
static struct imxuart_platform_data uart_pdata = { static struct imxuart_platform_data uart_pdata = {
...@@ -111,33 +98,6 @@ static struct imxmmc_platform_data sdhc2_pdata = { ...@@ -111,33 +98,6 @@ static struct imxmmc_platform_data sdhc2_pdata = {
.exit = devboard_sdhc2_exit, .exit = devboard_sdhc2_exit,
}; };
static struct fsl_usb2_platform_data usb_pdata = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
#define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)
#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
static void devboard_usbotg_init(void)
{
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG);
gpio_request(OTG_EN_B, "usb-udc-en");
gpio_direction_output(OTG_EN_B, 0);
}
/* /*
* system init for baseboard usage. Will be called by mx31moboard init. * system init for baseboard usage. Will be called by mx31moboard init.
*/ */
...@@ -151,7 +111,4 @@ void __init mx31moboard_devboard_init(void) ...@@ -151,7 +111,4 @@ void __init mx31moboard_devboard_init(void)
mxc_register_device(&mxc_uart_device1, &uart_pdata); mxc_register_device(&mxc_uart_device1, &uart_pdata);
mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
devboard_usbotg_init();
mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
} }
arch/arm/mach-mx3/mx31moboard-marxbot.c
View file @ 590a94d9
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <linux/fsl_devices.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
...@@ -48,18 +47,8 @@ static unsigned int marxbot_pins[] = { ...@@ -48,18 +47,8 @@ static unsigned int marxbot_pins[] = {
MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
MX31_PIN_TXD2__GPIO1_28, MX31_PIN_TXD2__GPIO1_28,
/* USB OTG */ /* dsPIC resets */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
MX31_PIN_USB_OC__GPIO1_30,
}; };
#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
...@@ -115,31 +104,20 @@ static struct imxmmc_platform_data sdhc2_pdata = { ...@@ -115,31 +104,20 @@ static struct imxmmc_platform_data sdhc2_pdata = {
.exit = marxbot_sdhc2_exit, .exit = marxbot_sdhc2_exit,
}; };
static struct fsl_usb2_platform_data usb_pdata = { #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_STXD5)
.operating_mode = FSL_USB2_DR_DEVICE, #define DSPICS_RST_B IOMUX_TO_GPIO(MX31_PIN_SRXD5)
.phy_mode = FSL_USB2_PHY_ULPI,
};
#define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)
#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
static void marxbot_usbotg_init(void) static void dspics_resets_init(void)
{ {
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG); if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG); gpio_direction_output(TRSLAT_RST_B, 1);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG); gpio_export(TRSLAT_RST_B, false);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG); }
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG); if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG); gpio_direction_output(DSPICS_RST_B, 1);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG); gpio_export(DSPICS_RST_B, false);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG); }
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG);
gpio_request(OTG_EN_B, "usb-udc-en");
gpio_direction_output(OTG_EN_B, 0);
} }
/* /*
...@@ -152,8 +130,7 @@ void __init mx31moboard_marxbot_init(void) ...@@ -152,8 +130,7 @@ void __init mx31moboard_marxbot_init(void)
mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
"marxbot"); "marxbot");
mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); dspics_resets_init();
marxbot_usbotg_init(); mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
} }
arch/arm/mach-mx3/mx31moboard.c
View file @ 590a94d9
...@@ -16,9 +16,12 @@ ...@@ -16,9 +16,12 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <linux/delay.h>
#include <linux/fsl_devices.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/memory.h> #include <linux/memory.h>
#include <linux/mtd/physmap.h> #include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h> #include <linux/mtd/partitions.h>
...@@ -36,6 +39,7 @@ ...@@ -36,6 +39,7 @@
#include <mach/iomux-mx3.h> #include <mach/iomux-mx3.h>
#include <mach/i2c.h> #include <mach/i2c.h>
#include <mach/mmc.h> #include <mach/mmc.h>
#include <mach/mx31.h>
#include "devices.h" #include "devices.h"
...@@ -55,6 +59,26 @@ static unsigned int moboard_pins[] = { ...@@ -55,6 +59,26 @@ static unsigned int moboard_pins[] = {
MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
/* USB reset */
MX31_PIN_GPIO1_0__GPIO1_0,
/* USB OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
MX31_PIN_USB_OC__GPIO1_30,
/* LEDs */
MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
/* SEL */
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
}; };
static struct physmap_flash_data mx31moboard_flash_data = { static struct physmap_flash_data mx31moboard_flash_data = {
...@@ -142,8 +166,109 @@ static struct imxmmc_platform_data sdhc1_pdata = { ...@@ -142,8 +166,109 @@ static struct imxmmc_platform_data sdhc1_pdata = {
.exit = moboard_sdhc1_exit, .exit = moboard_sdhc1_exit,
}; };
/*
* this pin is dedicated for all mx31moboard systems, so we do it here
*/
#define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)
static void usb_xcvr_reset(void)
{
gpio_request(USB_RESET_B, "usb-reset");
gpio_direction_output(USB_RESET_B, 0);
mdelay(1);
gpio_set_value(USB_RESET_B, 1);
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
static void moboard_usbotg_init(void)
{
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
gpio_request(OTG_EN_B, "usb-udc-en");
gpio_direction_output(OTG_EN_B, 0);
}
static struct fsl_usb2_platform_data usb_pdata = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
static struct gpio_led mx31moboard_leds[] = {
{
.name = "coreboard-led-0:red:running",
.default_trigger = "heartbeat",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
}, {
.name = "coreboard-led-1:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
}, {
.name = "coreboard-led-2:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0),
}, {
.name = "coreboard-led-3:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0),
},
};
static struct gpio_led_platform_data mx31moboard_led_pdata = {
.num_leds = ARRAY_SIZE(mx31moboard_leds),
.leds = mx31moboard_leds,
};
static struct platform_device mx31moboard_leds_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &mx31moboard_led_pdata,
},
};
#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
static void mx31moboard_init_sel_gpios(void)
{
if (!gpio_request(SEL0, "sel0")) {
gpio_direction_input(SEL0);
gpio_export(SEL0, true);
}
if (!gpio_request(SEL1, "sel1")) {
gpio_direction_input(SEL1);
gpio_export(SEL1, true);
}
if (!gpio_request(SEL2, "sel2")) {
gpio_direction_input(SEL2);
gpio_export(SEL2, true);
}
if (!gpio_request(SEL3, "sel3")) {
gpio_direction_input(SEL3);
gpio_export(SEL3, true);
}
}
static struct platform_device *devices[] __initdata = { static struct platform_device *devices[] __initdata = {
&mx31moboard_flash, &mx31moboard_flash,
&mx31moboard_leds_device,
}; };
static int mx31moboard_baseboard; static int mx31moboard_baseboard;
...@@ -162,11 +287,18 @@ static void __init mxc_board_init(void) ...@@ -162,11 +287,18 @@ static void __init mxc_board_init(void)
mxc_register_device(&mxc_uart_device0, &uart_pdata); mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_uart_device4, &uart_pdata); mxc_register_device(&mxc_uart_device4, &uart_pdata);
mx31moboard_init_sel_gpios();
mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata);
usb_xcvr_reset();
moboard_usbotg_init();
mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
switch (mx31moboard_baseboard) { switch (mx31moboard_baseboard) {
case MX31NOBOARD: case MX31NOBOARD:
break; break;
...@@ -197,7 +329,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") ...@@ -197,7 +329,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io, .map_io = mx31_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &mx31moboard_timer, .timer = &mx31moboard_timer,
MACHINE_END MACHINE_END
......
arch/arm/mach-mx3/mx31pdk.c
View file @ 590a94d9
...@@ -265,7 +265,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") ...@@ -265,7 +265,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31pdk_map_io, .map_io = mx31pdk_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &mx31pdk_timer, .timer = &mx31pdk_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx3/mx35pdk.c
View file @ 590a94d9
...@@ -98,7 +98,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") ...@@ -98,7 +98,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx35_map_io, .map_io = mx35_map_io,
.init_irq = mxc_init_irq, .init_irq = mx35_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &mx35pdk_timer, .timer = &mx35pdk_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx3/pcm037.c
View file @ 590a94d9
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/fsl_devices.h> #include <linux/fsl_devices.h>
#include <linux/can/platform/sja1000.h>
#include <media/soc_camera.h> #include <media/soc_camera.h>
...@@ -169,6 +170,8 @@ static unsigned int pcm037_pins[] = { ...@@ -169,6 +170,8 @@ static unsigned int pcm037_pins[] = {
MX31_PIN_CSI_MCLK__CSI_MCLK, MX31_PIN_CSI_MCLK__CSI_MCLK,
MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
MX31_PIN_CSI_VSYNC__CSI_VSYNC, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
/* GPIO */
IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
}; };
static struct physmap_flash_data pcm037_flash_data = { static struct physmap_flash_data pcm037_flash_data = {
...@@ -244,12 +247,11 @@ static struct imxuart_platform_data uart_pdata = { ...@@ -244,12 +247,11 @@ static struct imxuart_platform_data uart_pdata = {
}; };
static struct resource smsc911x_resources[] = { static struct resource smsc911x_resources[] = {
[0] = { {
.start = CS1_BASE_ADDR + 0x300, .start = CS1_BASE_ADDR + 0x300,
.end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
.end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
...@@ -339,8 +341,7 @@ static struct i2c_board_info pcm037_i2c_devices[] = { ...@@ -339,8 +341,7 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
.platform_data = &board_eeprom, .platform_data = &board_eeprom,
}, { }, {
I2C_BOARD_INFO("rtc-pcf8563", 0x51), I2C_BOARD_INFO("pcf8563", 0x51),
.type = "pcf8563",
} }
}; };
...@@ -515,6 +516,33 @@ static struct mx3fb_platform_data mx3fb_pdata = { ...@@ -515,6 +516,33 @@ static struct mx3fb_platform_data mx3fb_pdata = {
.num_modes = ARRAY_SIZE(fb_modedb), .num_modes = ARRAY_SIZE(fb_modedb),
}; };
static struct resource pcm970_sja1000_resources[] = {
{
.start = CS5_BASE_ADDR,
.end = CS5_BASE_ADDR + 0x100 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
.end = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
struct sja1000_platform_data pcm970_sja1000_platform_data = {
.clock = 16000000 / 2,
.ocr = 0x40 | 0x18,
.cdr = 0x40,
};
static struct platform_device pcm970_sja1000 = {
.name = "sja1000_platform",
.dev = {
.platform_data = &pcm970_sja1000_platform_data,
},
.resource = pcm970_sja1000_resources,
.num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
};
/* /*
* Board specific initialization. * Board specific initialization.
*/ */
...@@ -575,6 +603,8 @@ static void __init mxc_board_init(void) ...@@ -575,6 +603,8 @@ static void __init mxc_board_init(void)
if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
mxc_register_device(&mx3_camera, &camera_pdata); mxc_register_device(&mx3_camera, &camera_pdata);
platform_device_register(&pcm970_sja1000);
} }
static void __init pcm037_timer_init(void) static void __init pcm037_timer_init(void)
...@@ -592,7 +622,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") ...@@ -592,7 +622,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io, .map_io = mx31_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &pcm037_timer, .timer = &pcm037_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mx3/pcm043.c
View file @ 590a94d9
...@@ -133,8 +133,7 @@ static struct i2c_board_info pcm043_i2c_devices[] = { ...@@ -133,8 +133,7 @@ static struct i2c_board_info pcm043_i2c_devices[] = {
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
.platform_data = &board_eeprom, .platform_data = &board_eeprom,
}, { }, {
I2C_BOARD_INFO("rtc-pcf8563", 0x51), I2C_BOARD_INFO("pcf8563", 0x51),
.type = "pcf8563",
} }
}; };
#endif #endif
...@@ -203,7 +202,8 @@ static struct pad_desc pcm043_pads[] = { ...@@ -203,7 +202,8 @@ static struct pad_desc pcm043_pads[] = {
MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
MX35_PAD_D3_REV__IPU_DISPB_D3_REV, MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL /* gpio */
MX35_PAD_ATA_CS0__GPIO2_6,
}; };
/* /*
...@@ -245,7 +245,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") ...@@ -245,7 +245,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx35_map_io, .map_io = mx35_map_io,
.init_irq = mxc_init_irq, .init_irq = mx35_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &pcm043_timer, .timer = &pcm043_timer,
MACHINE_END MACHINE_END
......
arch/arm/mach-mx3/qong.c
View file @ 590a94d9
...@@ -81,13 +81,12 @@ static inline void mxc_init_imx_uart(void) ...@@ -81,13 +81,12 @@ static inline void mxc_init_imx_uart(void)
} }
static struct resource dnet_resources[] = { static struct resource dnet_resources[] = {
[0] = { {
.name = "dnet-memory", .name = "dnet-memory",
.start = QONG_DNET_BASEADDR, .start = QONG_DNET_BASEADDR,
.end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1, .end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, }, {
[1] = {
.start = QONG_FPGA_IRQ, .start = QONG_FPGA_IRQ,
.end = QONG_FPGA_IRQ, .end = QONG_FPGA_IRQ,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
...@@ -280,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") ...@@ -280,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100, .boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io, .map_io = mx31_map_io,
.init_irq = mxc_init_irq, .init_irq = mx31_init_irq,
.init_machine = mxc_board_init, .init_machine = mxc_board_init,
.timer = &qong_timer, .timer = &qong_timer,
MACHINE_END MACHINE_END
arch/arm/mach-mxc91231/Kconfig 0 → 100644
View file @ 590a94d9
if ARCH_MXC91231
comment "MXC91231 platforms:"
config MACH_MAGX_ZN5
bool "Support Motorola Zn5 GSM phone"
default n
help
Include support for Motorola Zn5 GSM phone.
endif
arch/arm/mach-mxc91231/Makefile 0 → 100644
View file @ 590a94d9
obj-y := mm.o clock.o devices.o system.o iomux.o
obj-$(CONFIG_MACH_MAGX_ZN5) += magx-zn5.o
arch/arm/mach-mxc91231/Makefile.boot 0 → 100644
View file @ 590a94d9
zreladdr-y := 0x90008000
params_phys-y := 0x90000100
initrd_phys-y := 0x90800000
arch/arm/mach-mxc91231/clock.c 0 → 100644
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arch/arm/mach-mxc91231/devices.h 0 → 100644
View file @ 590a94d9
extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_nand_device;
extern struct platform_device mxc_sdhc_device0;
extern struct platform_device mxc_sdhc_device1;
extern struct platform_device mxc_cspi_device0;
extern struct platform_device mxc_cspi_device1;
extern struct platform_device mxc_wdog_device0;
arch/arm/mach-mxc91231/iomux.c 0 → 100644
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arch/arm/mach-mxc91231/magx-zn5.c 0 → 100644
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arch/arm/mach-mxc91231/system.c 0 → 100644
View file @ 590a94d9
/*
* Copyright 2009 Dmitriy Taychenachev <dimichxp@gmail.com>
*
* This file is released under the GPLv2 or later.
*/
#include <linux/delay.h>
#include <linux/io.h>
#include <asm/proc-fns.h>
#include <mach/hardware.h>
#include "crm_regs.h"
#define WDOG_WCR MXC91231_IO_ADDRESS(MXC91231_WDOG1_BASE_ADDR)
#define WDOG_WCR_OUT_ENABLE (1 << 6)
#define WDOG_WCR_ASSERT (1 << 5)
void mxc91231_power_off(void)
{
u16 wcr;
wcr = __raw_readw(WDOG_WCR);
wcr |= WDOG_WCR_OUT_ENABLE;
wcr &= ~WDOG_WCR_ASSERT;
__raw_writew(wcr, WDOG_WCR);
}
void mxc91231_arch_reset(char mode, const char *cmd)
{
u32 amcr;
/* Reset the AP using CRM */
amcr = __raw_readl(MXC_CRMAP_AMCR);
amcr &= ~MXC_CRMAP_AMCR_SW_AP;
__raw_writel(amcr, MXC_CRMAP_AMCR);
mdelay(10);
cpu_reset(0);
}
void mxc91231_prepare_idle(void)
{
u32 crm_ctl;
/* Go to WAIT mode after WFI */
crm_ctl = __raw_readl(MXC_DSM_CRM_CONTROL);
crm_ctl &= ~(MXC_DSM_CRM_CTRL_LPMD0 | MXC_DSM_CRM_CTRL_LPMD1);
crm_ctl |= MXC_DSM_CRM_CTRL_LPMD_WAIT_MODE;
__raw_writel(crm_ctl, MXC_DSM_CRM_CONTROL);
}
arch/arm/plat-mxc/Kconfig
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arch/arm/plat-mxc/clock.c
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arch/arm/plat-mxc/include/mach/board-armadillo5x0.h
View file @ 590a94d9
...@@ -12,11 +12,4 @@ ...@@ -12,11 +12,4 @@
#ifndef __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__ #ifndef __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__
#define __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__ #define __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__
#include <mach/hardware.h>
/* mandatory for CONFIG_DEBUG_LL */
#define MXC_LL_UART_PADDR UART1_BASE_ADDR
#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
#endif #endif
arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h 0 → 100644
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arch/arm/plat-mxc/include/mach/board-qong.h
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arch/arm/plat-mxc/include/mach/common.h
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arch/arm/plat-mxc/include/mach/hardware.h
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arch/arm/plat-mxc/include/mach/imxfb.h
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arch/arm/plat-mxc/include/mach/iomux-mx3.h
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arch/arm/plat-mxc/include/mach/iomux-v3.h
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arch/arm/plat-mxc/include/mach/iomux.h
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arch/arm/plat-mxc/include/mach/irqs.h
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arch/arm/plat-mxc/include/mach/memory.h
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arch/arm/plat-mxc/include/mach/mx1.h
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arch/arm/plat-mxc/include/mach/mx21.h
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arch/arm/plat-mxc/include/mach/mx27.h
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arch/arm/plat-mxc/include/mach/mx2x.h
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arch/arm/plat-mxc/include/mach/mx31.h
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arch/arm/plat-mxc/include/mach/mx35.h
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arch/arm/plat-mxc/include/mach/mx3x.h
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arch/arm/plat-mxc/include/mach/mxc.h
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arch/arm/plat-mxc/include/mach/system.h
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arch/arm/plat-mxc/include/mach/timex.h
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arch/arm/plat-mxc/include/mach/uncompress.h
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arch/arm/plat-mxc/iomux-v3.c
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drivers/serial/imx.c
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drivers/video/imxfb.c
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