Commit 597e6ac3 authored by James Zhu's avatar James Zhu Committed by Alex Deucher

drm/amdgpu/vcn: support multiple-instance dpg pause mode

Add multiple-instance dpg pause mode support for VCN2.5
Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1291bd70
...@@ -298,7 +298,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work) ...@@ -298,7 +298,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
else else
new_state.fw_based = VCN_DPG_STATE__UNPAUSE; new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
adev->vcn.pause_dpg_mode(adev, &new_state); adev->vcn.pause_dpg_mode(adev, j, &new_state);
} }
fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec); fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec);
...@@ -341,7 +341,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) ...@@ -341,7 +341,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)
new_state.fw_based = VCN_DPG_STATE__PAUSE; new_state.fw_based = VCN_DPG_STATE__PAUSE;
adev->vcn.pause_dpg_mode(adev, &new_state); adev->vcn.pause_dpg_mode(adev, ring->me, &new_state);
} }
} }
......
...@@ -199,7 +199,7 @@ struct amdgpu_vcn { ...@@ -199,7 +199,7 @@ struct amdgpu_vcn {
unsigned harvest_config; unsigned harvest_config;
int (*pause_dpg_mode)(struct amdgpu_device *adev, int (*pause_dpg_mode)(struct amdgpu_device *adev,
struct dpg_pause_state *new_state); int inst_idx, struct dpg_pause_state *new_state);
}; };
int amdgpu_vcn_sw_init(struct amdgpu_device *adev); int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
......
...@@ -50,7 +50,7 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev); ...@@ -50,7 +50,7 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev);
static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev); static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev);
static int vcn_v1_0_set_powergating_state(void *handle, enum amd_powergating_state state); static int vcn_v1_0_set_powergating_state(void *handle, enum amd_powergating_state state);
static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
struct dpg_pause_state *new_state); int inst_idx, struct dpg_pause_state *new_state);
static void vcn_v1_0_idle_work_handler(struct work_struct *work); static void vcn_v1_0_idle_work_handler(struct work_struct *work);
...@@ -1199,7 +1199,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev) ...@@ -1199,7 +1199,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev)
} }
static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
struct dpg_pause_state *new_state) int inst_idx, struct dpg_pause_state *new_state)
{ {
int ret_code; int ret_code;
uint32_t reg_data = 0; uint32_t reg_data = 0;
...@@ -1786,7 +1786,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work) ...@@ -1786,7 +1786,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
else else
new_state.jpeg = VCN_DPG_STATE__UNPAUSE; new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
adev->vcn.pause_dpg_mode(adev, &new_state); adev->vcn.pause_dpg_mode(adev, 0, &new_state);
} }
fences += amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec); fences += amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec);
...@@ -1840,7 +1840,7 @@ void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring) ...@@ -1840,7 +1840,7 @@ void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring)
else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)
new_state.jpeg = VCN_DPG_STATE__PAUSE; new_state.jpeg = VCN_DPG_STATE__PAUSE;
adev->vcn.pause_dpg_mode(adev, &new_state); adev->vcn.pause_dpg_mode(adev, 0, &new_state);
} }
} }
......
...@@ -58,7 +58,7 @@ static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev); ...@@ -58,7 +58,7 @@ static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev);
static int vcn_v2_0_set_powergating_state(void *handle, static int vcn_v2_0_set_powergating_state(void *handle,
enum amd_powergating_state state); enum amd_powergating_state state);
static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
struct dpg_pause_state *new_state); int inst_idx, struct dpg_pause_state *new_state);
/** /**
* vcn_v2_0_early_init - set function pointers * vcn_v2_0_early_init - set function pointers
...@@ -1135,7 +1135,7 @@ static int vcn_v2_0_stop(struct amdgpu_device *adev) ...@@ -1135,7 +1135,7 @@ static int vcn_v2_0_stop(struct amdgpu_device *adev)
} }
static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
struct dpg_pause_state *new_state) int inst_idx, struct dpg_pause_state *new_state)
{ {
struct amdgpu_ring *ring; struct amdgpu_ring *ring;
uint32_t reg_data = 0; uint32_t reg_data = 0;
......
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