Commit 5a20ff8b authored by Maxime Ripard's avatar Maxime Ripard

drm/vc4: crtc: Split CRTC data in two

The vc4_crtc_data structure is currently storing data related to both the
general CRTC information needed by the rest of the vc4 driver (like HVS
output and available FIFOs) and some related to the pixelvalve attached to
that CRTC. Let's split this into two structures so that we can reuse the
CRTC part into the TXP later on.
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
Reviewed-by: default avatarEric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/8eb317c91ac208d7f926d76ad421002fa0364c47.1591882579.git-series.maxime@cerno.tech
parent bdd96472
......@@ -778,8 +778,10 @@ static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
.get_scanout_position = vc4_crtc_get_scanout_position,
};
static const struct vc4_crtc_data bcm2835_pv0_data = {
static const struct vc4_pv_data bcm2835_pv0_data = {
.base = {
.hvs_channel = 0,
},
.debugfs_name = "crtc0_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI0,
......@@ -787,8 +789,10 @@ static const struct vc4_crtc_data bcm2835_pv0_data = {
},
};
static const struct vc4_crtc_data bcm2835_pv1_data = {
static const struct vc4_pv_data bcm2835_pv1_data = {
.base = {
.hvs_channel = 2,
},
.debugfs_name = "crtc1_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI1,
......@@ -796,8 +800,10 @@ static const struct vc4_crtc_data bcm2835_pv1_data = {
},
};
static const struct vc4_crtc_data bcm2835_pv2_data = {
static const struct vc4_pv_data bcm2835_pv2_data = {
.base = {
.hvs_channel = 1,
},
.debugfs_name = "crtc2_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_HDMI,
......@@ -816,8 +822,9 @@ static void vc4_set_crtc_possible_masks(struct drm_device *drm,
struct drm_crtc *crtc)
{
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
const struct vc4_crtc_data *crtc_data = vc4_crtc->data;
const enum vc4_encoder_type *encoder_types = crtc_data->encoder_types;
const struct vc4_crtc_data *crtc_data = vc4_crtc_to_vc4_crtc_data(vc4_crtc);
const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
const enum vc4_encoder_type *encoder_types = pv_data->encoder_types;
struct drm_encoder *encoder;
drm_for_each_encoder(encoder, drm) {
......@@ -832,7 +839,7 @@ static void vc4_set_crtc_possible_masks(struct drm_device *drm,
}
vc4_encoder = to_vc4_encoder(encoder);
for (i = 0; i < ARRAY_SIZE(crtc_data->encoder_types); i++) {
for (i = 0; i < ARRAY_SIZE(pv_data->encoder_types); i++) {
if (vc4_encoder->type == encoder_types[i]) {
vc4_encoder->clock_select = i;
encoder->possible_crtcs |= drm_crtc_mask(crtc);
......@@ -862,7 +869,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
struct drm_device *drm = dev_get_drvdata(master);
const struct vc4_crtc_data *pv_data;
const struct vc4_pv_data *pv_data;
struct vc4_crtc *vc4_crtc;
struct drm_crtc *crtc;
struct drm_plane *primary_plane, *destroy_plane, *temp;
......@@ -876,7 +883,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
pv_data = of_device_get_match_data(dev);
if (!pv_data)
return -ENODEV;
vc4_crtc->data = pv_data;
vc4_crtc->data = &pv_data->base;
vc4_crtc->pdev = pdev;
vc4_crtc->regs = vc4_ioremap_regs(pdev, 0);
......
......@@ -443,9 +443,14 @@ to_vc4_encoder(struct drm_encoder *encoder)
struct vc4_crtc_data {
/* Which channel of the HVS this pixelvalve sources from. */
int hvs_channel;
};
struct vc4_pv_data {
struct vc4_crtc_data base;
enum vc4_encoder_type encoder_types[4];
const char *debugfs_name;
};
struct vc4_crtc {
......@@ -477,6 +482,20 @@ to_vc4_crtc(struct drm_crtc *crtc)
return (struct vc4_crtc *)crtc;
}
static inline const struct vc4_crtc_data *
vc4_crtc_to_vc4_crtc_data(const struct vc4_crtc *crtc)
{
return crtc->data;
}
static inline const struct vc4_pv_data *
vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc)
{
const struct vc4_crtc_data *data = vc4_crtc_to_vc4_crtc_data(crtc);
return container_of(data, struct vc4_pv_data, base);
}
struct vc4_crtc_state {
struct drm_crtc_state base;
/* Dlist area for this CRTC configuration. */
......
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