Commit 5bebe2c9 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mmc-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Convert to sysfs_emit() in favor of sprintf()

   - Improve fallback to speed modes if eMMC HS200 fails

  MMC host:
   - dw_mmc: Allow variants to set minimal supported clock rate

   - dw-mmc-rockchip: Fix problems with invalid clock rates

   - litex_mmc: Add new DT based driver for the LiteX's LiteSDCard
     interface

   - litex_mmc: Add Gabriel Somlo and Joel Stanley as co-maintainers for
     LiteX

   - mtk-sd: Add support for the Mediatek MT8186 variant

   - renesas_sdhi: Add support for RZ/G2UL variant

   - renesas_sdhi: Add support for RZ/V2L variant

   - rtsx_pci: Adjust power-on sequence to conform to the SD spec

   - sdhci-am654: Add support for TI's AM62 variant

   - sdhci_am654: Fixup support for TI's AM64 variant

   - sdhci-esdhc-imx: Add support for the imx93 variant

   - sdhci-msm: Add support for the msm8953 variant

   - sdhci-pci-gli: Add support for runtime PM for the GL9763E variant

   - sdhci-pci-gli: Adjustments of the SSC function for the GL975x
     variants

   - sdhci-tegra: Add support for wake on SD card event

   - sunxi-mmc: Add support for Allwinner's F1c100s variant

   - sunxi-mmc: Add support for D1 MMC variant"

* tag 'mmc-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (37 commits)
  dt-bindings: mmc: renesas,sdhi: Document RZ/G2UL SoC
  mmc: tmio: remove outdated members from host struct
  mmc: mtk-sd: Silence delay phase calculation debug log
  mmc: davinci_mmc: Handle error for clk_enable
  mmc: sdhci-pci-gli: Add runtime PM for GL9763E
  mmc: core: Drop HS400 caps unless 8-bit bus is supported too
  mmc: host: Return an error when ->enable_sdio_irq() ops is missing
  mmc: core: Improve fallback to speed modes if eMMC HS200 fails
  dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible
  mmc: dw-mmc-rockchip: Fix handling invalid clock rates
  mmc: dw_mmc: Support setting f_min from host drivers
  mmc: host: Drop commas after SoC match table sentinels
  mmc: rtsx: add 74 Clocks in power on flow
  dt-bindings: mmc: renesas,sdhi: Document RZ/V2L SoC
  mmc: sh_mmcif: Simplify division/shift logic
  mmc: sdhci_am654: Add Support for TI's AM62 SoC
  dt-bindings: mmc: imx-esdhc: Add imx93 compatible string
  dt-bindings: mmc: sdhci-am654: Add compatible string for AM62 SoC
  mmc: sdhci_am654: Fix the driver data of AM64 SoC
  mmc: core: use sysfs_emit() instead of sprintf()
  ...
parents c7d4b153 dc3d879c
......@@ -24,6 +24,7 @@ properties:
- const: allwinner,sun7i-a20-mmc
- const: allwinner,sun8i-a83t-emmc
- const: allwinner,sun9i-a80-mmc
- const: allwinner,sun20i-d1-mmc
- const: allwinner,sun50i-a64-emmc
- const: allwinner,sun50i-a64-mmc
- const: allwinner,sun50i-a100-emmc
......@@ -49,12 +50,18 @@ properties:
- items:
- const: allwinner,sun50i-h6-mmc
- const: allwinner,sun50i-a64-mmc
- items:
- const: allwinner,sun20i-d1-emmc
- const: allwinner,sun50i-a100-emmc
- items:
- const: allwinner,sun50i-h616-emmc
- const: allwinner,sun50i-a100-emmc
- items:
- const: allwinner,sun50i-h616-mmc
- const: allwinner,sun50i-a100-mmc
- items:
- const: allwinner,suniv-f1c100s-mmc
- const: allwinner,sun7i-a20-mmc
reg:
maxItems: 1
......
......@@ -47,6 +47,7 @@ properties:
- const: fsl,imx7d-usdhc
- items:
- enum:
- fsl,imx93-usdhc
- fsl,imx8ulp-usdhc
- const: fsl,imx8mm-usdhc
......
# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/litex,mmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LiteX LiteSDCard device
maintainers:
- Gabriel Somlo <gsomlo@gmail.com>
description: |
LiteSDCard is a small footprint, configurable SDCard core for FPGA based
system on chips.
The hardware source is Open Source and can be found on at
https://github.com/enjoy-digital/litesdcard/.
allOf:
- $ref: mmc-controller.yaml#
properties:
compatible:
const: litex,mmc
reg:
items:
- description: PHY registers
- description: CORE registers
- description: DMA Reader buffer
- description: DMA Writer buffer
- description: IRQ registers
minItems: 4
reg-names:
items:
- const: phy
- const: core
- const: reader
- const: writer
- const: irq
minItems: 4
clocks:
maxItems: 1
description:
Handle to reference clock.
vmmc-supply:
description:
Handle to fixed-voltage supply for the card power.
interrupts:
maxItems: 1
required:
- compatible
- reg
- reg-names
- clocks
- vmmc-supply
additionalProperties: false
examples:
- |
mmc: mmc@12005000 {
compatible = "litex,mmc";
reg = <0x12005000 0x100>,
<0x12003800 0x100>,
<0x12003000 0x100>,
<0x12004800 0x100>,
<0x12004000 0x100>;
reg-names = "phy", "core", "reader", "writer", "irq";
clocks = <&reference_clk>;
vmmc-supply = <&vreg_mmc>;
interrupts = <4>;
};
......@@ -29,6 +29,9 @@ properties:
- items:
- const: mediatek,mt7623-mmc
- const: mediatek,mt2701-mmc
- items:
- const: mediatek,mt8186-mmc
- const: mediatek,mt8183-mmc
- items:
- const: mediatek,mt8192-mmc
- const: mediatek,mt8183-mmc
......
......@@ -57,7 +57,9 @@ properties:
- renesas,sdhi-r8a77990 # R-Car E3
- renesas,sdhi-r8a77995 # R-Car D3
- renesas,sdhi-r8a779a0 # R-Car V3U
- renesas,sdhi-r9a07g043 # RZ/G2UL
- renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
- renesas,sdhi-r9a07g054 # RZ/V2L
- const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
reg:
......@@ -107,7 +109,10 @@ allOf:
properties:
compatible:
contains:
const: renesas,sdhi-r9a07g044
enum:
- renesas,sdhi-r9a07g043
- renesas,sdhi-r9a07g044
- renesas,sdhi-r9a07g054
then:
properties:
clocks:
......
......@@ -21,6 +21,7 @@ properties:
- const: ti,j721e-sdhci-4bit
- const: ti,am64-sdhci-8bit
- const: ti,am64-sdhci-4bit
- const: ti,am62-sdhci
- items:
- const: ti,j7200-sdhci-8bit
- const: ti,j721e-sdhci-8bit
......
......@@ -14,6 +14,7 @@ Required properties:
full compatible strings with SoC and version:
"qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
"qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
"qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
"qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
"qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
"qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
......
......@@ -11158,12 +11158,17 @@ F: lib/list-test.c
LITEX PLATFORM
M: Karol Gugala <kgugala@antmicro.com>
M: Mateusz Holenko <mholenko@antmicro.com>
M: Gabriel Somlo <gsomlo@gmail.com>
M: Joel Stanley <joel@jms.id.au>
S: Maintained
F: Documentation/devicetree/bindings/*/litex,*.yaml
F: arch/openrisc/boot/dts/or1klitex.dts
F: drivers/soc/litex/litex_soc_ctrl.c
F: drivers/tty/serial/liteuart.c
F: include/linux/litex.h
F: drivers/tty/serial/liteuart.c
F: drivers/soc/litex/*
F: drivers/net/ethernet/litex/*
F: drivers/mmc/host/litex_mmc.c
N: litex
LIVE PATCHING
M: Josh Poimboeuf <jpoimboe@redhat.com>
......
......@@ -15,6 +15,7 @@
#include <linux/stat.h>
#include <linux/of.h>
#include <linux/pm_runtime.h>
#include <linux/sysfs.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
......@@ -34,13 +35,13 @@ static ssize_t type_show(struct device *dev,
switch (card->type) {
case MMC_TYPE_MMC:
return sprintf(buf, "MMC\n");
return sysfs_emit(buf, "MMC\n");
case MMC_TYPE_SD:
return sprintf(buf, "SD\n");
return sysfs_emit(buf, "SD\n");
case MMC_TYPE_SDIO:
return sprintf(buf, "SDIO\n");
return sysfs_emit(buf, "SDIO\n");
case MMC_TYPE_SD_COMBO:
return sprintf(buf, "SDcombo\n");
return sysfs_emit(buf, "SDcombo\n");
default:
return -EFAULT;
}
......
......@@ -9,6 +9,7 @@
#define _MMC_CORE_BUS_H
#include <linux/device.h>
#include <linux/sysfs.h>
struct mmc_host;
struct mmc_card;
......@@ -17,7 +18,7 @@ struct mmc_card;
static ssize_t mmc_##name##_show (struct device *dev, struct device_attribute *attr, char *buf) \
{ \
struct mmc_card *card = mmc_dev_to_card(dev); \
return sprintf(buf, fmt, args); \
return sysfs_emit(buf, fmt, args); \
} \
static DEVICE_ATTR(name, S_IRUGO, mmc_##name##_show, NULL)
......
......@@ -588,6 +588,25 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev)
EXPORT_SYMBOL(mmc_alloc_host);
static int mmc_validate_host_caps(struct mmc_host *host)
{
struct device *dev = host->parent;
u32 caps = host->caps, caps2 = host->caps2;
if (caps & MMC_CAP_SDIO_IRQ && !host->ops->enable_sdio_irq) {
dev_warn(dev, "missing ->enable_sdio_irq() ops\n");
return -EINVAL;
}
if (caps2 & (MMC_CAP2_HS400_ES | MMC_CAP2_HS400) &&
!(caps & MMC_CAP_8_BIT_DATA)) {
dev_warn(dev, "drop HS400 support since no 8-bit bus\n");
host->caps2 = caps2 & ~MMC_CAP2_HS400_ES & ~MMC_CAP2_HS400;
}
return 0;
}
/**
* mmc_add_host - initialise host hardware
* @host: mmc host
......@@ -600,8 +619,9 @@ int mmc_add_host(struct mmc_host *host)
{
int err;
WARN_ON((host->caps & MMC_CAP_SDIO_IRQ) &&
!host->ops->enable_sdio_irq);
err = mmc_validate_host_caps(host);
if (err)
return err;
err = device_add(&host->class_dev);
if (err)
......
......@@ -12,6 +12,7 @@
#include <linux/slab.h>
#include <linux/stat.h>
#include <linux/pm_runtime.h>
#include <linux/sysfs.h>
#include <linux/mmc/host.h>
#include <linux/mmc/card.h>
......@@ -812,12 +813,11 @@ static ssize_t mmc_fwrev_show(struct device *dev,
{
struct mmc_card *card = mmc_dev_to_card(dev);
if (card->ext_csd.rev < 7) {
return sprintf(buf, "0x%x\n", card->cid.fwrev);
} else {
return sprintf(buf, "0x%*phN\n", MMC_FIRMWARE_LEN,
card->ext_csd.fwrev);
}
if (card->ext_csd.rev < 7)
return sysfs_emit(buf, "0x%x\n", card->cid.fwrev);
else
return sysfs_emit(buf, "0x%*phN\n", MMC_FIRMWARE_LEN,
card->ext_csd.fwrev);
}
static DEVICE_ATTR(fwrev, S_IRUGO, mmc_fwrev_show, NULL);
......@@ -830,10 +830,10 @@ static ssize_t mmc_dsr_show(struct device *dev,
struct mmc_host *host = card->host;
if (card->csd.dsr_imp && host->dsr_req)
return sprintf(buf, "0x%x\n", host->dsr);
return sysfs_emit(buf, "0x%x\n", host->dsr);
else
/* return default DSR value */
return sprintf(buf, "0x%x\n", 0x404);
return sysfs_emit(buf, "0x%x\n", 0x404);
}
static DEVICE_ATTR(dsr, S_IRUGO, mmc_dsr_show, NULL);
......@@ -1355,11 +1355,6 @@ static int mmc_select_hs400es(struct mmc_card *card)
int err = -EINVAL;
u8 val;
if (!(host->caps & MMC_CAP_8_BIT_DATA)) {
err = -ENOTSUPP;
goto out_err;
}
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V)
err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
......@@ -1523,13 +1518,23 @@ static int mmc_select_timing(struct mmc_card *card)
if (!mmc_can_ext_csd(card))
goto bus_speed;
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES)
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES) {
err = mmc_select_hs400es(card);
else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200)
goto out;
}
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200) {
err = mmc_select_hs200(card);
else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS)
if (err == -EBADMSG)
card->mmc_avail_type &= ~EXT_CSD_CARD_TYPE_HS200;
else
goto out;
}
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS)
err = mmc_select_hs(card);
out:
if (err && err != -EBADMSG)
return err;
......
......@@ -13,6 +13,7 @@
#include <linux/stat.h>
#include <linux/pm_runtime.h>
#include <linux/scatterlist.h>
#include <linux/sysfs.h>
#include <linux/mmc/host.h>
#include <linux/mmc/card.h>
......@@ -708,18 +709,16 @@ MMC_DEV_ATTR(ocr, "0x%08x\n", card->ocr);
MMC_DEV_ATTR(rca, "0x%04x\n", card->rca);
static ssize_t mmc_dsr_show(struct device *dev,
struct device_attribute *attr,
char *buf)
static ssize_t mmc_dsr_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct mmc_card *card = mmc_dev_to_card(dev);
struct mmc_host *host = card->host;
if (card->csd.dsr_imp && host->dsr_req)
return sprintf(buf, "0x%x\n", host->dsr);
else
/* return default DSR value */
return sprintf(buf, "0x%x\n", 0x404);
struct mmc_card *card = mmc_dev_to_card(dev);
struct mmc_host *host = card->host;
if (card->csd.dsr_imp && host->dsr_req)
return sysfs_emit(buf, "0x%x\n", host->dsr);
/* return default DSR value */
return sysfs_emit(buf, "0x%x\n", 0x404);
}
static DEVICE_ATTR(dsr, S_IRUGO, mmc_dsr_show, NULL);
......@@ -735,9 +734,9 @@ static ssize_t info##num##_show(struct device *dev, struct device_attribute *att
\
if (num > card->num_info) \
return -ENODATA; \
if (!card->info[num-1][0]) \
if (!card->info[num - 1][0]) \
return 0; \
return sprintf(buf, "%s\n", card->info[num-1]); \
return sysfs_emit(buf, "%s\n", card->info[num - 1]); \
} \
static DEVICE_ATTR_RO(info##num)
......
......@@ -7,6 +7,7 @@
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/sysfs.h>
#include <linux/mmc/host.h>
#include <linux/mmc/card.h>
......@@ -40,9 +41,9 @@ static ssize_t info##num##_show(struct device *dev, struct device_attribute *att
\
if (num > card->num_info) \
return -ENODATA; \
if (!card->info[num-1][0]) \
if (!card->info[num - 1][0]) \
return 0; \
return sprintf(buf, "%s\n", card->info[num-1]); \
return sysfs_emit(buf, "%s\n", card->info[num - 1]); \
} \
static DEVICE_ATTR_RO(info##num)
......
......@@ -14,6 +14,7 @@
#include <linux/pm_runtime.h>
#include <linux/pm_domain.h>
#include <linux/acpi.h>
#include <linux/sysfs.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
......@@ -35,7 +36,7 @@ field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
struct sdio_func *func; \
\
func = dev_to_sdio_func (dev); \
return sprintf(buf, format_string, args); \
return sysfs_emit(buf, format_string, args); \
} \
static DEVICE_ATTR_RO(field)
......@@ -52,9 +53,9 @@ static ssize_t info##num##_show(struct device *dev, struct device_attribute *att
\
if (num > func->num_info) \
return -ENODATA; \
if (!func->info[num-1][0]) \
if (!func->info[num - 1][0]) \
return 0; \
return sprintf(buf, "%s\n", func->info[num-1]); \
return sysfs_emit(buf, "%s\n", func->info[num - 1]); \
} \
static DEVICE_ATTR_RO(info##num)
......
......@@ -1094,3 +1094,16 @@ config MMC_OWL
config MMC_SDHCI_EXTERNAL_DMA
bool
config MMC_LITEX
tristate "LiteX MMC Host Controller support"
depends on ((PPC_MICROWATT || LITEX) && OF && HAVE_CLK) || COMPILE_TEST
select REGULATOR
select REGULATOR_FIXED_VOLTAGE
help
This selects support for the MMC Host Controller found in LiteX SoCs.
To compile this driver as a module, choose M here: the
module will be called litex_mmc.
If unsure, say N.
......@@ -101,6 +101,7 @@ obj-$(CONFIG_MMC_CQHCI) += cqhci.o
cqhci-y += cqhci-core.o
cqhci-$(CONFIG_MMC_CRYPTO) += cqhci-crypto.o
obj-$(CONFIG_MMC_HSQ) += mmc_hsq.o
obj-$(CONFIG_MMC_LITEX) += litex_mmc.o
ifeq ($(CONFIG_CB710_DEBUG),y)
CFLAGS-cb710-mmc += -DDEBUG
......
......@@ -1189,7 +1189,6 @@ static int mmc_davinci_parse_pdata(struct mmc_host *mmc)
static int davinci_mmcsd_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
struct mmc_davinci_host *host = NULL;
struct mmc_host *mmc = NULL;
struct resource *r, *mem = NULL;
......@@ -1235,9 +1234,8 @@ static int davinci_mmcsd_probe(struct platform_device *pdev)
host->mmc_input_clk = clk_get_rate(host->clk);
match = of_match_device(davinci_mmc_dt_ids, &pdev->dev);
if (match) {
pdev->id_entry = match->data;
pdev->id_entry = of_device_get_match_data(&pdev->dev);
if (pdev->id_entry) {
ret = mmc_of_parse(mmc);
if (ret) {
dev_err_probe(&pdev->dev, ret,
......@@ -1375,8 +1373,12 @@ static int davinci_mmcsd_suspend(struct device *dev)
static int davinci_mmcsd_resume(struct device *dev)
{
struct mmc_davinci_host *host = dev_get_drvdata(dev);
int ret;
ret = clk_enable(host->clk);
if (ret)
return ret;
clk_enable(host->clk);
mmc_davinci_reset_ctrl(host, 0);
return 0;
......
......@@ -15,7 +15,9 @@
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
#define RK3288_CLKGEN_DIV 2
#define RK3288_CLKGEN_DIV 2
static const unsigned int freqs[] = { 100000, 200000, 300000, 400000 };
struct dw_mci_rockchip_priv_data {
struct clk *drv_clk;
......@@ -51,7 +53,7 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
ret = clk_set_rate(host->ciu_clk, cclkin);
if (ret)
dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
dev_warn(host->dev, "failed to set rate %uHz err: %d\n", cclkin, ret);
bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV;
if (bus_hz != host->bus_hz) {
......@@ -290,13 +292,30 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
static int dw_mci_rockchip_init(struct dw_mci *host)
{
int ret, i;
/* It is slot 8 on Rockchip SoCs */
host->sdio_id0 = 8;
if (of_device_is_compatible(host->dev->of_node,
"rockchip,rk3288-dw-mshc"))
if (of_device_is_compatible(host->dev->of_node, "rockchip,rk3288-dw-mshc")) {
host->bus_hz /= RK3288_CLKGEN_DIV;
/* clock driver will fail if the clock is less than the lowest source clock
* divided by the internal clock divider. Test for the lowest available
* clock and set the minimum freq to clock / clock divider.
*/
for (i = 0; i < ARRAY_SIZE(freqs); i++) {
ret = clk_round_rate(host->ciu_clk, freqs[i] * RK3288_CLKGEN_DIV);
if (ret > 0) {
host->minimum_speed = ret / RK3288_CLKGEN_DIV;
break;
}
}
if (ret < 0)
dev_warn(host->dev, "no valid minimum freq: %d\n", ret);
}
return 0;
}
......
......@@ -2898,7 +2898,12 @@ static int dw_mci_init_slot_caps(struct dw_mci_slot *slot)
if (host->pdata->caps2)
mmc->caps2 = host->pdata->caps2;
mmc->f_min = DW_MCI_FREQ_MIN;
/* if host has set a minimum_freq, we should respect it */
if (host->minimum_speed)
mmc->f_min = host->minimum_speed;
else
mmc->f_min = DW_MCI_FREQ_MIN;
if (!mmc->f_max)
mmc->f_max = DW_MCI_FREQ_MAX;
......@@ -3057,8 +3062,7 @@ static void dw_mci_init_dma(struct dw_mci *host)
dev_info(host->dev, "Using internal DMA controller.\n");
} else {
/* TRANS_MODE_EDMAC: check dma bindings again */
if ((device_property_read_string_array(dev, "dma-names",
NULL, 0) < 0) ||
if ((device_property_string_array_count(dev, "dma-names") < 0) ||
!device_property_present(dev, "dmas")) {
goto no_dma;
}
......@@ -3568,7 +3572,7 @@ int dw_mci_runtime_resume(struct device *dev)
mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);
if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios);
/* Force setup bus to guarantee available clock output */
......
......@@ -99,6 +99,7 @@ struct dw_mci_dma_slave {
* @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
* rate and timeout calculations.
* @current_speed: Configured rate of the controller.
* @minimum_speed: Stored minimum rate of the controller.
* @fifoth_val: The value of FIFOTH register.
* @verid: Denote Version ID.
* @dev: Device associated with the MMC controller.
......@@ -201,6 +202,7 @@ struct dw_mci {
u32 bus_hz;
u32 current_speed;
u32 minimum_speed;
u32 fifoth_val;
u16 verid;
struct device *dev;
......
This diff is collapsed.
......@@ -1911,8 +1911,8 @@ static struct msdc_delay_phase get_best_delay(struct msdc_host *host, u32 delay)
final_phase = (start_final + len_final / 3) % PAD_DELAY_MAX;
else
final_phase = (start_final + len_final / 2) % PAD_DELAY_MAX;
dev_info(host->dev, "phase: [map:%x] [maxlen:%d] [final:%d]\n",
delay, len_final, final_phase);
dev_dbg(host->dev, "phase: [map:%x] [maxlen:%d] [final:%d]\n",
delay, len_final, final_phase);
delay_phase.maxlen = len_final;
delay_phase.start = start_final;
......
......@@ -212,7 +212,7 @@ static const struct soc_device_attribute sdhi_quirks_match[] = {
{ .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_4tap },
{ .soc_id = "r8a7796", .revision = "ES1.[012]", .data = &sdhi_quirks_4tap_nohs400 },
{ .soc_id = "r8a7796", .revision = "ES1.*", .data = &sdhi_quirks_r8a7796_es13 },
{ /* Sentinel. */ },
{ /* Sentinel. */ }
};
static const struct renesas_sdhi_of_data_with_quirks of_r8a7795_compatible = {
......
......@@ -38,10 +38,7 @@ struct realtek_pci_sdmmc {
bool double_clk;
bool eject;
bool initial_mode;
int power_state;
#define SDMMC_POWER_ON 1
#define SDMMC_POWER_OFF 0
int prev_power_state;
int sg_count;
s32 cookie;
int cookie_sg_count;
......@@ -905,7 +902,7 @@ static int sd_set_bus_width(struct realtek_pci_sdmmc *host,
return err;
}
static int sd_power_on(struct realtek_pci_sdmmc *host)
static int sd_power_on(struct realtek_pci_sdmmc *host, unsigned char power_mode)
{
struct rtsx_pcr *pcr = host->pcr;
struct mmc_host *mmc = host->mmc;
......@@ -913,9 +910,14 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
u32 val;
u8 test_mode;
if (host->power_state == SDMMC_POWER_ON)
if (host->prev_power_state == MMC_POWER_ON)
return 0;
if (host->prev_power_state == MMC_POWER_UP) {
rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0);
goto finish;
}
msleep(100);
rtsx_pci_init_cmd(pcr);
......@@ -936,10 +938,15 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
if (err < 0)
return err;
mdelay(1);
err = rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN);
if (err < 0)
return err;
/* send at least 74 clocks */
rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN);
if (PCI_PID(pcr) == PID_5261) {
/*
* If test mode is set switch to SD Express mandatorily,
......@@ -964,7 +971,8 @@ static int sd_power_on(struct realtek_pci_sdmmc *host)
}
}
host->power_state = SDMMC_POWER_ON;
finish:
host->prev_power_state = power_mode;
return 0;
}
......@@ -973,7 +981,7 @@ static int sd_power_off(struct realtek_pci_sdmmc *host)
struct rtsx_pcr *pcr = host->pcr;
int err;
host->power_state = SDMMC_POWER_OFF;
host->prev_power_state = MMC_POWER_OFF;
rtsx_pci_init_cmd(pcr);
......@@ -999,7 +1007,7 @@ static int sd_set_power_mode(struct realtek_pci_sdmmc *host,
if (power_mode == MMC_POWER_OFF)
err = sd_power_off(host);
else
err = sd_power_on(host);
err = sd_power_on(host, power_mode);
return err;
}
......@@ -1482,10 +1490,11 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev)
host = mmc_priv(mmc);
host->pcr = pcr;
mmc->ios.power_delay_ms = 5;
host->mmc = mmc;
host->pdev = pdev;
host->cookie = -1;
host->power_state = SDMMC_POWER_OFF;
host->prev_power_state = MMC_POWER_OFF;
INIT_WORK(&host->work, sd_request);
platform_set_drvdata(pdev, host);
pcr->slots[RTSX_SD_CARD].p_dev = pdev;
......
......@@ -308,17 +308,15 @@ static const struct dev_pm_ops sdhci_at91_dev_pm_ops = {
static int sdhci_at91_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
const struct sdhci_at91_soc_data *soc_data;
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_at91_priv *priv;
int ret;
match = of_match_device(sdhci_at91_dt_match, &pdev->dev);
if (!match)
soc_data = of_device_get_match_data(&pdev->dev);
if (!soc_data)
return -EINVAL;
soc_data = match->data;
host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*priv));
if (IS_ERR(host))
......
......@@ -934,7 +934,7 @@ static struct soc_device_attribute soc_tuning_erratum_type1[] = {
{ .family = "QorIQ T1040", },
{ .family = "QorIQ T2080", },
{ .family = "QorIQ LS1021A", },
{ },
{ /* sentinel */ }
};
static struct soc_device_attribute soc_tuning_erratum_type2[] = {
......@@ -944,7 +944,7 @@ static struct soc_device_attribute soc_tuning_erratum_type2[] = {
{ .family = "QorIQ LS1080A", },
{ .family = "QorIQ LS2080A", },
{ .family = "QorIQ LA1575A", },
{ },
{ /* sentinel */ }
};
static void esdhc_tuning_block_enable(struct sdhci_host *host, bool enable)
......@@ -1316,21 +1316,21 @@ static const struct sdhci_pltfm_data sdhci_esdhc_le_pdata = {
static struct soc_device_attribute soc_incorrect_hostver[] = {
{ .family = "QorIQ T4240", .revision = "1.0", },
{ .family = "QorIQ T4240", .revision = "2.0", },
{ },
{ /* sentinel */ }
};
static struct soc_device_attribute soc_fixup_sdhc_clkdivs[] = {
{ .family = "QorIQ LX2160A", .revision = "1.0", },
{ .family = "QorIQ LX2160A", .revision = "2.0", },
{ .family = "QorIQ LS1028A", .revision = "1.0", },
{ },
{ /* sentinel */ }
};
static struct soc_device_attribute soc_unreliable_pulse_detection[] = {
{ .family = "QorIQ LX2160A", .revision = "1.0", },
{ .family = "QorIQ LX2160A", .revision = "2.0", },
{ .family = "QorIQ LS1028A", .revision = "1.0", },
{ },
{ /* sentinel */ }
};
static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host)
......
......@@ -13,6 +13,7 @@
#include <linux/mmc/mmc.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/iopoll.h>
#include "sdhci.h"
#include "sdhci-pci.h"
#include "cqhci.h"
......@@ -63,6 +64,7 @@
#define GLI_9750_MISC_RX_INV_OFF 0x0
#define GLI_9750_MISC_RX_INV_VALUE GLI_9750_MISC_RX_INV_OFF
#define GLI_9750_MISC_TX1_DLY_VALUE 0x5
#define SDHCI_GLI_9750_MISC_SSC_OFF BIT(26)
#define SDHCI_GLI_9750_TUNING_CONTROL 0x540
#define SDHCI_GLI_9750_TUNING_CONTROL_EN BIT(4)
......@@ -137,6 +139,9 @@
#define PCI_GLI_9755_SerDes 0x70
#define PCI_GLI_9755_SCP_DIS BIT(19)
#define PCI_GLI_9755_MISC 0x78
#define PCI_GLI_9755_MISC_SSC_OFF BIT(26)
#define GLI_MAX_TUNING_LOOP 40
/* Genesys Logic chipset */
......@@ -371,6 +376,19 @@ static void gl9750_set_pll(struct sdhci_host *host, u8 dir, u16 ldiv, u8 pdiv)
mdelay(1);
}
static bool gl9750_ssc_enable(struct sdhci_host *host)
{
u32 misc;
u8 off;
gl9750_wt_on(host);
misc = sdhci_readl(host, SDHCI_GLI_9750_MISC);
off = FIELD_GET(SDHCI_GLI_9750_MISC_SSC_OFF, misc);
gl9750_wt_off(host);
return !off;
}
static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
{
u32 pll;
......@@ -392,11 +410,31 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
{
/* set pll to 205MHz and enable ssc */
gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
bool enable = gl9750_ssc_enable(host);
/* set pll to 205MHz and ssc */
gl9750_set_ssc(host, enable, 0xF, 0x5A1D);
gl9750_set_pll(host, 0x1, 0x246, 0x0);
}
static void gl9750_set_ssc_pll_100mhz(struct sdhci_host *host)
{
bool enable = gl9750_ssc_enable(host);
/* set pll to 100MHz and ssc */
gl9750_set_ssc(host, enable, 0xE, 0x51EC);
gl9750_set_pll(host, 0x1, 0x244, 0x1);
}
static void gl9750_set_ssc_pll_50mhz(struct sdhci_host *host)
{
bool enable = gl9750_ssc_enable(host);
/* set pll to 50MHz and ssc */
gl9750_set_ssc(host, enable, 0xE, 0x51EC);
gl9750_set_pll(host, 0x1, 0x244, 0x3);
}
static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct mmc_ios *ios = &host->mmc->ios;
......@@ -414,6 +452,10 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
host->mmc->actual_clock = 205000000;
gl9750_set_ssc_pll_205mhz(host);
} else if (clock == 100000000) {
gl9750_set_ssc_pll_100mhz(host);
} else if (clock == 50000000) {
gl9750_set_ssc_pll_50mhz(host);
}
sdhci_enable_clk(host, clk);
......@@ -514,6 +556,19 @@ static void gl9755_set_pll(struct pci_dev *pdev, u8 dir, u16 ldiv, u8 pdiv)
mdelay(1);
}
static bool gl9755_ssc_enable(struct pci_dev *pdev)
{
u32 misc;
u8 off;
gl9755_wt_on(pdev);
pci_read_config_dword(pdev, PCI_GLI_9755_MISC, &misc);
off = FIELD_GET(PCI_GLI_9755_MISC_SSC_OFF, misc);
gl9755_wt_off(pdev);
return !off;
}
static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
{
u32 pll;
......@@ -535,11 +590,31 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
{
/* set pll to 205MHz and enable ssc */
gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
bool enable = gl9755_ssc_enable(pdev);
/* set pll to 205MHz and ssc */
gl9755_set_ssc(pdev, enable, 0xF, 0x5A1D);
gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
}
static void gl9755_set_ssc_pll_100mhz(struct pci_dev *pdev)
{
bool enable = gl9755_ssc_enable(pdev);
/* set pll to 100MHz and ssc */
gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
gl9755_set_pll(pdev, 0x1, 0x244, 0x1);
}
static void gl9755_set_ssc_pll_50mhz(struct pci_dev *pdev)
{
bool enable = gl9755_ssc_enable(pdev);
/* set pll to 50MHz and ssc */
gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
gl9755_set_pll(pdev, 0x1, 0x244, 0x3);
}
static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct sdhci_pci_slot *slot = sdhci_priv(host);
......@@ -560,6 +635,10 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
host->mmc->actual_clock = 205000000;
gl9755_set_ssc_pll_205mhz(pdev);
} else if (clock == 100000000) {
gl9755_set_ssc_pll_100mhz(pdev);
} else if (clock == 50000000) {
gl9755_set_ssc_pll_50mhz(pdev);
}
sdhci_enable_clk(host, clk);
......@@ -873,6 +952,47 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
}
#ifdef CONFIG_PM
static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
{
struct sdhci_pci_slot *slot = chip->slots[0];
struct sdhci_host *host = slot->host;
u16 clock;
clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
return 0;
}
static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
{
struct sdhci_pci_slot *slot = chip->slots[0];
struct sdhci_host *host = slot->host;
u16 clock;
clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
clock |= SDHCI_CLOCK_PLL_EN;
clock &= ~SDHCI_CLOCK_INT_STABLE;
sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
/* Wait max 150 ms */
if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
pr_err("%s: PLL clock never stabilised.\n",
mmc_hostname(host->mmc));
sdhci_dumpregs(host);
}
clock |= SDHCI_CLOCK_CARD_EN;
sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
return 0;
}
#endif
static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
{
struct pci_dev *pdev = slot->chip->pdev;
......@@ -982,6 +1102,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = {
#ifdef CONFIG_PM_SLEEP
.resume = sdhci_cqhci_gli_resume,
.suspend = sdhci_cqhci_gli_suspend,
#endif
#ifdef CONFIG_PM
.runtime_suspend = gl9763e_runtime_suspend,
.runtime_resume = gl9763e_runtime_resume,
.allow_runtime_pm = true,
#endif
.add_host = gl9763e_add_host,
};
......@@ -1618,7 +1618,6 @@ static int sdhci_tegra_add_host(struct sdhci_host *host)
static int sdhci_tegra_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
const struct sdhci_tegra_soc_data *soc_data;
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
......@@ -1626,10 +1625,9 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
struct clk *clk;
int rc;
match = of_match_device(sdhci_tegra_dt_match, &pdev->dev);
if (!match)
soc_data = of_device_get_match_data(&pdev->dev);
if (!soc_data)
return -EINVAL;
soc_data = match->data;
host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host));
if (IS_ERR(host))
......@@ -1673,6 +1671,9 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
/* HW busy detection is supported, but R1B responses are required. */
host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY;
/* GPIO CD can be set as a wakeup source */
host->mmc->caps |= MMC_CAP_CD_WAKE;
tegra_sdhci_parse_dt(host);
tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",
......@@ -1840,7 +1841,7 @@ static int sdhci_tegra_suspend(struct device *dev)
return ret;
}
return 0;
return mmc_gpio_set_cd_wake(host->mmc, true);
}
static int sdhci_tegra_resume(struct device *dev)
......@@ -1848,6 +1849,10 @@ static int sdhci_tegra_resume(struct device *dev)
struct sdhci_host *host = dev_get_drvdata(dev);
int ret;
ret = mmc_gpio_set_cd_wake(host->mmc, false);
if (ret)
return ret;
ret = pm_runtime_force_resume(dev);
if (ret)
return ret;
......
......@@ -514,26 +514,6 @@ static const struct sdhci_am654_driver_data sdhci_j721e_4bit_drvdata = {
.flags = IOMUX_PRESENT,
};
static const struct sdhci_pltfm_data sdhci_am64_8bit_pdata = {
.ops = &sdhci_j721e_8bit_ops,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
};
static const struct sdhci_am654_driver_data sdhci_am64_8bit_drvdata = {
.pdata = &sdhci_am64_8bit_pdata,
.flags = DLL_PRESENT | DLL_CALIB,
};
static const struct sdhci_pltfm_data sdhci_am64_4bit_pdata = {
.ops = &sdhci_j721e_4bit_ops,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
};
static const struct sdhci_am654_driver_data sdhci_am64_4bit_drvdata = {
.pdata = &sdhci_am64_4bit_pdata,
.flags = IOMUX_PRESENT,
};
static const struct soc_device_attribute sdhci_am654_devices[] = {
{ .family = "AM65X",
.revision = "SR1.0",
......@@ -759,11 +739,15 @@ static const struct of_device_id sdhci_am654_of_match[] = {
},
{
.compatible = "ti,am64-sdhci-8bit",
.data = &sdhci_am64_8bit_drvdata,
.data = &sdhci_j721e_8bit_drvdata,
},
{
.compatible = "ti,am64-sdhci-4bit",
.data = &sdhci_am64_4bit_drvdata,
.data = &sdhci_j721e_4bit_drvdata,
},
{
.compatible = "ti,am62-sdhci",
.data = &sdhci_j721e_4bit_drvdata,
},
{ /* sentinel */ }
};
......
......@@ -521,8 +521,7 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
}
dev_dbg(dev, "clk %u/%u (%u, 0x%x)\n",
(best_freq / (1 << (clkdiv + 1))), clk,
best_freq, clkdiv);
(best_freq >> (clkdiv + 1)), clk, best_freq, clkdiv);
clk_set_rate(host->clk, best_freq);
clkdiv = clkdiv << 16;
......@@ -1012,8 +1011,8 @@ static void sh_mmcif_clk_setup(struct sh_mmcif_host *host)
*/
host->clkdiv_map = 0x3ff;
host->mmc->f_max = f_max / (1 << ffs(host->clkdiv_map));
host->mmc->f_min = f_min / (1 << fls(host->clkdiv_map));
host->mmc->f_max = f_max >> ffs(host->clkdiv_map);
host->mmc->f_min = f_min >> fls(host->clkdiv_map);
} else {
unsigned int clk = clk_get_rate(host->clk);
......
......@@ -1167,6 +1167,14 @@ static const struct sunxi_mmc_cfg sun9i_a80_cfg = {
.can_calibrate = false,
};
static const struct sunxi_mmc_cfg sun20i_d1_cfg = {
.idma_des_size_bits = 13,
.idma_des_shift = 2,
.can_calibrate = true,
.mask_data0 = true,
.needs_new_timings = true,
};
static const struct sunxi_mmc_cfg sun50i_a64_cfg = {
.idma_des_size_bits = 16,
.clk_delays = NULL,
......@@ -1205,6 +1213,7 @@ static const struct of_device_id sunxi_mmc_of_match[] = {
{ .compatible = "allwinner,sun7i-a20-mmc", .data = &sun7i_a20_cfg },
{ .compatible = "allwinner,sun8i-a83t-emmc", .data = &sun8i_a83t_emmc_cfg },
{ .compatible = "allwinner,sun9i-a80-mmc", .data = &sun9i_a80_cfg },
{ .compatible = "allwinner,sun20i-d1-mmc", .data = &sun20i_d1_cfg },
{ .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg },
{ .compatible = "allwinner,sun50i-a64-emmc", .data = &sun50i_a64_emmc_cfg },
{ .compatible = "allwinner,sun50i-a100-mmc", .data = &sun50i_a100_cfg },
......
......@@ -186,10 +186,6 @@ struct tmio_mmc_host {
void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
void (*hs400_downgrade)(struct tmio_mmc_host *host);
void (*hs400_complete)(struct tmio_mmc_host *host);
const struct tmio_mmc_dma_ops *dma_ops;
};
......
......@@ -751,19 +751,16 @@ static int wmt_mci_probe(struct platform_device *pdev)
struct mmc_host *mmc;
struct wmt_mci_priv *priv;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_id =
of_match_device(wmt_mci_dt_ids, &pdev->dev);
const struct wmt_mci_caps *wmt_caps;
int ret;
int regular_irq, dma_irq;
if (!of_id || !of_id->data) {
wmt_caps = of_device_get_match_data(&pdev->dev);
if (!wmt_caps) {
dev_err(&pdev->dev, "Controller capabilities data missing\n");
return -EFAULT;
}
wmt_caps = of_id->data;
if (!np) {
dev_err(&pdev->dev, "Missing SDMMC description in devicetree\n");
return -EFAULT;
......
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