Commit 5c40d493 authored by Jaedon Shin's avatar Jaedon Shin Committed by Ralf Baechle

MIPS: BMIPS: Add support UART, I2C, SATA device

Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based
platforms.
Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Dragan Stancevic <dragan.stancevic@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/13016/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 23021b2b
...@@ -85,14 +85,15 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -85,14 +85,15 @@ upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc"; compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>; reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>; brcm,int-map-mask = <0x44>, <0xf000000>;
brcm,int-fwd-mask = <0x70000>; brcm,int-fwd-mask = <0x70000>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-parent = <&periph_intc>; interrupt-parent = <&periph_intc>;
interrupts = <18>; interrupts = <18>, <19>;
interrupt-names = "upg_main", "upg_bsc";
}; };
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
...@@ -118,6 +119,70 @@ uart0: serial@406b00 { ...@@ -118,6 +119,70 @@ uart0: serial@406b00 {
status = "disabled"; status = "disabled";
}; };
uart1: serial@406b40 {
compatible = "ns16550a";
reg = <0x406b40 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <64>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406b80 {
compatible = "ns16550a";
reg = <0x406b80 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <65>;
clocks = <&uart_clk>;
status = "disabled";
};
bsca: i2c@406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406200 0x58>;
interrupts = <24>;
interrupt-names = "upg_bsca";
status = "disabled";
};
bscb: i2c@406280 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406280 0x58>;
interrupts = <25>;
interrupt-names = "upg_bscb";
status = "disabled";
};
bscc: i2c@406300 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406300 0x58>;
interrupts = <26>;
interrupt-names = "upg_bscc";
status = "disabled";
};
bscd: i2c@406380 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406380 0x58>;
interrupts = <27>;
interrupt-names = "upg_bscd";
status = "disabled";
};
ehci0: usb@488300 { ehci0: usb@488300 {
compatible = "brcm,bcm7125-ehci", "generic-ehci"; compatible = "brcm,bcm7125-ehci", "generic-ehci";
reg = <0x488300 0x100>; reg = <0x488300 0x100>;
......
...@@ -24,8 +24,6 @@ cpu@1 { ...@@ -24,8 +24,6 @@ cpu@1 {
aliases { aliases {
uart0 = &uart0; uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
}; };
cpu_intc: cpu_intc { cpu_intc: cpu_intc {
......
...@@ -18,8 +18,6 @@ cpu@0 { ...@@ -18,8 +18,6 @@ cpu@0 {
aliases { aliases {
uart0 = &uart0; uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
}; };
cpu_intc: cpu_intc { cpu_intc: cpu_intc {
......
...@@ -18,8 +18,6 @@ cpu@0 { ...@@ -18,8 +18,6 @@ cpu@0 {
aliases { aliases {
uart0 = &uart0; uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
}; };
cpu_intc: cpu_intc { cpu_intc: cpu_intc {
...@@ -241,5 +239,45 @@ ohci0: usb@480400 { ...@@ -241,5 +239,45 @@ ohci0: usb@480400 {
interrupts = <66>; interrupts = <66>;
status = "disabled"; status = "disabled";
}; };
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
interrupt-parent = <&periph_intc>;
interrupts = <86>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata0: sata-port@0 {
reg = <0>;
phys = <&sata_phy0>;
};
sata1: sata-port@1 {
reg = <1>;
phys = <&sata_phy1>;
};
};
sata_phy: sata-phy@180100 {
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
reg = <0x180100 0x0eff>;
reg-names = "phy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata_phy0: sata-phy@0 {
reg = <0>;
#phy-cells = <0>;
};
sata_phy1: sata-phy@1 {
reg = <1>;
#phy-cells = <0>;
};
};
}; };
}; };
...@@ -24,8 +24,6 @@ cpu@1 { ...@@ -24,8 +24,6 @@ cpu@1 {
aliases { aliases {
uart0 = &uart0; uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
}; };
cpu_intc: cpu_intc { cpu_intc: cpu_intc {
......
...@@ -86,14 +86,15 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -86,14 +86,15 @@ upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc"; compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>; reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>; brcm,int-map-mask = <0x44>, <0x1f000000>;
brcm,int-fwd-mask = <0x70000>; brcm,int-fwd-mask = <0x70000>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-parent = <&periph_intc>; interrupt-parent = <&periph_intc>;
interrupts = <18>; interrupts = <18>, <19>;
interrupt-names = "upg_main", "upg_bsc";
}; };
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
...@@ -118,6 +119,78 @@ uart0: serial@406b00 { ...@@ -118,6 +119,78 @@ uart0: serial@406b00 {
status = "disabled"; status = "disabled";
}; };
uart1: serial@406b40 {
compatible = "ns16550a";
reg = <0x406b40 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <64>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406b80 {
compatible = "ns16550a";
reg = <0x406b80 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <65>;
clocks = <&uart_clk>;
status = "disabled";
};
bsca: i2c@406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406200 0x58>;
interrupts = <24>;
interrupt-names = "upg_bsca";
status = "disabled";
};
bscb: i2c@406280 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406280 0x58>;
interrupts = <25>;
interrupt-names = "upg_bscb";
status = "disabled";
};
bscc: i2c@406300 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406300 0x58>;
interrupts = <26>;
interrupt-names = "upg_bscc";
status = "disabled";
};
bscd: i2c@406380 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406380 0x58>;
interrupts = <27>;
interrupt-names = "upg_bscd";
status = "disabled";
};
bsce: i2c@406800 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406800 0x58>;
interrupts = <28>;
interrupt-names = "upg_bsce";
status = "disabled";
};
enet0: ethernet@468000 { enet0: ethernet@468000 {
phy-mode = "internal"; phy-mode = "internal";
phy-handle = <&phy1>; phy-handle = <&phy1>;
......
...@@ -87,14 +87,32 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -87,14 +87,32 @@ upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc"; compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>; reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>; brcm,int-map-mask = <0x44>, <0x7000000>;
brcm,int-fwd-mask = <0x70000>; brcm,int-fwd-mask = <0x70000>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-parent = <&periph_intc>; interrupt-parent = <&periph_intc>;
interrupts = <55>; interrupts = <55>, <53>;
interrupt-names = "upg_main", "upg_bsc";
};
upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x409480 0x8>;
brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
brcm,int-fwd-mask = <0>;
brcm,irq-can-wake;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <56>, <54>, <59>;
interrupt-names = "upg_main_aon", "upg_bsc_aon",
"upg_spi";
}; };
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
...@@ -119,6 +137,78 @@ uart0: serial@406b00 { ...@@ -119,6 +137,78 @@ uart0: serial@406b00 {
status = "disabled"; status = "disabled";
}; };
uart1: serial@406b40 {
compatible = "ns16550a";
reg = <0x406b40 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406b80 {
compatible = "ns16550a";
reg = <0x406b80 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <63>;
clocks = <&uart_clk>;
status = "disabled";
};
bsca: i2c@409180 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_aon_irq0_intc>;
reg = <0x409180 0x58>;
interrupts = <27>;
interrupt-names = "upg_bsca";
status = "disabled";
};
bscb: i2c@409400 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_aon_irq0_intc>;
reg = <0x409400 0x58>;
interrupts = <28>;
interrupt-names = "upg_bscb";
status = "disabled";
};
bscc: i2c@406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406200 0x58>;
interrupts = <24>;
interrupt-names = "upg_bscc";
status = "disabled";
};
bscd: i2c@406280 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406280 0x58>;
interrupts = <25>;
interrupt-names = "upg_bscd";
status = "disabled";
};
bsce: i2c@406300 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406300 0x58>;
interrupts = <26>;
interrupt-names = "upg_bsce";
status = "disabled";
};
enet0: ethernet@b80000 { enet0: ethernet@b80000 {
phy-mode = "internal"; phy-mode = "internal";
phy-handle = <&phy1>; phy-handle = <&phy1>;
......
...@@ -102,14 +102,32 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -102,14 +102,32 @@ upg_irq0_intc: upg_irq0_intc@406780 {
compatible = "brcm,bcm7120-l2-intc"; compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>; reg = <0x406780 0x8>;
brcm,int-map-mask = <0x44>; brcm,int-map-mask = <0x44>, <0x7000000>;
brcm,int-fwd-mask = <0x70000>; brcm,int-fwd-mask = <0x70000>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-parent = <&periph_intc>; interrupt-parent = <&periph_intc>;
interrupts = <60>; interrupts = <60>, <58>;
interrupt-names = "upg_main", "upg_bsc";
};
upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x409480 0x8>;
brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
brcm,int-fwd-mask = <0>;
brcm,irq-can-wake;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&periph_intc>;
interrupts = <61>, <59>, <64>;
interrupt-names = "upg_main_aon", "upg_bsc_aon",
"upg_spi";
}; };
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
...@@ -134,6 +152,78 @@ uart0: serial@406b00 { ...@@ -134,6 +152,78 @@ uart0: serial@406b00 {
status = "disabled"; status = "disabled";
}; };
uart1: serial@406b40 {
compatible = "ns16550a";
reg = <0x406b40 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <67>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406b80 {
compatible = "ns16550a";
reg = <0x406b80 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
interrupt-parent = <&periph_intc>;
interrupts = <68>;
clocks = <&uart_clk>;
status = "disabled";
};
bsca: i2c@406300 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406300 0x58>;
interrupts = <26>;
interrupt-names = "upg_bsca";
status = "disabled";
};
bscb: i2c@409400 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_aon_irq0_intc>;
reg = <0x409400 0x58>;
interrupts = <28>;
interrupt-names = "upg_bscb";
status = "disabled";
};
bscc: i2c@406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406200 0x58>;
interrupts = <24>;
interrupt-names = "upg_bscc";
status = "disabled";
};
bscd: i2c@406280 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_irq0_intc>;
reg = <0x406280 0x58>;
interrupts = <25>;
interrupt-names = "upg_bscd";
status = "disabled";
};
bsce: i2c@409180 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&upg_aon_irq0_intc>;
reg = <0x409180 0x58>;
interrupts = <27>;
interrupt-names = "upg_bsce";
status = "disabled";
};
enet0: ethernet@b80000 { enet0: ethernet@b80000 {
phy-mode = "internal"; phy-mode = "internal";
phy-handle = <&phy1>; phy-handle = <&phy1>;
...@@ -236,5 +326,45 @@ ohci3: usb@490600 { ...@@ -236,5 +326,45 @@ ohci3: usb@490600 {
interrupts = <78>; interrupts = <78>;
status = "disabled"; status = "disabled";
}; };
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
interrupt-parent = <&periph_intc>;
interrupts = <45>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata0: sata-port@0 {
reg = <0>;
phys = <&sata_phy0>;
};
sata1: sata-port@1 {
reg = <1>;
phys = <&sata_phy1>;
};
};
sata_phy: sata-phy@180100 {
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
reg = <0x180100 0x0eff>;
reg-names = "phy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata_phy0: sata-phy@0 {
reg = <0>;
#phy-cells = <0>;
};
sata_phy1: sata-phy@1 {
reg = <1>;
#phy-cells = <0>;
};
};
}; };
}; };
...@@ -21,6 +21,30 @@ &uart0 { ...@@ -21,6 +21,30 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&bsca {
status = "okay";
};
&bscb {
status = "okay";
};
&bscc {
status = "okay";
};
&bscd {
status = "okay";
};
/* FIXME: USB is wonky; disable it for now */ /* FIXME: USB is wonky; disable it for now */
&ehci0 { &ehci0 {
status = "disabled"; status = "disabled";
......
...@@ -56,3 +56,11 @@ &ehci0 { ...@@ -56,3 +56,11 @@ &ehci0 {
&ohci0 { &ohci0 {
status = "okay"; status = "okay";
}; };
&sata {
status = "okay";
};
&sata_phy {
status = "okay";
};
...@@ -23,6 +23,34 @@ &uart0 { ...@@ -23,6 +23,34 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&bsca {
status = "okay";
};
&bscb {
status = "okay";
};
&bscc {
status = "okay";
};
&bscd {
status = "okay";
};
&bsce {
status = "okay";
};
/* FIXME: MAC driver comes up but cannot attach to PHY */ /* FIXME: MAC driver comes up but cannot attach to PHY */
&enet0 { &enet0 {
status = "disabled"; status = "disabled";
......
...@@ -23,6 +23,34 @@ &uart0 { ...@@ -23,6 +23,34 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&bsca {
status = "okay";
};
&bscb {
status = "okay";
};
&bscc {
status = "okay";
};
&bscd {
status = "okay";
};
&bsce {
status = "okay";
};
&enet0 { &enet0 {
status = "okay"; status = "okay";
}; };
......
...@@ -23,6 +23,34 @@ &uart0 { ...@@ -23,6 +23,34 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&bsca {
status = "okay";
};
&bscb {
status = "okay";
};
&bscc {
status = "okay";
};
&bscd {
status = "okay";
};
&bsce {
status = "okay";
};
&enet0 { &enet0 {
status = "okay"; status = "okay";
}; };
...@@ -58,3 +86,11 @@ &ehci3 { ...@@ -58,3 +86,11 @@ &ehci3 {
&ohci3 { &ohci3 {
status = "okay"; status = "okay";
}; };
&sata {
status = "okay";
};
&sata_phy {
status = "okay";
};
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