Commit 5e2fe1e7 authored by Peter Griffin's avatar Peter Griffin Committed by Vinod Koul

dmaengine: fsl-edma: Fix clock handling error paths

Currently fsl-edma doesn't clk_disable_unprepare()
its clocks on error conditions. This patch adds a
fsl_disable_clocks helper for this, and also only
disables clocks which were enabled if encountering
an error whilst enabling clocks.
Signed-off-by: default avatarPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 1a695a90
...@@ -852,6 +852,14 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma ...@@ -852,6 +852,14 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma
return 0; return 0;
} }
static void fsl_disable_clocks(struct fsl_edma_engine *fsl_edma)
{
int i;
for (i = 0; i < DMAMUX_NR; i++)
clk_disable_unprepare(fsl_edma->muxclk[i]);
}
static int fsl_edma_probe(struct platform_device *pdev) static int fsl_edma_probe(struct platform_device *pdev)
{ {
struct device_node *np = pdev->dev.of_node; struct device_node *np = pdev->dev.of_node;
...@@ -897,6 +905,10 @@ static int fsl_edma_probe(struct platform_device *pdev) ...@@ -897,6 +905,10 @@ static int fsl_edma_probe(struct platform_device *pdev)
ret = clk_prepare_enable(fsl_edma->muxclk[i]); ret = clk_prepare_enable(fsl_edma->muxclk[i]);
if (ret) { if (ret) {
/* disable only clks which were enabled on error */
for (; i >= 0; i--)
clk_disable_unprepare(fsl_edma->muxclk[i]);
dev_err(&pdev->dev, "DMAMUX clk block failed.\n"); dev_err(&pdev->dev, "DMAMUX clk block failed.\n");
return ret; return ret;
} }
...@@ -952,6 +964,7 @@ static int fsl_edma_probe(struct platform_device *pdev) ...@@ -952,6 +964,7 @@ static int fsl_edma_probe(struct platform_device *pdev)
ret = dma_async_device_register(&fsl_edma->dma_dev); ret = dma_async_device_register(&fsl_edma->dma_dev);
if (ret) { if (ret) {
dev_err(&pdev->dev, "Can't register Freescale eDMA engine.\n"); dev_err(&pdev->dev, "Can't register Freescale eDMA engine.\n");
fsl_disable_clocks(fsl_edma);
return ret; return ret;
} }
...@@ -959,6 +972,7 @@ static int fsl_edma_probe(struct platform_device *pdev) ...@@ -959,6 +972,7 @@ static int fsl_edma_probe(struct platform_device *pdev)
if (ret) { if (ret) {
dev_err(&pdev->dev, "Can't register Freescale eDMA of_dma.\n"); dev_err(&pdev->dev, "Can't register Freescale eDMA of_dma.\n");
dma_async_device_unregister(&fsl_edma->dma_dev); dma_async_device_unregister(&fsl_edma->dma_dev);
fsl_disable_clocks(fsl_edma);
return ret; return ret;
} }
...@@ -972,13 +986,10 @@ static int fsl_edma_remove(struct platform_device *pdev) ...@@ -972,13 +986,10 @@ static int fsl_edma_remove(struct platform_device *pdev)
{ {
struct device_node *np = pdev->dev.of_node; struct device_node *np = pdev->dev.of_node;
struct fsl_edma_engine *fsl_edma = platform_get_drvdata(pdev); struct fsl_edma_engine *fsl_edma = platform_get_drvdata(pdev);
int i;
of_dma_controller_free(np); of_dma_controller_free(np);
dma_async_device_unregister(&fsl_edma->dma_dev); dma_async_device_unregister(&fsl_edma->dma_dev);
fsl_disable_clocks(fsl_edma);
for (i = 0; i < DMAMUX_NR; i++)
clk_disable_unprepare(fsl_edma->muxclk[i]);
return 0; return 0;
} }
......
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