Commit 5e9c4451 authored by Kent Russell's avatar Kent Russell Committed by Alex Deucher

drm/amdgpu: Fix unique_id references for Sienna Cichlid

Since unique_id is only supported in PMFW 0x3A5300 and higher, we will
only be able to use it inside Smu_Metrics_V3_t, which requires PMFW
0x3A4900 and higher. Remove the unique_id/serial_number references from
the v1 and v2 tables to avoid any confusion, and return 0 if metrics_v1
or metrics_v2 are used to try to get the unique_id/serial_number.
Signed-off-by: default avatarKent Russell <kent.russell@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9696679b
......@@ -1420,9 +1420,6 @@ typedef struct {
uint8_t PcieWidth ;
uint16_t AverageGfxclkFrequencyTarget;
uint32_t PublicSerialNumLower32;
uint32_t PublicSerialNumUpper32;
uint16_t Padding16_2;
} SmuMetrics_t;
......@@ -1480,9 +1477,6 @@ typedef struct {
uint8_t PcieWidth ;
uint16_t AverageGfxclkFrequencyTarget;
uint32_t PublicSerialNumLower32;
uint32_t PublicSerialNumUpper32;
uint16_t Padding16_2;
} SmuMetrics_V2_t;
......
......@@ -716,14 +716,12 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
use_metrics_v2 ? metrics_v2->CurrFanSpeed : metrics->CurrFanSpeed;
break;
case METRICS_UNIQUE_ID_UPPER32:
*value = use_metrics_v3 ? metrics_v3->PublicSerialNumUpper32 :
use_metrics_v2 ? metrics_v2->PublicSerialNumUpper32 :
metrics->PublicSerialNumUpper32;
/* Only supported in 0x3A5300+, metrics_v3 requires 0x3A4900+ */
*value = use_metrics_v3 ? metrics_v3->PublicSerialNumUpper32 : 0;
break;
case METRICS_UNIQUE_ID_LOWER32:
*value = use_metrics_v3 ? metrics_v3->PublicSerialNumLower32 :
use_metrics_v2 ? metrics_v2->PublicSerialNumLower32 :
metrics->PublicSerialNumLower32;
/* Only supported in 0x3A5300+, metrics_v3 requires 0x3A4900+ */
*value = use_metrics_v3 ? metrics_v3->PublicSerialNumLower32 : 0;
break;
default:
*value = UINT_MAX;
......
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