Commit 5f8e077c authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville

ath9k: simplify regulatory code

Now that cfg80211 has its own regulatory infrastructure we can
condense ath9k's regulatory code considerably. We only keep data
we need to provide our own regulatory_hint(), reg_notifier() and
information necessary for calibration.

Atheros hardware supports 12 world regulatory domains, since these
are custom we apply them through the the new wiphy_apply_custom_regulatory().
Although we have 12 we can consolidate these into 5 structures based on
frequency and apply a different set of flags that differentiate them on
a case by case basis through the reg_notifier().

If CRDA is not found our own custom world regulatory domain is applied,
this is identical to cfg80211's except we enable passive scan on most
frequencies.
Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 24ed1da1
...@@ -457,22 +457,12 @@ struct ath9k_channel { ...@@ -457,22 +457,12 @@ struct ath9k_channel {
struct ieee80211_channel *chan; struct ieee80211_channel *chan;
u16 channel; u16 channel;
u32 channelFlags; u32 channelFlags;
u8 privFlags;
int8_t maxRegTxPower;
int8_t maxTxPower;
int8_t minTxPower;
u32 chanmode; u32 chanmode;
int32_t CalValid; int32_t CalValid;
bool oneTimeCalsDone; bool oneTimeCalsDone;
int8_t iCoff; int8_t iCoff;
int8_t qCoff; int8_t qCoff;
int16_t rawNoiseFloor; int16_t rawNoiseFloor;
int8_t antennaMax;
u32 regDmnFlags;
u32 conformanceTestLimit[3]; /* 0:11a, 1: 11b, 2:11g */
#ifdef ATH_NF_PER_CHAN
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
#endif
}; };
#define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \ #define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \
...@@ -500,7 +490,6 @@ struct ath9k_channel { ...@@ -500,7 +490,6 @@ struct ath9k_channel {
((_c)->chanmode == CHANNEL_G_HT40MINUS)) ((_c)->chanmode == CHANNEL_G_HT40MINUS))
#define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c))) #define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c)))
#define IS_CHAN_IN_PUBLIC_SAFETY_BAND(_c) ((_c) > 4940 && (_c) < 4990)
#define IS_CHAN_A_5MHZ_SPACED(_c) \ #define IS_CHAN_A_5MHZ_SPACED(_c) \
((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \
(((_c)->channel % 20) != 0) && \ (((_c)->channel % 20) != 0) && \
...@@ -790,15 +779,13 @@ struct ath_hal { ...@@ -790,15 +779,13 @@ struct ath_hal {
u16 ah_currentRD; u16 ah_currentRD;
u16 ah_currentRDExt; u16 ah_currentRDExt;
u16 ah_currentRDInUse; u16 ah_currentRDInUse;
u16 ah_currentRD5G; char alpha2[2];
u16 ah_currentRD2G; struct reg_dmn_pair_mapping *regpair;
char ah_iso[4];
enum ath9k_power_mode ah_power_mode; enum ath9k_power_mode ah_power_mode;
enum ath9k_power_mode ah_restore_mode; enum ath9k_power_mode ah_restore_mode;
struct ath9k_channel ah_channels[150]; struct ath9k_channel ah_channels[38];
struct ath9k_channel *ah_curchan; struct ath9k_channel *ah_curchan;
u32 ah_nchan;
bool ah_isPciExpress; bool ah_isPciExpress;
u16 ah_txTrigLevel; u16 ah_txTrigLevel;
...@@ -807,10 +794,7 @@ struct ath_hal { ...@@ -807,10 +794,7 @@ struct ath_hal {
u32 ah_rfkill_polarity; u32 ah_rfkill_polarity;
u32 ah_btactive_gpio; u32 ah_btactive_gpio;
u32 ah_wlanactive_gpio; u32 ah_wlanactive_gpio;
#ifndef ATH_NF_PER_CHAN
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
#endif
bool sw_mgmt_crypto; bool sw_mgmt_crypto;
}; };
...@@ -825,8 +809,6 @@ struct ath_rate_table; ...@@ -825,8 +809,6 @@ struct ath_rate_table;
/* Helpers */ /* Helpers */
enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,
const struct ath9k_channel *chan);
bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val); bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val);
u32 ath9k_hw_reverse_bits(u32 val, u32 n); u32 ath9k_hw_reverse_bits(u32 val, u32 n);
bool ath9k_get_channel_edges(struct ath_hal *ah, bool ath9k_get_channel_edges(struct ath_hal *ah,
...@@ -836,7 +818,6 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah, ...@@ -836,7 +818,6 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah,
struct ath_rate_table *rates, struct ath_rate_table *rates,
u32 frameLen, u16 rateix, u32 frameLen, u16 rateix,
bool shortPreamble); bool shortPreamble);
u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags);
void ath9k_hw_get_channel_centers(struct ath_hal *ah, void ath9k_hw_get_channel_centers(struct ath_hal *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
struct chan_centers *centers); struct chan_centers *centers);
...@@ -924,17 +905,18 @@ bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us); ...@@ -924,17 +905,18 @@ bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us);
void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode); void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode);
/* Regulatory */ /* Regulatory */
u16 ath9k_regd_get_rd(struct ath_hal *ah);
bool ath9k_is_world_regd(struct ath_hal *ah);
const struct ieee80211_regdomain *ath9k_world_regdomain(struct ath_hal *ah);
const struct ieee80211_regdomain *ath9k_default_world_regdomain(void);
void ath9k_reg_apply_world_flags(struct wiphy *wiphy, enum reg_set_by setby);
void ath9k_reg_apply_radar_flags(struct wiphy *wiphy);
bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); int ath9k_regd_init(struct ath_hal *ah);
struct ath9k_channel* ath9k_regd_check_channel(struct ath_hal *ah, bool ath9k_regd_is_eeprom_valid(struct ath_hal *ah);
const struct ath9k_channel *c);
u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan); u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan);
u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request);
struct ath9k_channel *chan);
bool ath9k_regd_init_channels(struct ath_hal *ah,
u32 maxchans, u32 *nchans, u8 *regclassids,
u32 maxregids, u32 *nregids, u16 cc,
bool enableOutdoor, bool enableExtendedChannels);
/* ANI */ /* ANI */
......
...@@ -625,11 +625,7 @@ void ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan) ...@@ -625,11 +625,7 @@ void ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan)
else else
chainmask = 0x3F; chainmask = 0x3F;
#ifdef ATH_NF_PER_CHAN
h = chan->nfCalHist;
#else
h = ah->nfCalHist; h = ah->nfCalHist;
#endif
for (i = 0; i < NUM_NF_READINGS; i++) { for (i = 0; i < NUM_NF_READINGS; i++) {
if (chainmask & (1 << i)) { if (chainmask & (1 << i)) {
...@@ -697,11 +693,7 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah, ...@@ -697,11 +693,7 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah,
} }
} }
#ifdef ATH_NF_PER_CHAN
h = chan->nfCalHist;
#else
h = ah->nfCalHist; h = ah->nfCalHist;
#endif
ath9k_hw_update_nfcal_hist_buffer(h, nfarray); ath9k_hw_update_nfcal_hist_buffer(h, nfarray);
chan->rawNoiseFloor = h[0].privNF; chan->rawNoiseFloor = h[0].privNF;
...@@ -728,20 +720,12 @@ void ath9k_init_nfcal_hist_buffer(struct ath_hal *ah) ...@@ -728,20 +720,12 @@ void ath9k_init_nfcal_hist_buffer(struct ath_hal *ah)
s16 ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan) s16 ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan)
{ {
struct ath9k_channel *ichan;
s16 nf; s16 nf;
ichan = ath9k_regd_check_channel(ah, chan); if (chan->rawNoiseFloor == 0)
if (ichan == NULL) {
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"invalid channel %u/0x%x; no mapping\n",
chan->channel, chan->channelFlags);
return ATH_DEFAULT_NOISE_FLOOR;
}
if (ichan->rawNoiseFloor == 0)
nf = -96; nf = -96;
else else
nf = ichan->rawNoiseFloor; nf = chan->rawNoiseFloor;
if (!ath9k_hw_nf_in_range(ah, nf)) if (!ath9k_hw_nf_in_range(ah, nf))
nf = ATH_DEFAULT_NOISE_FLOOR; nf = ATH_DEFAULT_NOISE_FLOOR;
...@@ -755,21 +739,13 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan, ...@@ -755,21 +739,13 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,
{ {
struct ath_hal_5416 *ahp = AH5416(ah); struct ath_hal_5416 *ahp = AH5416(ah);
struct hal_cal_list *currCal = ahp->ah_cal_list_curr; struct hal_cal_list *currCal = ahp->ah_cal_list_curr;
struct ath9k_channel *ichan = ath9k_regd_check_channel(ah, chan);
*isCalDone = true; *isCalDone = true;
if (ichan == NULL) {
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
"invalid channel %u/0x%x; no mapping\n",
chan->channel, chan->channelFlags);
return false;
}
if (currCal && if (currCal &&
(currCal->calState == CAL_RUNNING || (currCal->calState == CAL_RUNNING ||
currCal->calState == CAL_WAITING)) { currCal->calState == CAL_WAITING)) {
ath9k_hw_per_calibration(ah, ichan, rxchainmask, currCal, ath9k_hw_per_calibration(ah, chan, rxchainmask, currCal,
isCalDone); isCalDone);
if (*isCalDone) { if (*isCalDone) {
ahp->ah_cal_list_curr = currCal = currCal->calNext; ahp->ah_cal_list_curr = currCal = currCal->calNext;
...@@ -782,14 +758,12 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan, ...@@ -782,14 +758,12 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,
} }
if (longcal) { if (longcal) {
ath9k_hw_getnf(ah, ichan); ath9k_hw_getnf(ah, chan);
ath9k_hw_loadnf(ah, ah->ah_curchan); ath9k_hw_loadnf(ah, ah->ah_curchan);
ath9k_hw_start_nfcal(ah); ath9k_hw_start_nfcal(ah);
if ((ichan->channelFlags & CHANNEL_CW_INT) != 0) { if (chan->channelFlags & CHANNEL_CW_INT)
chan->channelFlags |= CHANNEL_CW_INT; chan->channelFlags &= ~CHANNEL_CW_INT;
ichan->channelFlags &= ~CHANNEL_CW_INT;
}
} }
return true; return true;
...@@ -894,7 +868,6 @@ bool ath9k_hw_init_cal(struct ath_hal *ah, ...@@ -894,7 +868,6 @@ bool ath9k_hw_init_cal(struct ath_hal *ah,
struct ath9k_channel *chan) struct ath9k_channel *chan)
{ {
struct ath_hal_5416 *ahp = AH5416(ah); struct ath_hal_5416 *ahp = AH5416(ah);
struct ath9k_channel *ichan = ath9k_regd_check_channel(ah, chan);
REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE(ah, AR_PHY_AGC_CONTROL,
REG_READ(ah, AR_PHY_AGC_CONTROL) | REG_READ(ah, AR_PHY_AGC_CONTROL) |
...@@ -942,7 +915,7 @@ bool ath9k_hw_init_cal(struct ath_hal *ah, ...@@ -942,7 +915,7 @@ bool ath9k_hw_init_cal(struct ath_hal *ah,
ath9k_hw_reset_calibration(ah, ahp->ah_cal_list_curr); ath9k_hw_reset_calibration(ah, ahp->ah_cal_list_curr);
} }
ichan->CalValid = 0; chan->CalValid = 0;
return true; return true;
} }
......
...@@ -724,7 +724,6 @@ struct ath_softc { ...@@ -724,7 +724,6 @@ struct ath_softc {
struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX]; struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
struct ath_rate_table *cur_rate_table; struct ath_rate_table *cur_rate_table;
struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX];
struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
struct ath_led radio_led; struct ath_led radio_led;
struct ath_led assoc_led; struct ath_led assoc_led;
......
...@@ -187,46 +187,6 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah, ...@@ -187,46 +187,6 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah,
return txTime; return txTime;
} }
u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags)
{
if (flags & CHANNEL_2GHZ) {
if (freq == 2484)
return 14;
if (freq < 2484)
return (freq - 2407) / 5;
else
return 15 + ((freq - 2512) / 20);
} else if (flags & CHANNEL_5GHZ) {
if (ath9k_regd_is_public_safety_sku(ah) &&
IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) {
return ((freq * 10) +
(((freq % 5) == 2) ? 5 : 0) - 49400) / 5;
} else if ((flags & CHANNEL_A) && (freq <= 5000)) {
return (freq - 4000) / 5;
} else {
return (freq - 5000) / 5;
}
} else {
if (freq == 2484)
return 14;
if (freq < 2484)
return (freq - 2407) / 5;
if (freq < 5000) {
if (ath9k_regd_is_public_safety_sku(ah)
&& IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) {
return ((freq * 10) +
(((freq % 5) ==
2) ? 5 : 0) - 49400) / 5;
} else if (freq > 4900) {
return (freq - 4000) / 5;
} else {
return 15 + ((freq - 2512) / 20);
}
}
return (freq - 5000) / 5;
}
}
void ath9k_hw_get_channel_centers(struct ath_hal *ah, void ath9k_hw_get_channel_centers(struct ath_hal *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
struct chan_centers *centers) struct chan_centers *centers)
...@@ -1270,6 +1230,7 @@ static int ath9k_hw_process_ini(struct ath_hal *ah, ...@@ -1270,6 +1230,7 @@ static int ath9k_hw_process_ini(struct ath_hal *ah,
{ {
int i, regWrites = 0; int i, regWrites = 0;
struct ath_hal_5416 *ahp = AH5416(ah); struct ath_hal_5416 *ahp = AH5416(ah);
struct ieee80211_channel *channel = chan->chan;
u32 modesIndex, freqIndex; u32 modesIndex, freqIndex;
int status; int status;
...@@ -1374,9 +1335,8 @@ static int ath9k_hw_process_ini(struct ath_hal *ah, ...@@ -1374,9 +1335,8 @@ static int ath9k_hw_process_ini(struct ath_hal *ah,
status = ath9k_hw_set_txpower(ah, chan, status = ath9k_hw_set_txpower(ah, chan,
ath9k_regd_get_ctl(ah, chan), ath9k_regd_get_ctl(ah, chan),
ath9k_regd_get_antenna_allowed(ah, channel->max_antenna_gain * 2,
chan), channel->max_power * 2,
chan->maxRegTxPower * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->ah_powerLimit)); (u32) ah->ah_powerLimit));
if (status != 0) { if (status != 0) {
...@@ -1669,6 +1629,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah, ...@@ -1669,6 +1629,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
enum ath9k_ht_macmode macmode) enum ath9k_ht_macmode macmode)
{ {
struct ieee80211_channel *channel = chan->chan;
u32 synthDelay, qnum; u32 synthDelay, qnum;
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) { for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
...@@ -1705,8 +1666,8 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah, ...@@ -1705,8 +1666,8 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
if (ath9k_hw_set_txpower(ah, chan, if (ath9k_hw_set_txpower(ah, chan,
ath9k_regd_get_ctl(ah, chan), ath9k_regd_get_ctl(ah, chan),
ath9k_regd_get_antenna_allowed(ah, chan), channel->max_antenna_gain * 2,
chan->maxRegTxPower * 2, channel->max_power * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->ah_powerLimit)) != 0) { (u32) ah->ah_powerLimit)) != 0) {
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
...@@ -2209,13 +2170,6 @@ int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan, ...@@ -2209,13 +2170,6 @@ int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
ahp->ah_rxchainmask &= 0x3; ahp->ah_rxchainmask &= 0x3;
} }
if (ath9k_regd_check_channel(ah, chan) == NULL) {
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
"invalid channel %u/0x%x; no mapping\n",
chan->channel, chan->channelFlags);
return -EINVAL;
}
if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
return -EIO; return -EIO;
...@@ -3718,13 +3672,14 @@ bool ath9k_hw_disable(struct ath_hal *ah) ...@@ -3718,13 +3672,14 @@ bool ath9k_hw_disable(struct ath_hal *ah)
bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit) bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit)
{ {
struct ath9k_channel *chan = ah->ah_curchan; struct ath9k_channel *chan = ah->ah_curchan;
struct ieee80211_channel *channel = chan->chan;
ah->ah_powerLimit = min(limit, (u32) MAX_RATE_POWER); ah->ah_powerLimit = min(limit, (u32) MAX_RATE_POWER);
if (ath9k_hw_set_txpower(ah, chan, if (ath9k_hw_set_txpower(ah, chan,
ath9k_regd_get_ctl(ah, chan), ath9k_regd_get_ctl(ah, chan),
ath9k_regd_get_antenna_allowed(ah, chan), channel->max_antenna_gain * 2,
chan->maxRegTxPower * 2, channel->max_power * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->ah_powerLimit)) != 0) (u32) ah->ah_powerLimit)) != 0)
return false; return false;
......
This diff is collapsed.
This diff is collapsed.
...@@ -19,126 +19,14 @@ ...@@ -19,126 +19,14 @@
#include "ath9k.h" #include "ath9k.h"
#define BMLEN 2
#define BMZERO {(u64) 0, (u64) 0}
#define BM(_fa, _fb, _fc, _fd, _fe, _ff, _fg, _fh, _fi, _fj, _fk, _fl) \
{((((_fa >= 0) && (_fa < 64)) ? \
(((u64) 1) << _fa) : (u64) 0) | \
(((_fb >= 0) && (_fb < 64)) ? \
(((u64) 1) << _fb) : (u64) 0) | \
(((_fc >= 0) && (_fc < 64)) ? \
(((u64) 1) << _fc) : (u64) 0) | \
(((_fd >= 0) && (_fd < 64)) ? \
(((u64) 1) << _fd) : (u64) 0) | \
(((_fe >= 0) && (_fe < 64)) ? \
(((u64) 1) << _fe) : (u64) 0) | \
(((_ff >= 0) && (_ff < 64)) ? \
(((u64) 1) << _ff) : (u64) 0) | \
(((_fg >= 0) && (_fg < 64)) ? \
(((u64) 1) << _fg) : (u64) 0) | \
(((_fh >= 0) && (_fh < 64)) ? \
(((u64) 1) << _fh) : (u64) 0) | \
(((_fi >= 0) && (_fi < 64)) ? \
(((u64) 1) << _fi) : (u64) 0) | \
(((_fj >= 0) && (_fj < 64)) ? \
(((u64) 1) << _fj) : (u64) 0) | \
(((_fk >= 0) && (_fk < 64)) ? \
(((u64) 1) << _fk) : (u64) 0) | \
(((_fl >= 0) && (_fl < 64)) ? \
(((u64) 1) << _fl) : (u64) 0) | \
((((_fa > 63) && (_fa < 128)) ? \
(((u64) 1) << (_fa - 64)) : (u64) 0) | \
(((_fb > 63) && (_fb < 128)) ? \
(((u64) 1) << (_fb - 64)) : (u64) 0) | \
(((_fc > 63) && (_fc < 128)) ? \
(((u64) 1) << (_fc - 64)) : (u64) 0) | \
(((_fd > 63) && (_fd < 128)) ? \
(((u64) 1) << (_fd - 64)) : (u64) 0) | \
(((_fe > 63) && (_fe < 128)) ? \
(((u64) 1) << (_fe - 64)) : (u64) 0) | \
(((_ff > 63) && (_ff < 128)) ? \
(((u64) 1) << (_ff - 64)) : (u64) 0) | \
(((_fg > 63) && (_fg < 128)) ? \
(((u64) 1) << (_fg - 64)) : (u64) 0) | \
(((_fh > 63) && (_fh < 128)) ? \
(((u64) 1) << (_fh - 64)) : (u64) 0) | \
(((_fi > 63) && (_fi < 128)) ? \
(((u64) 1) << (_fi - 64)) : (u64) 0) | \
(((_fj > 63) && (_fj < 128)) ? \
(((u64) 1) << (_fj - 64)) : (u64) 0) | \
(((_fk > 63) && (_fk < 128)) ? \
(((u64) 1) << (_fk - 64)) : (u64) 0) | \
(((_fl > 63) && (_fl < 128)) ? \
(((u64) 1) << (_fl - 64)) : (u64) 0)))}
#define DEF_REGDMN FCC1_FCCA
#define DEF_DMN_5 FCC1
#define DEF_DMN_2 FCCA
#define COUNTRY_ERD_FLAG 0x8000 #define COUNTRY_ERD_FLAG 0x8000
#define WORLDWIDE_ROAMING_FLAG 0x4000 #define WORLDWIDE_ROAMING_FLAG 0x4000
#define SUPER_DOMAIN_MASK 0x0fff
#define COUNTRY_CODE_MASK 0x3fff
#define CF_INTERFERENCE (CHANNEL_CW_INT | CHANNEL_RADAR_INT)
#define CHANNEL_14 (2484)
#define IS_11G_CH14(_ch,_cf) \
(((_ch) == CHANNEL_14) && ((_cf) == CHANNEL_G))
#define NO_PSCAN 0x0ULL
#define PSCAN_FCC 0x0000000000000001ULL
#define PSCAN_FCC_T 0x0000000000000002ULL
#define PSCAN_ETSI 0x0000000000000004ULL
#define PSCAN_MKK1 0x0000000000000008ULL
#define PSCAN_MKK2 0x0000000000000010ULL
#define PSCAN_MKKA 0x0000000000000020ULL
#define PSCAN_MKKA_G 0x0000000000000040ULL
#define PSCAN_ETSIA 0x0000000000000080ULL
#define PSCAN_ETSIB 0x0000000000000100ULL
#define PSCAN_ETSIC 0x0000000000000200ULL
#define PSCAN_WWR 0x0000000000000400ULL
#define PSCAN_MKKA1 0x0000000000000800ULL
#define PSCAN_MKKA1_G 0x0000000000001000ULL
#define PSCAN_MKKA2 0x0000000000002000ULL
#define PSCAN_MKKA2_G 0x0000000000004000ULL
#define PSCAN_MKK3 0x0000000000008000ULL
#define PSCAN_DEFER 0x7FFFFFFFFFFFFFFFULL
#define IS_ECM_CHAN 0x8000000000000000ULL
#define isWwrSKU(_ah) \ #define isWwrSKU(_ah) \
(((ath9k_regd_get_eepromRD((_ah)) & WORLD_SKU_MASK) == \ (((ath9k_regd_get_eepromRD((_ah)) & WORLD_SKU_MASK) == \
WORLD_SKU_PREFIX) || \ WORLD_SKU_PREFIX) || \
(ath9k_regd_get_eepromRD(_ah) == WORLD)) (ath9k_regd_get_eepromRD(_ah) == WORLD))
#define isWwrSKU_NoMidband(_ah) \
((ath9k_regd_get_eepromRD((_ah)) == WOR3_WORLD) || \
(ath9k_regd_get_eepromRD(_ah) == WOR4_WORLD) || \
(ath9k_regd_get_eepromRD(_ah) == WOR5_ETSIC))
#define isUNII1OddChan(ch) \
((ch == 5170) || (ch == 5190) || (ch == 5210) || (ch == 5230))
#define IS_HT40_MODE(_mode) \
(((_mode == ATH9K_MODE_11NA_HT40PLUS || \
_mode == ATH9K_MODE_11NG_HT40PLUS || \
_mode == ATH9K_MODE_11NA_HT40MINUS || \
_mode == ATH9K_MODE_11NG_HT40MINUS) ? true : false))
#define CHAN_FLAGS (CHANNEL_ALL|CHANNEL_HALF|CHANNEL_QUARTER)
#define swap_array(_a, _b, _size) { \
u8 *s = _b; \
int i = _size; \
do { \
u8 tmp = *_a; \
*_a++ = *s; \
*s++ = tmp; \
} while (--i); \
_a -= _size; \
}
#define HALF_MAXCHANBW 10
#define MULTI_DOMAIN_MASK 0xFF00 #define MULTI_DOMAIN_MASK 0xFF00
#define WORLD_SKU_MASK 0x00F0 #define WORLD_SKU_MASK 0x00F0
...@@ -147,81 +35,16 @@ ...@@ -147,81 +35,16 @@
#define CHANNEL_HALF_BW 10 #define CHANNEL_HALF_BW 10
#define CHANNEL_QUARTER_BW 5 #define CHANNEL_QUARTER_BW 5
typedef int ath_hal_cmp_t(const void *, const void *);
struct reg_dmn_pair_mapping { struct reg_dmn_pair_mapping {
u16 regDmnEnum; u16 regDmnEnum;
u16 regDmn5GHz; u16 reg_5ghz_ctl;
u16 regDmn2GHz; u16 reg_2ghz_ctl;
u32 flags5GHz;
u32 flags2GHz;
u64 pscanMask;
u16 singleCC;
};
struct ccmap {
char isoName[3];
u16 countryCode;
}; };
struct country_code_to_enum_rd { struct country_code_to_enum_rd {
u16 countryCode; u16 countryCode;
u16 regDmnEnum; u16 regDmnEnum;
const char *isoName; const char *isoName;
const char *name;
bool allow11g;
bool allow11aTurbo;
bool allow11gTurbo;
bool allow11ng20;
bool allow11ng40;
bool allow11na20;
bool allow11na40;
u16 outdoorChanStart;
};
struct RegDmnFreqBand {
u16 lowChannel;
u16 highChannel;
u8 powerDfs;
u8 antennaMax;
u8 channelBW;
u8 channelSep;
u64 useDfs;
u64 usePassScan;
u8 regClassId;
};
struct regDomain {
u16 regDmnEnum;
u8 conformanceTestLimit;
u64 dfsMask;
u64 pscan;
u32 flags;
u64 chan11a[BMLEN];
u64 chan11a_turbo[BMLEN];
u64 chan11a_dyn_turbo[BMLEN];
u64 chan11b[BMLEN];
u64 chan11g[BMLEN];
u64 chan11g_turbo[BMLEN];
};
struct cmode {
u32 mode;
u32 flags;
};
#define YES true
#define NO false
struct japan_bandcheck {
u16 freqbandbit;
u32 eepromflagtocheck;
};
struct common_mode_power {
u16 lchan;
u16 hchan;
u8 pwrlvl;
}; };
enum CountryCode { enum CountryCode {
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment