Commit 602ed6c6 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher

drm/amdgpu: Disable ip modules that are not ready yet

Please enable above ips on soc15.c when they're available.
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3fdbab5f
...@@ -514,9 +514,11 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) ...@@ -514,9 +514,11 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); if (adev->asic_type != CHIP_VEGA20) {
if (!amdgpu_sriov_vf(adev)) amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); if (!amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
}
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
#if defined(CONFIG_DRM_AMD_DC) #if defined(CONFIG_DRM_AMD_DC)
...@@ -527,8 +529,10 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) ...@@ -527,8 +529,10 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
#endif #endif
amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); if (adev->asic_type != CHIP_VEGA20) {
amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
}
break; break;
case CHIP_RAVEN: case CHIP_RAVEN:
amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
......
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