Commit 6087dd5e authored by Thomas Gleixner's avatar Thomas Gleixner

x86/smp: Split sending INIT IPI out into a helper function

Putting CPUs into INIT is a safer place during kexec() to park CPUs.

Split the INIT assert/deassert sequence out so it can be reused.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarAshok Raj <ashok.raj@intel.com>
Link: https://lore.kernel.org/r/20230615193330.551157083@linutronix.de
parent d7893093
...@@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip) ...@@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
return (send_status | accept_status); return (send_status | accept_status);
} }
static int static void send_init_sequence(int phys_apicid)
wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
{ {
unsigned long send_status = 0, accept_status = 0; int maxlvt = lapic_get_maxlvt();
int maxlvt, num_starts, j;
maxlvt = lapic_get_maxlvt();
/* /* Be paranoid about clearing APIC errors. */
* Be paranoid about clearing APIC errors.
*/
if (APIC_INTEGRATED(boot_cpu_apic_version)) { if (APIC_INTEGRATED(boot_cpu_apic_version)) {
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ /* Due to the Pentium erratum 3AP. */
if (maxlvt > 3)
apic_write(APIC_ESR, 0); apic_write(APIC_ESR, 0);
apic_read(APIC_ESR); apic_read(APIC_ESR);
} }
pr_debug("Asserting INIT\n"); /* Assert INIT on the target CPU */
apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, phys_apicid);
/* safe_apic_wait_icr_idle();
* Turn INIT on target chip
*/
/*
* Send IPI
*/
apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
phys_apicid);
pr_debug("Waiting for send to finish...\n");
send_status = safe_apic_wait_icr_idle();
udelay(init_udelay); udelay(init_udelay);
pr_debug("Deasserting INIT\n"); /* Deassert INIT on the target CPU */
/* Target chip */
/* Send IPI */
apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
safe_apic_wait_icr_idle();
}
pr_debug("Waiting for send to finish...\n"); /*
send_status = safe_apic_wait_icr_idle(); * Wake up AP by INIT, INIT, STARTUP sequence.
*/
static int wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
{
unsigned long send_status = 0, accept_status = 0;
int num_starts, j, maxlvt = lapic_get_maxlvt();
send_init_sequence(phys_apicid);
mb(); mb();
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment