Commit 60d8fcef authored by Wolfram Sang's avatar Wolfram Sang Committed by Geert Uytterhoeven

pinctrl: sh-pfc: r8a7790: Implement voltage switching for SDHI

All the SHDIs can operate with either 3.3V or 1.8V signals, depending
on negotiation with the card.

Implement the {get,set}_io_voltage operations and set the related
capability flag for the associated pins.
Signed-off-by: default avatarBen Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f55532a0
...@@ -21,16 +21,21 @@ ...@@ -21,16 +21,21 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <linux/io.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include "core.h" #include "core.h"
#include "sh_pfc.h" #include "sh_pfc.h"
/*
* All pins assigned to GPIO bank 3 can be used for SD interfaces in
* which case they support both 3.3V and 1.8V signalling.
*/
#define CPU_ALL_PORT(fn, sfx) \ #define CPU_ALL_PORT(fn, sfx) \
PORT_GP_32(0, fn, sfx), \ PORT_GP_32(0, fn, sfx), \
PORT_GP_30(1, fn, sfx), \ PORT_GP_30(1, fn, sfx), \
PORT_GP_30(2, fn, sfx), \ PORT_GP_30(2, fn, sfx), \
PORT_GP_32(3, fn, sfx), \ PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_32(4, fn, sfx), \ PORT_GP_32(4, fn, sfx), \
PORT_GP_32(5, fn, sfx) PORT_GP_32(5, fn, sfx)
...@@ -4691,6 +4696,47 @@ static const char * const vin3_groups[] = { ...@@ -4691,6 +4696,47 @@ static const char * const vin3_groups[] = {
"vin3_clk", "vin3_clk",
}; };
#define IOCTRL6 0x8c
static int r8a7790_get_io_voltage(struct sh_pfc *pfc, unsigned int pin)
{
u32 data, mask;
if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid pin %#x", pin))
return -EINVAL;
data = ioread32(pfc->windows->virt + IOCTRL6),
/* Bits in IOCTRL6 are numbered in opposite order to pins */
mask = 0x80000000 >> (pin & 0x1f);
return (data & mask) ? 3300 : 1800;
}
static int r8a7790_set_io_voltage(struct sh_pfc *pfc, unsigned int pin, u16 mV)
{
u32 data, mask;
if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid pin %#x", pin))
return -EINVAL;
if (mV != 1800 && mV != 3300)
return -EINVAL;
data = ioread32(pfc->windows->virt + IOCTRL6);
/* Bits in IOCTRL6 are numbered in opposite order to pins */
mask = 0x80000000 >> (pin & 0x1f);
if (mV == 3300)
data |= mask;
else
data &= ~mask;
iowrite32(~data, pfc->windows->virt); /* unlock reg */
iowrite32(data, pfc->windows->virt + IOCTRL6);
return 0;
}
static const struct sh_pfc_function pinmux_functions[] = { static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(avb),
...@@ -5690,8 +5736,14 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -5690,8 +5736,14 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static const struct sh_pfc_soc_operations pinmux_ops = {
.get_io_voltage = r8a7790_get_io_voltage,
.set_io_voltage = r8a7790_set_io_voltage,
};
const struct sh_pfc_soc_info r8a7790_pinmux_info = { const struct sh_pfc_soc_info r8a7790_pinmux_info = {
.name = "r8a77900_pfc", .name = "r8a77900_pfc",
.ops = &pinmux_ops,
.unlock_reg = 0xe6060000, /* PMMR */ .unlock_reg = 0xe6060000, /* PMMR */
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
......
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