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Commit 60f63ed0 authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk 

into home.osdl.org:/home/torvalds/v2.5/linux
parents ae05f3fa 87eb058e
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Showing with 625 additions and 727 deletions
arch/arm/configs/cerfcube_defconfig
View file @ 60f63ed0
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arch/arm/kernel/asm-offsets.c
View file @ 60f63ed0
...@@ -45,7 +45,6 @@ ...@@ -45,7 +45,6 @@
int main(void) int main(void)
{ {
DEFINE(TSK_USED_MATH, offsetof(struct task_struct, used_math));
DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
BLANK(); BLANK();
DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
......
arch/arm/kernel/entry-armv.S
View file @ 60f63ed0
...@@ -673,48 +673,6 @@ __und_invalid: sub sp, sp, #S_FRAME_SIZE ...@@ -673,48 +673,6 @@ __und_invalid: sub sp, sp, #S_FRAME_SIZE
and r2, r6, #31 @ int mode and r2, r6, #31 @ int mode
b bad_mode b bad_mode
#if 1 /* defined CONFIG_FPE_NWFPE || defined CONFIG_FPE_FASTFPE */
/* The FPE is always present */
.equ fpe_not_present, fpundefinstr
#else
wfs_mask_data: .word 0x0e200110 @ WFS/RFS
.word 0x0fef0fff
.word 0x0d000100 @ LDF [sp]/STF [sp]
.word 0x0d000100 @ LDF [fp]/STF [fp]
.word 0x0f000f00
/* We get here if an undefined instruction happens and the floating
* point emulator is not present. If the offending instruction was
* a WFS, we just perform a normal return as if we had emulated the
* operation. This is a hack to allow some basic userland binaries
* to run so that the emulator module proper can be loaded. --philb
*/
fpe_not_present:
adr r10, wfs_mask_data
ldmia r10, {r4, r5, r6, r7, r8}
ldr r10, [sp, #S_PC] @ Load PC
sub r10, r10, #4
mask_pc r10, r10
ldrt r10, [r10] @ get instruction
and r5, r10, r5
teq r5, r4 @ Is it WFS?
moveq pc, r9
and r5, r10, r8
teq r5, r6 @ Is it LDF/STF on sp or fp?
teqne r5, r7
movne pc, lr
tst r10, #0x00200000 @ Does it have WB
moveq pc, r9
and r4, r10, #255 @ get offset
and r6, r10, #0x000f0000
tst r10, #0x00800000 @ +/-
ldr r5, [sp, r6, lsr #14] @ Load reg
rsbeq r4, r4, #0
add r5, r5, r4, lsl #2
str r5, [sp, r6, lsr #14] @ Save reg
mov pc, r9
#endif
/* /*
* SVC mode handlers * SVC mode handlers
*/ */
...@@ -963,23 +921,46 @@ __und_usr: sub sp, sp, #S_FRAME_SIZE @ Allocate frame size in one go ...@@ -963,23 +921,46 @@ __und_usr: sub sp, sp, #S_FRAME_SIZE @ Allocate frame size in one go
* co-processor instructions. However, we have to watch out * co-processor instructions. However, we have to watch out
* for the ARM6/ARM7 SWI bug. * for the ARM6/ARM7 SWI bug.
* *
* Emulators may wish to make use of the instruction value we * Emulators may wish to make use of the following registers:
* prepared for them in r0. * r0 - instruction opcode.
* r10 - this threads thread_info structure.
*/ */
call_fpe: enable_irq r10 @ Enable interrupts call_fpe: enable_irq r10 @ Enable interrupts
tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) #if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
and r10, r0, #0x0f000000 @ mask out op-code bits and r8, r0, #0x0f000000 @ mask out op-code bits
teqne r10, #0x0f000000 @ SWI (ARM6/7 bug)? teqne r8, #0x0f000000 @ SWI (ARM6/7 bug)?
#endif #endif
moveq pc, lr moveq pc, lr
do_fpe: get_thread_info r10 @ get current thread get_thread_info r10 @ get current thread
ldr r4, [r10, #TI_TASK] @ get current task and r8, r0, #0x00000f00 @ mask out CP number
mov r8, #1 mov r7, #1
strb r8, [r4, #TSK_USED_MATH] @ set current->used_math add r6, r10, #TI_USED_CP
ldr r4, .LCfp strb r7, [r6, r8, lsr #8] @ set appropriate used_cp[]
add pc, pc, r8, lsr #6
mov r0, r0
mov pc, lr @ CP#0
b do_fpe @ CP#1 (FPE)
b do_fpe @ CP#2 (FPE)
mov pc, lr @ CP#3
mov pc, lr @ CP#4
mov pc, lr @ CP#5
mov pc, lr @ CP#6
mov pc, lr @ CP#7
mov pc, lr @ CP#8
mov pc, lr @ CP#9
mov pc, lr @ CP#10 (VFP)
mov pc, lr @ CP#11 (VFP)
mov pc, lr @ CP#12
mov pc, lr @ CP#13
mov pc, lr @ CP#14 (Debug)
mov pc, lr @ CP#15 (Control)
do_fpe: ldr r4, .LCfp
add r10, r10, #TI_FPSTATE @ r10 = workspace add r10, r10, #TI_FPSTATE @ r10 = workspace
ldr pc, [r4] @ Call FP module USR entry point ldr pc, [r4] @ Call FP module USR entry point
/* /*
* The FP module is called with these registers set: * The FP module is called with these registers set:
* r0 = instruction * r0 = instruction
...@@ -989,6 +970,11 @@ do_fpe: get_thread_info r10 @ get current thread ...@@ -989,6 +970,11 @@ do_fpe: get_thread_info r10 @ get current thread
* lr = unrecognised FP instruction return address * lr = unrecognised FP instruction return address
*/ */
.data
ENTRY(fp_enter)
.word fpundefinstr
.text
fpundefinstr: mov r0, sp fpundefinstr: mov r0, sp
adrsvc al, lr, ret_from_exception adrsvc al, lr, ret_from_exception
b do_undefinstr b do_undefinstr
...@@ -1016,10 +1002,6 @@ ENTRY(ret_from_exception) ...@@ -1016,10 +1002,6 @@ ENTRY(ret_from_exception)
mov why, #0 mov why, #0
b ret_to_user b ret_to_user
.data
ENTRY(fp_enter)
.word fpe_not_present
.text
/* /*
* Register switch for ARMv3 and ARMv4 processors * Register switch for ARMv3 and ARMv4 processors
* r0 = previous thread_info, r1 = next thread_info * r0 = previous thread_info, r1 = next thread_info
......
arch/arm/kernel/process.c
View file @ 60f63ed0
...@@ -307,8 +307,7 @@ void flush_thread(void) ...@@ -307,8 +307,7 @@ void flush_thread(void)
struct thread_info *thread = current_thread_info(); struct thread_info *thread = current_thread_info();
struct task_struct *tsk = current; struct task_struct *tsk = current;
tsk->used_math = 0; memset(thread->used_cp, 0, sizeof(thread->used_cp));
memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
fp_init(&thread->fpstate); fp_init(&thread->fpstate);
} }
...@@ -344,12 +343,12 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start, ...@@ -344,12 +343,12 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
int dump_fpu (struct pt_regs *regs, struct user_fp *fp) int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
{ {
struct thread_info *thread = current_thread_info(); struct thread_info *thread = current_thread_info();
int used_math = current->used_math; int used_math = thread->used_cp[1] | thread->used_cp[2];
if (used_math) if (used_math)
memcpy(fp, &thread->fpstate.soft, sizeof (*fp)); memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
return used_math; return used_math != 0;
} }
/* /*
......
arch/arm/kernel/ptrace.c
View file @ 60f63ed0
...@@ -602,8 +602,9 @@ static int ptrace_getfpregs(struct task_struct *tsk, void *ufp) ...@@ -602,8 +602,9 @@ static int ptrace_getfpregs(struct task_struct *tsk, void *ufp)
*/ */
static int ptrace_setfpregs(struct task_struct *tsk, void *ufp) static int ptrace_setfpregs(struct task_struct *tsk, void *ufp)
{ {
tsk->used_math = 1; struct thread_info *thread = tsk->thread_info;
return copy_from_user(&tsk->thread_info->fpstate, ufp, thread->used_cp[1] = thread->used_cp[2] = 1;
return copy_from_user(&thread->fpstate, ufp,
sizeof(struct user_fp)) ? -EFAULT : 0; sizeof(struct user_fp)) ? -EFAULT : 0;
} }
......
arch/arm/lib/csumpartial.S
View file @ 60f63ed0
...@@ -41,7 +41,7 @@ td3 .req lr ...@@ -41,7 +41,7 @@ td3 .req lr
tst buf, #1 @ odd address? tst buf, #1 @ odd address?
ldrneb td0, [buf], #1 ldrneb td0, [buf], #1
subne len, len, #1 subne len, len, #1
adcnes sum, sum, td0, lsl #byte(1) adcnes sum, sum, td0, put_byte_1
.less4: tst len, #6 .less4: tst len, #6
beq .less8_byte beq .less8_byte
...@@ -68,7 +68,7 @@ td3 .req lr ...@@ -68,7 +68,7 @@ td3 .req lr
.less8_byte: tst len, #1 @ odd number of bytes .less8_byte: tst len, #1 @ odd number of bytes
ldrneb td0, [buf], #1 @ include last byte ldrneb td0, [buf], #1 @ include last byte
adcnes sum, sum, td0, lsl #byte(0) @ update checksum adcnes sum, sum, td0, put_byte_0 @ update checksum
.done: adc r0, sum, #0 @ collect up the last carry .done: adc r0, sum, #0 @ collect up the last carry
ldr td0, [sp], #4 ldr td0, [sp], #4
...@@ -80,7 +80,7 @@ td3 .req lr ...@@ -80,7 +80,7 @@ td3 .req lr
.not_aligned: tst buf, #1 @ odd address .not_aligned: tst buf, #1 @ odd address
ldrneb td0, [buf], #1 @ make even ldrneb td0, [buf], #1 @ make even
subne len, len, #1 subne len, len, #1
adcnes sum, sum, td0, lsl #byte(1) @ update checksum adcnes sum, sum, td0, put_byte_1 @ update checksum
tst buf, #2 @ 32-bit aligned? tst buf, #2 @ 32-bit aligned?
#if __LINUX_ARM_ARCH__ >= 4 #if __LINUX_ARM_ARCH__ >= 4
......
arch/arm/lib/csumpartialcopygeneric.S
View file @ 60f63ed0
...@@ -36,16 +36,16 @@ sum .req r3 ...@@ -36,16 +36,16 @@ sum .req r3
load1b ip load1b ip
sub len, len, #1 sub len, len, #1
adcs sum, sum, ip, lsl #byte(1) @ update checksum adcs sum, sum, ip, put_byte_1 @ update checksum
strb ip, [dst], #1 strb ip, [dst], #1
tst dst, #2 tst dst, #2
moveq pc, lr @ dst is now 32bit aligned moveq pc, lr @ dst is now 32bit aligned
.dst_16bit: load2b r8, ip .dst_16bit: load2b r8, ip
sub len, len, #2 sub len, len, #2
adcs sum, sum, r8, lsl #byte(0) adcs sum, sum, r8, put_byte_0
strb r8, [dst], #1 strb r8, [dst], #1
adcs sum, sum, ip, lsl #byte(1) adcs sum, sum, ip, put_byte_1
strb ip, [dst], #1 strb ip, [dst], #1
mov pc, lr @ dst is now 32bit aligned mov pc, lr @ dst is now 32bit aligned
...@@ -63,16 +63,16 @@ sum .req r3 ...@@ -63,16 +63,16 @@ sum .req r3
/* Align dst */ /* Align dst */
load1b ip load1b ip
sub len, len, #1 sub len, len, #1
adcs sum, sum, ip, lsl #byte(1) @ update checksum adcs sum, sum, ip, put_byte_1 @ update checksum
strb ip, [dst], #1 strb ip, [dst], #1
tst len, #6 tst len, #6
beq .less8_byteonly beq .less8_byteonly
1: load2b r8, ip 1: load2b r8, ip
sub len, len, #2 sub len, len, #2
adcs sum, sum, r8, lsl #byte(0) adcs sum, sum, r8, put_byte_0
strb r8, [dst], #1 strb r8, [dst], #1
adcs sum, sum, ip, lsl #byte(1) adcs sum, sum, ip, put_byte_1
strb ip, [dst], #1 strb ip, [dst], #1
.less8_aligned: tst len, #6 .less8_aligned: tst len, #6
bne 1b bne 1b
...@@ -80,7 +80,7 @@ sum .req r3 ...@@ -80,7 +80,7 @@ sum .req r3
tst len, #1 tst len, #1
beq .done beq .done
load1b r8 load1b r8
adcs sum, sum, r8, lsl #byte(0) @ update checksum adcs sum, sum, r8, put_byte_0 @ update checksum
strb r8, [dst], #1 strb r8, [dst], #1
b .done b .done
...@@ -139,17 +139,17 @@ FN_ENTRY ...@@ -139,17 +139,17 @@ FN_ENTRY
beq .done beq .done
load1l r4 load1l r4
tst len, #2 tst len, #2
mov r5, r4, lsr #byte(0) mov r5, r4, get_byte_0
beq .exit beq .exit
adcs sum, sum, r4, push #16 adcs sum, sum, r4, push #16
strb r5, [dst], #1 strb r5, [dst], #1
mov r5, r4, lsr #byte(1) mov r5, r4, get_byte_1
strb r5, [dst], #1 strb r5, [dst], #1
mov r5, r4, lsr #byte(2) mov r5, r4, get_byte_2
.exit: tst len, #1 .exit: tst len, #1
strneb r5, [dst], #1 strneb r5, [dst], #1
andne r5, r5, #255 andne r5, r5, #255
adcnes sum, sum, r5, lsl #byte(0) adcnes sum, sum, r5, put_byte_0
/* /*
* If the dst pointer was not 16-bit aligned, we * If the dst pointer was not 16-bit aligned, we
...@@ -213,14 +213,14 @@ FN_ENTRY ...@@ -213,14 +213,14 @@ FN_ENTRY
mov r4, r5, pull #8 mov r4, r5, pull #8
4: ands len, len, #3 4: ands len, len, #3
beq .done beq .done
mov r5, r4, lsr #byte(0) mov r5, r4, get_byte_0
tst len, #2 tst len, #2
beq .exit beq .exit
adcs sum, sum, r4, push #16 adcs sum, sum, r4, push #16
strb r5, [dst], #1 strb r5, [dst], #1
mov r5, r4, lsr #byte(1) mov r5, r4, get_byte_1
strb r5, [dst], #1 strb r5, [dst], #1
mov r5, r4, lsr #byte(2) mov r5, r4, get_byte_2
b .exit b .exit
.src2_aligned: mov r4, r5, pull #16 .src2_aligned: mov r4, r5, pull #16
...@@ -265,12 +265,12 @@ FN_ENTRY ...@@ -265,12 +265,12 @@ FN_ENTRY
mov r4, r5, pull #16 mov r4, r5, pull #16
4: ands len, len, #3 4: ands len, len, #3
beq .done beq .done
mov r5, r4, lsr #byte(0) mov r5, r4, get_byte_0
tst len, #2 tst len, #2
beq .exit beq .exit
adcs sum, sum, r4 adcs sum, sum, r4
strb r5, [dst], #1 strb r5, [dst], #1
mov r5, r4, lsr #byte(1) mov r5, r4, get_byte_1
strb r5, [dst], #1 strb r5, [dst], #1
tst len, #1 tst len, #1
beq .done beq .done
...@@ -319,14 +319,14 @@ FN_ENTRY ...@@ -319,14 +319,14 @@ FN_ENTRY
mov r4, r5, pull #24 mov r4, r5, pull #24
4: ands len, len, #3 4: ands len, len, #3
beq .done beq .done
mov r5, r4, lsr #byte(0) mov r5, r4, get_byte_0
tst len, #2 tst len, #2
beq .exit beq .exit
strb r5, [dst], #1 strb r5, [dst], #1
adcs sum, sum, r4 adcs sum, sum, r4
load1l r4 load1l r4
mov r5, r4, lsr #byte(0) mov r5, r4, get_byte_0
strb r5, [dst], #1 strb r5, [dst], #1
adcs sum, sum, r4, push #24 adcs sum, sum, r4, push #24
mov r5, r4, lsr #byte(1) mov r5, r4, get_byte_1
b .exit b .exit
arch/arm/lib/io-readsb.S
View file @ 60f63ed0
...@@ -37,35 +37,35 @@ ENTRY(__raw_readsb) ...@@ -37,35 +37,35 @@ ENTRY(__raw_readsb)
.insb_16_lp: ldrb r3, [r0] .insb_16_lp: ldrb r3, [r0]
ldrb r4, [r0] ldrb r4, [r0]
ldrb r5, [r0] ldrb r5, [r0]
mov r3, r3, lsl #byte(0) mov r3, r3, put_byte_0
ldrb r6, [r0] ldrb r6, [r0]
orr r3, r3, r4, lsl #byte(1) orr r3, r3, r4, put_byte_1
ldrb r4, [r0] ldrb r4, [r0]
orr r3, r3, r5, lsl #byte(2) orr r3, r3, r5, put_byte_2
ldrb r5, [r0] ldrb r5, [r0]
orr r3, r3, r6, lsl #byte(3) orr r3, r3, r6, put_byte_3
ldrb r6, [r0] ldrb r6, [r0]
mov r4, r4, lsl #byte(0) mov r4, r4, put_byte_0
ldrb ip, [r0] ldrb ip, [r0]
orr r4, r4, r5, lsl #byte(1) orr r4, r4, r5, put_byte_1
ldrb r5, [r0] ldrb r5, [r0]
orr r4, r4, r6, lsl #byte(2) orr r4, r4, r6, put_byte_2
ldrb r6, [r0] ldrb r6, [r0]
orr r4, r4, ip, lsl #byte(3) orr r4, r4, ip, put_byte_3
ldrb ip, [r0] ldrb ip, [r0]
mov r5, r5, lsl #byte(0) mov r5, r5, put_byte_0
ldrb lr, [r0] ldrb lr, [r0]
orr r5, r5, r6, lsl #byte(1) orr r5, r5, r6, put_byte_1
ldrb r6, [r0] ldrb r6, [r0]
orr r5, r5, ip, lsl #byte(2) orr r5, r5, ip, put_byte_2
ldrb ip, [r0] ldrb ip, [r0]
orr r5, r5, lr, lsl #byte(3) orr r5, r5, lr, put_byte_3
ldrb lr, [r0] ldrb lr, [r0]
mov r6, r6, lsl #byte(0) mov r6, r6, put_byte_0
orr r6, r6, ip, lsl #byte(1) orr r6, r6, ip, put_byte_1
ldrb ip, [r0] ldrb ip, [r0]
orr r6, r6, lr, lsl #byte(2) orr r6, r6, lr, put_byte_2
orr r6, r6, ip, lsl #byte(3) orr r6, r6, ip, put_byte_3
stmia r1!, {r3 - r6} stmia r1!, {r3 - r6}
subs r2, r2, #16 subs r2, r2, #16
...@@ -80,19 +80,19 @@ ENTRY(__raw_readsb) ...@@ -80,19 +80,19 @@ ENTRY(__raw_readsb)
ldrb r3, [r0] ldrb r3, [r0]
ldrb r4, [r0] ldrb r4, [r0]
ldrb r5, [r0] ldrb r5, [r0]
mov r3, r3, lsl #byte(0) mov r3, r3, put_byte_0
ldrb r6, [r0] ldrb r6, [r0]
orr r3, r3, r4, lsl #byte(1) orr r3, r3, r4, put_byte_1
ldrb r4, [r0] ldrb r4, [r0]
orr r3, r3, r5, lsl #byte(2) orr r3, r3, r5, put_byte_2
ldrb r5, [r0] ldrb r5, [r0]
orr r3, r3, r6, lsl #byte(3) orr r3, r3, r6, put_byte_3
ldrb r6, [r0] ldrb r6, [r0]
mov r4, r4, lsl #byte(0) mov r4, r4, put_byte_0
ldrb ip, [r0] ldrb ip, [r0]
orr r4, r4, r5, lsl #byte(1) orr r4, r4, r5, put_byte_1
orr r4, r4, r6, lsl #byte(2) orr r4, r4, r6, put_byte_2
orr r4, r4, ip, lsl #byte(3) orr r4, r4, ip, put_byte_3
stmia r1!, {r3, r4} stmia r1!, {r3, r4}
.insb_no_8: tst r2, #4 .insb_no_8: tst r2, #4
...@@ -102,10 +102,10 @@ ENTRY(__raw_readsb) ...@@ -102,10 +102,10 @@ ENTRY(__raw_readsb)
ldrb r4, [r0] ldrb r4, [r0]
ldrb r5, [r0] ldrb r5, [r0]
ldrb r6, [r0] ldrb r6, [r0]
mov r3, r3, lsl #byte(0) mov r3, r3, put_byte_0
orr r3, r3, r4, lsl #byte(1) orr r3, r3, r4, put_byte_1
orr r3, r3, r5, lsl #byte(2) orr r3, r3, r5, put_byte_2
orr r3, r3, r6, lsl #byte(3) orr r3, r3, r6, put_byte_3
str r3, [r1], #4 str r3, [r1], #4
.insb_no_4: ands r2, r2, #3 .insb_no_4: ands r2, r2, #3
......
arch/arm/lib/uaccess.S
View file @ 60f63ed0
...@@ -183,14 +183,14 @@ USER( strt r3, [r0], #4) @ May fault ...@@ -183,14 +183,14 @@ USER( strt r3, [r0], #4) @ May fault
strnet r3, [r0], #4 @ Shouldnt fault strnet r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3 ands ip, ip, #3
beq .c2u_1fupi beq .c2u_1fupi
.c2u_1nowords: mov r3, r7, lsr #byte(1) .c2u_1nowords: mov r3, r7, get_byte_1
teq ip, #0 teq ip, #0
beq .c2u_finished beq .c2u_finished
cmp ip, #2 cmp ip, #2
USER( strbt r3, [r0], #1) @ May fault USER( strbt r3, [r0], #1) @ May fault
movge r3, r7, lsr #byte(2) movge r3, r7, get_byte_2
USER( strgebt r3, [r0], #1) @ May fault USER( strgebt r3, [r0], #1) @ May fault
movgt r3, r7, lsr #byte(3) movgt r3, r7, get_byte_3
USER( strgtbt r3, [r0], #1) @ May fault USER( strgtbt r3, [r0], #1) @ May fault
b .c2u_finished b .c2u_finished
...@@ -250,12 +250,12 @@ USER( strt r3, [r0], #4) @ May fault ...@@ -250,12 +250,12 @@ USER( strt r3, [r0], #4) @ May fault
strnet r3, [r0], #4 @ Shouldnt fault strnet r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3 ands ip, ip, #3
beq .c2u_2fupi beq .c2u_2fupi
.c2u_2nowords: mov r3, r7, lsr #byte(2) .c2u_2nowords: mov r3, r7, get_byte_2
teq ip, #0 teq ip, #0
beq .c2u_finished beq .c2u_finished
cmp ip, #2 cmp ip, #2
USER( strbt r3, [r0], #1) @ May fault USER( strbt r3, [r0], #1) @ May fault
movge r3, r7, lsr #byte(3) movge r3, r7, get_byte_3
USER( strgebt r3, [r0], #1) @ May fault USER( strgebt r3, [r0], #1) @ May fault
ldrgtb r3, [r1], #0 ldrgtb r3, [r1], #0
USER( strgtbt r3, [r0], #1) @ May fault USER( strgtbt r3, [r0], #1) @ May fault
...@@ -317,7 +317,7 @@ USER( strt r3, [r0], #4) @ May fault ...@@ -317,7 +317,7 @@ USER( strt r3, [r0], #4) @ May fault
strnet r3, [r0], #4 @ Shouldnt fault strnet r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3 ands ip, ip, #3
beq .c2u_3fupi beq .c2u_3fupi
.c2u_3nowords: mov r3, r7, lsr #byte(3) .c2u_3nowords: mov r3, r7, get_byte_3
teq ip, #0 teq ip, #0
beq .c2u_finished beq .c2u_finished
cmp ip, #2 cmp ip, #2
...@@ -496,14 +496,14 @@ USER( ldrnet r7, [r1], #4) @ May fault ...@@ -496,14 +496,14 @@ USER( ldrnet r7, [r1], #4) @ May fault
strne r3, [r0], #4 strne r3, [r0], #4
ands ip, ip, #3 ands ip, ip, #3
beq .cfu_1fupi beq .cfu_1fupi
.cfu_1nowords: mov r3, r7, lsr #byte(1) .cfu_1nowords: mov r3, r7, get_byte_1
teq ip, #0 teq ip, #0
beq .cfu_finished beq .cfu_finished
cmp ip, #2 cmp ip, #2
strb r3, [r0], #1 strb r3, [r0], #1
movge r3, r7, lsr #byte(2) movge r3, r7, get_byte_2
strgeb r3, [r0], #1 strgeb r3, [r0], #1
movgt r3, r7, lsr #byte(3) movgt r3, r7, get_byte_3
strgtb r3, [r0], #1 strgtb r3, [r0], #1
b .cfu_finished b .cfu_finished
...@@ -563,12 +563,12 @@ USER( ldrnet r7, [r1], #4) @ May fault ...@@ -563,12 +563,12 @@ USER( ldrnet r7, [r1], #4) @ May fault
strne r3, [r0], #4 strne r3, [r0], #4
ands ip, ip, #3 ands ip, ip, #3
beq .cfu_2fupi beq .cfu_2fupi
.cfu_2nowords: mov r3, r7, lsr #byte(2) .cfu_2nowords: mov r3, r7, get_byte_2
teq ip, #0 teq ip, #0
beq .cfu_finished beq .cfu_finished
cmp ip, #2 cmp ip, #2
strb r3, [r0], #1 strb r3, [r0], #1
movge r3, r7, lsr #byte(3) movge r3, r7, get_byte_3
strgeb r3, [r0], #1 strgeb r3, [r0], #1
USER( ldrgtbt r3, [r1], #0) @ May fault USER( ldrgtbt r3, [r1], #0) @ May fault
strgtb r3, [r0], #1 strgtb r3, [r0], #1
...@@ -630,7 +630,7 @@ USER( ldrnet r7, [r1], #4) @ May fault ...@@ -630,7 +630,7 @@ USER( ldrnet r7, [r1], #4) @ May fault
strne r3, [r0], #4 strne r3, [r0], #4
ands ip, ip, #3 ands ip, ip, #3
beq .cfu_3fupi beq .cfu_3fupi
.cfu_3nowords: mov r3, r7, lsr #byte(3) .cfu_3nowords: mov r3, r7, get_byte_3
teq ip, #0 teq ip, #0
beq .cfu_finished beq .cfu_finished
cmp ip, #2 cmp ip, #2
......
arch/arm/mach-sa1100/cerf.c
View file @ 60f63ed0
/* /*
* linux/arch/arm/mach-sa1100/cerf.c * linux/arch/arm/mach-sa1100/cerf.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Apr-2003 : Removed some old PDA crud [FB]
* Oct-2003 : Added uart2 resource [FB]
* Jan-2004 : Removed io map for flash [FB]
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/tty.h> #include <linux/tty.h>
#include <linux/device.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h> #include <asm/mach/serial_sa1100.h>
#include <asm/arch/cerf.h>
#include "generic.h" #include "generic.h"
static struct resource cerfuart2_resources[] = {
[0] = {
.start = 0x80030000,
.end = 0x8003ffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device cerfuart2_device = {
.name = "sa11x0-uart",
.id = 2,
.num_resources = ARRAY_SIZE(cerfuart2_resources),
.resource = cerfuart2_resources,
};
static struct platform_device *cerf_devices[] __initdata = {
&cerfuart2_device,
};
static void __init cerf_init_irq(void) static void __init cerf_init_irq(void)
{ {
sa1100_init_irq(); sa1100_init_irq();
set_irq_type(CERF_ETH_IRQ, IRQT_RISING);
/* Need to register these as rising edge interrupts
* For standard 16550 serial driver support
* Basically - I copied it from pfs168.c :)
*/
#ifdef CONFIG_SA1100_CERF_CPLD
/* PDA Full serial port */
set_irq_type(IRQ_GPIO3, IRQT_RISING);
/* PDA Bluetooth */
set_irq_type(IRQ_GPIO2, IRQT_RISING);
#endif /* CONFIG_SA1100_CERF_CPLD */
set_irq_type(IRQ_GPIO_UCB1200_IRQ, IRQT_RISING);
} }
static struct map_desc cerf_io_desc[] __initdata = { static struct map_desc cerf_io_desc[] __initdata = {
/* virtual physical length type */ /* virtual physical length type */
{ 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */ { 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */
#ifdef CONFIG_SA1100_CERF_CPLD
,{ 0xf1000000, 0x40000000, 0x00100000, MT_DEVICE }, /* CPLD Chip */
{ 0xf2000000, 0x10000000, 0x00100000, MT_DEVICE }, /* CerfPDA Bluetooth */
{ 0xf3000000, 0x18000000, 0x00100000, MT_DEVICE } /* CerfPDA Serial */
#endif
}; };
static void __init cerf_map_io(void) static void __init cerf_map_io(void)
...@@ -51,21 +64,30 @@ static void __init cerf_map_io(void) ...@@ -51,21 +64,30 @@ static void __init cerf_map_io(void)
iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc)); iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
sa1100_register_uart(0, 3); sa1100_register_uart(0, 3);
#ifdef CONFIG_SA1100_CERF_IRDA_ENABLED sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
sa1100_register_uart(1, 1);
#else
sa1100_register_uart(1, 2);
sa1100_register_uart(2, 1); sa1100_register_uart(2, 1);
#endif
/* set some GPDR bits here while it's safe */ /* set some GPDR bits here while it's safe */
GPDR |= GPIO_CF_RESET; GPDR |= CERF_GPIO_CF_RESET;
#ifdef CONFIG_SA1100_CERF_CPLD
GPDR |= GPIO_PWR_SHUTDOWN;
#endif
} }
MACHINE_START(CERF, "Intrinsyc's Cerf Family of Products") static int __init cerf_init(void)
{
int ret;
if (!machine_is_cerf())
return -ENODEV;
ret = platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
if (ret < 0)
return ret;
return 0;
}
arch_initcall(cerf_init);
MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
MAINTAINER("support@intrinsyc.com") MAINTAINER("support@intrinsyc.com")
BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
MAPIO(cerf_map_io) MAPIO(cerf_map_io)
......
arch/arm/mach-sa1100/generic.c
View file @ 60f63ed0
...@@ -99,6 +99,7 @@ unsigned int sa11x0_getspeed(void) ...@@ -99,6 +99,7 @@ unsigned int sa11x0_getspeed(void)
{ {
return cclk_frequency_100khz[PPCR & 0xf] * 100; return cclk_frequency_100khz[PPCR & 0xf] * 100;
} }
EXPORT_SYMBOL(sa11x0_getspeed);
#else #else
/* /*
* We still need to provide this so building without cpufreq works. * We still need to provide this so building without cpufreq works.
......
drivers/mtd/maps/sa1100-flash.c
View file @ 60f63ed0
...@@ -154,50 +154,34 @@ static struct mtd_partition badge4_partitions[] = { ...@@ -154,50 +154,34 @@ static struct mtd_partition badge4_partitions[] = {
#ifdef CONFIG_SA1100_CERF #ifdef CONFIG_SA1100_CERF
#ifdef CONFIG_SA1100_CERF_FLASH_32MB #ifdef CONFIG_SA1100_CERF_FLASH_32MB
static struct mtd_partition cerf_partitions[] = { # define CERF_FLASH_SIZE 0x02000000
{
.name = "firmware",
.size = 0x00040000,
.offset = 0,
}, {
.name = "params",
.size = 0x00040000,
.offset = 0x00040000,
}, {
.name = "kernel",
.size = 0x00100000,
.offset = 0x00080000,
}, {
.name = "rootdisk",
.size = 0x01E80000,
.offset = 0x00180000,
}
};
#elif defined CONFIG_SA1100_CERF_FLASH_16MB #elif defined CONFIG_SA1100_CERF_FLASH_16MB
# define CERF_FLASH_SIZE 0x01000000
#elif defined CONFIG_SA1100_CERF_FLASH_8MB
# define CERF_FLASH_SIZE 0x00800000
#else
# error "Undefined flash size for CERF in sa1100-flash.c"
#endif
static struct mtd_partition cerf_partitions[] = { static struct mtd_partition cerf_partitions[] = {
{ {
.name = "firmware", .name = "Bootloader",
.size = 0x00020000, .size = 0x00020000,
.offset = 0, .offset = 0x00000000,
}, { }, {
.name = "params", .name = "Params",
.size = 0x00020000, .size = 0x00040000,
.offset = 0x00020000, .offset = 0x00020000,
}, { }, {
.name = "kernel", .name = "Kernel",
.size = 0x00100000, .size = 0x00100000,
.offset = 0x00040000, .offset = 0x00060000,
}, { }, {
.name = "rootdisk", .name = "Filesystem",
.size = 0x00EC0000, .size = CERF_FLASH_SIZE-0x00160000,
.offset = 0x00140000, .offset = 0x00160000,
} }
}; };
#elif defined CONFIG_SA1100_CERF_FLASH_8MB
# error "Unwritten type definition"
#else
# error "Undefined memory orientation for CERF in sa1100-flash.c"
#endif
#endif #endif
#ifdef CONFIG_SA1100_CONSUS #ifdef CONFIG_SA1100_CONSUS
......
drivers/pcmcia/sa1100_cerf.c
View file @ 60f63ed0
...@@ -11,27 +11,25 @@ ...@@ -11,27 +11,25 @@
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/device.h> #include <linux/device.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/delay.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/arch/cerf.h>
#include "sa1100_generic.h" #include "sa1100_generic.h"
#ifdef CONFIG_SA1100_CERF_CPLD
#define CERF_SOCKET 0
#else
#define CERF_SOCKET 1 #define CERF_SOCKET 1
#endif
static struct pcmcia_irqs irqs[] = { static struct pcmcia_irqs irqs[] = {
{ CERF_SOCKET, IRQ_GPIO_CF_CD, "CF_CD" }, { CERF_SOCKET, CERF_IRQ_GPIO_CF_CD, "CF_CD" },
{ CERF_SOCKET, IRQ_GPIO_CF_BVD2, "CF_BVD2" }, { CERF_SOCKET, CERF_IRQ_GPIO_CF_BVD2, "CF_BVD2" },
{ CERF_SOCKET, IRQ_GPIO_CF_BVD1, "CF_BVD1" } { CERF_SOCKET, CERF_IRQ_GPIO_CF_BVD1, "CF_BVD1" }
}; };
static int cerf_pcmcia_hw_init(struct sa1100_pcmcia_socket *skt) static int cerf_pcmcia_hw_init(struct sa1100_pcmcia_socket *skt)
{ {
skt->irq = IRQ_GPIO_CF_IRQ; skt->irq = CERF_IRQ_GPIO_CF_IRQ;
return sa11xx_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); return sa11xx_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
} }
...@@ -46,13 +44,13 @@ cerf_pcmcia_socket_state(struct sa1100_pcmcia_socket *skt, struct pcmcia_state * ...@@ -46,13 +44,13 @@ cerf_pcmcia_socket_state(struct sa1100_pcmcia_socket *skt, struct pcmcia_state *
{ {
unsigned long levels = GPLR; unsigned long levels = GPLR;
state->detect=((levels & GPIO_CF_CD)==0)?1:0; state->detect = (levels & CERF_GPIO_CF_CD) ?0:1;
state->ready=(levels & GPIO_CF_IRQ)?1:0; state->ready = (levels & CERF_GPIO_CF_IRQ) ?1:0;
state->bvd1=(levels & GPIO_CF_BVD1)?1:0; state->bvd1 = (levels & CERF_GPIO_CF_BVD1)?1:0;
state->bvd2=(levels & GPIO_CF_BVD2)?1:0; state->bvd2 = (levels & CERF_GPIO_CF_BVD2)?1:0;
state->wrprot=0; state->wrprot = 0;
state->vs_3v=1; state->vs_3v = 1;
state->vs_Xv=0; state->vs_Xv = 0;
} }
static int static int
...@@ -61,13 +59,8 @@ cerf_pcmcia_configure_socket(struct sa1100_pcmcia_socket *skt, ...@@ -61,13 +59,8 @@ cerf_pcmcia_configure_socket(struct sa1100_pcmcia_socket *skt,
{ {
switch (state->Vcc) { switch (state->Vcc) {
case 0: case 0:
break;
case 50: case 50:
case 33: case 33:
#ifdef CONFIG_SA1100_CERF_CPLD
GPCR = GPIO_PWR_SHUTDOWN;
#endif
break; break;
default: default:
...@@ -77,13 +70,9 @@ cerf_pcmcia_configure_socket(struct sa1100_pcmcia_socket *skt, ...@@ -77,13 +70,9 @@ cerf_pcmcia_configure_socket(struct sa1100_pcmcia_socket *skt,
} }
if (state->flags & SS_RESET) { if (state->flags & SS_RESET) {
#ifdef CONFIG_SA1100_CERF_CPLD GPSR = CERF_GPIO_CF_RESET;
GPSR = GPIO_CF_RESET;
#endif
} else { } else {
#ifdef CONFIG_SA1100_CERF_CPLD GPCR = CERF_GPIO_CF_RESET;
GPCR = GPIO_CF_RESET;
#endif
} }
return 0; return 0;
...@@ -101,8 +90,8 @@ static void cerf_pcmcia_socket_suspend(struct sa1100_pcmcia_socket *skt) ...@@ -101,8 +90,8 @@ static void cerf_pcmcia_socket_suspend(struct sa1100_pcmcia_socket *skt)
static struct pcmcia_low_level cerf_pcmcia_ops = { static struct pcmcia_low_level cerf_pcmcia_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.init = cerf_pcmcia_hw_init, .hw_init = cerf_pcmcia_hw_init,
.shutdown = cerf_pcmcia_hw_shutdown, .hw_shutdown = cerf_pcmcia_hw_shutdown,
.socket_state = cerf_pcmcia_socket_state, .socket_state = cerf_pcmcia_socket_state,
.configure_socket = cerf_pcmcia_configure_socket, .configure_socket = cerf_pcmcia_configure_socket,
......
include/asm-arm/arch-sa1100/cerf.h
View file @ 60f63ed0
/*
* include/asm-arm/arch-sa1100/cerf.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Apr-2003 : Removed some old PDA crud [FB]
*/
#ifndef _INCLUDE_CERF_H_ #ifndef _INCLUDE_CERF_H_
#define _INCLUDE_CERF_H_ #define _INCLUDE_CERF_H_
#include <linux/config.h> #include <linux/config.h>
#ifdef CONFIG_SA1100_CERF_CPLD #define CERF_ETH_IO 0xf0000000
#define CERF_ETH_IRQ IRQ_GPIO26
#define CERF_GPIO_CF_BVD2 GPIO_GPIO (19)
#define CERF_GPIO_CF_BVD1 GPIO_GPIO (20)
#define CERF_GPIO_CF_RESET GPIO_GPIO (21)
#define CERF_GPIO_CF_IRQ GPIO_GPIO (22)
#define CERF_GPIO_CF_CD GPIO_GPIO (23)
// Map sa1100fb.c to sa1100_frontlight.c - Not pretty, but necessary. #define CERF_IRQ_GPIO_CF_BVD2 IRQ_GPIO19
#define CERF_BACKLIGHT_ENABLE sa1100_fl_enable #define CERF_IRQ_GPIO_CF_BVD1 IRQ_GPIO20
#define CERF_BACKLIGHT_DISABLE sa1100_fl_disable #define CERF_IRQ_GPIO_CF_IRQ IRQ_GPIO22
#define CERF_IRQ_GPIO_CF_CD IRQ_GPIO23
//
// IO Pins for devices
//
#define CERF_PDA_CPLD 0xf1000000
#define CERF_PDA_CPLD_WRCLRINT (0x0)
#define CERF_PDA_CPLD_BACKLIGHT (0x2)
#define CERF_PDA_CPLD_SOUND_FREQ (0x4)
#define CERF_PDA_CPLD_KEYPAD_A (0x6)
#define CERF_PDA_CPLD_BATTFAULT (0x8)
#define CERF_PDA_CPLD_KEYPAD_B (0xa)
#define CERF_PDA_CPLD_SOUND_ENA (0xc)
#define CERF_PDA_CPLD_SOUND_RESET (0xe)
#define GPIO_CF_BVD2 GPIO_GPIO (5)
#define GPIO_CF_BVD1 GPIO_GPIO (6)
#define GPIO_CF_RESET GPIO_GPIO (7)
#define GPIO_CF_IRQ GPIO_GPIO (8)
#define GPIO_CF_CD GPIO_GPIO (9)
#define GPIO_PWR_SHUTDOWN GPIO_GPIO (25)
#define UCB1200_GPIO_CONT_CS 0x0001
#define UCB1200_GPIO_CONT_DOWN 0x0002
#define UCB1200_GPIO_CONT_INC 0x0004
#define UCB1200_GPIO_CONT_ENA 0x0008
#define UCB1200_GPIO_LCD_RESET 0x0010
#define UCB1200_GPIO_IRDA_ENABLE 0x0020
#define UCB1200_GPIO_BT_ENABLE 0x0040
#define UCB1200_GPIO_L3_DATA 0x0080
#define UCB1200_GPIO_L3_CLOCK 0x0100
#define UCB1200_GPIO_L3_MODE 0x0200
//
// IRQ for devices
//
#define IRQ_UCB1200_CONT_CS IRQ_UCB1200_IO0
#define IRQ_UCB1200_CONT_DOWN IRQ_UCB1200_IO1
#define IRQ_UCB1200_CONT_INC IRQ_UCB1200_IO2
#define IRQ_UCB1200_CONT_ENA IRQ_UCB1200_IO3
#define IRQ_UCB1200_LCD_RESET IRQ_UCB1200_IO4
#define IRQ_UCB1200_IRDA_ENABLE IRQ_UCB1200_IO5
#define IRQ_UCB1200_BT_ENABLE IRQ_UCB1200_IO6
#define IRQ_UCB1200_L3_DATA IRQ_UCB1200_IO7
#define IRQ_UCB1200_L3_CLOCK IRQ_UCB1200_IO8
#define IRQ_UCB1200_L3_MODE IRQ_UCB1200_IO9
#define IRQ_GPIO_CF_BVD2 IRQ_GPIO5
#define IRQ_GPIO_CF_BVD1 IRQ_GPIO6
#define IRQ_GPIO_CF_IRQ IRQ_GPIO8
#define IRQ_GPIO_CF_CD IRQ_GPIO9
//
// Device parameters
//
#define CERF_PDA_CPLD_SOUND_FREQ_8000 (0x01)
#define CERF_PDA_CPLD_SOUND_FREQ_11025 (0x05)
#define CERF_PDA_CPLD_SOUND_FREQ_16000 (0x02)
#define CERF_PDA_CPLD_SOUND_FREQ_22050 (0x06)
#define CERF_PDA_CPLD_SOUND_FREQ_32000 (0x03)
#define CERF_PDA_CPLD_SOUND_FREQ_44100 (0x07)
#define CERF_PDA_CPLD_SOUND_FREQ_48000 (0x0b)
//
// General Functions
//
#define CERF_PDA_CPLD_Get(x, y) (*((char*)(CERF_PDA_CPLD + (x))) & (y))
#define CERF_PDA_CPLD_Set(x, y, z) (*((char*)(CERF_PDA_CPLD + (x))) = (*((char*)(CERF_PDA_CPLD + (x))) & ~(z)) | (y))
#define CERF_PDA_CPLD_UnSet(x, y, z) (*((char*)(CERF_PDA_CPLD + (x))) = (*((char*)(CERF_PDA_CPLD + (x))) & ~(z)) & ~(y))
#else // CONFIG_SA1100_CERF_CPLD
#define GPIO_CF_BVD2 GPIO_GPIO (19)
#define GPIO_CF_BVD1 GPIO_GPIO (20)
#define GPIO_CF_RESET 0
#define GPIO_CF_IRQ GPIO_GPIO (22)
#define GPIO_CF_CD GPIO_GPIO (23)
#define GPIO_LCD_RESET GPIO_GPIO (15)
#define IRQ_GPIO_CF_BVD2 IRQ_GPIO19
#define IRQ_GPIO_CF_BVD1 IRQ_GPIO20
#define IRQ_GPIO_CF_IRQ IRQ_GPIO22
#define IRQ_GPIO_CF_CD IRQ_GPIO23
#endif // CONFIG_SA1100_CERF_CPLD
#define GPIO_UCB1200_IRQ GPIO_GPIO (18)
#define IRQ_GPIO_UCB1200_IRQ IRQ_GPIO18
#endif // _INCLUDE_CERF_H_ #endif // _INCLUDE_CERF_H_
include/asm-arm/assembler.h
View file @ 60f63ed0
...@@ -25,11 +25,25 @@ ...@@ -25,11 +25,25 @@
#ifndef __ARMEB__ #ifndef __ARMEB__
#define pull lsr #define pull lsr
#define push lsl #define push lsl
#define byte(x) (x*8) #define get_byte_0 lsl #0
#define get_byte_1 lsr #8
#define get_byte_2 lsr #16
#define get_byte_3 lsr #24
#define put_byte_0 lsl #0
#define put_byte_1 lsl #8
#define put_byte_2 lsl #16
#define put_byte_3 lsl #24
#else #else
#define pull lsl #define pull lsl
#define push lsr #define push lsr
#define byte(x) ((3-x)*8) #define get_byte_0 lsr #24
#define get_byte_1 lsr #16
#define get_byte_2 lsr #8
#define get_byte_3 lsl #0
#define put_byte_0 lsl #24
#define put_byte_1 lsl #16
#define put_byte_2 lsl #8
#define put_byte_3 lsl #0
#endif #endif
/* /*
......
include/asm-arm/bitops.h
View file @ 60f63ed0
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
* *
* First, the atomic bitops. These use native endian. * First, the atomic bitops. These use native endian.
*/ */
static inline void ____atomic_set_bit(unsigned int bit, unsigned long *p) static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned long mask = 1UL << (bit & 31); unsigned long mask = 1UL << (bit & 31);
...@@ -41,7 +41,7 @@ static inline void ____atomic_set_bit(unsigned int bit, unsigned long *p) ...@@ -41,7 +41,7 @@ static inline void ____atomic_set_bit(unsigned int bit, unsigned long *p)
local_irq_restore(flags); local_irq_restore(flags);
} }
static inline void ____atomic_clear_bit(unsigned int bit, unsigned long *p) static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned long mask = 1UL << (bit & 31); unsigned long mask = 1UL << (bit & 31);
...@@ -53,7 +53,7 @@ static inline void ____atomic_clear_bit(unsigned int bit, unsigned long *p) ...@@ -53,7 +53,7 @@ static inline void ____atomic_clear_bit(unsigned int bit, unsigned long *p)
local_irq_restore(flags); local_irq_restore(flags);
} }
static inline void ____atomic_change_bit(unsigned int bit, unsigned long *p) static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned long mask = 1UL << (bit & 31); unsigned long mask = 1UL << (bit & 31);
...@@ -66,7 +66,7 @@ static inline void ____atomic_change_bit(unsigned int bit, unsigned long *p) ...@@ -66,7 +66,7 @@ static inline void ____atomic_change_bit(unsigned int bit, unsigned long *p)
} }
static inline int static inline int
____atomic_test_and_set_bit(unsigned int bit, unsigned long *p) ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned int res; unsigned int res;
...@@ -83,7 +83,7 @@ ____atomic_test_and_set_bit(unsigned int bit, unsigned long *p) ...@@ -83,7 +83,7 @@ ____atomic_test_and_set_bit(unsigned int bit, unsigned long *p)
} }
static inline int static inline int
____atomic_test_and_clear_bit(unsigned int bit, unsigned long *p) ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned int res; unsigned int res;
...@@ -100,7 +100,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, unsigned long *p) ...@@ -100,7 +100,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, unsigned long *p)
} }
static inline int static inline int
____atomic_test_and_change_bit(unsigned int bit, unsigned long *p) ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
{ {
unsigned long flags; unsigned long flags;
unsigned int res; unsigned int res;
...@@ -171,7 +171,7 @@ static inline int __test_and_change_bit(int nr, volatile unsigned long *p) ...@@ -171,7 +171,7 @@ static inline int __test_and_change_bit(int nr, volatile unsigned long *p)
/* /*
* This routine doesn't need to be atomic. * This routine doesn't need to be atomic.
*/ */
static inline int __test_bit(int nr, const unsigned long * p) static inline int __test_bit(int nr, const volatile unsigned long * p)
{ {
return (p[nr >> 5] >> (nr & 31)) & 1UL; return (p[nr >> 5] >> (nr & 31)) & 1UL;
} }
...@@ -204,24 +204,24 @@ static inline int __test_bit(int nr, const unsigned long * p) ...@@ -204,24 +204,24 @@ static inline int __test_bit(int nr, const unsigned long * p)
/* /*
* Little endian assembly bitops. nr = 0 -> byte 0 bit 0. * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
*/ */
extern void _set_bit_le(int nr, unsigned long * p); extern void _set_bit_le(int nr, volatile unsigned long * p);
extern void _clear_bit_le(int nr, unsigned long * p); extern void _clear_bit_le(int nr, volatile unsigned long * p);
extern void _change_bit_le(int nr, unsigned long * p); extern void _change_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_set_bit_le(int nr, unsigned long * p); extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_clear_bit_le(int nr, unsigned long * p); extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_change_bit_le(int nr, unsigned long * p); extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
extern int _find_first_zero_bit_le(void * p, unsigned size); extern int _find_first_zero_bit_le(void * p, unsigned size);
extern int _find_next_zero_bit_le(void * p, int size, int offset); extern int _find_next_zero_bit_le(void * p, int size, int offset);
/* /*
* Big endian assembly bitops. nr = 0 -> byte 3 bit 0. * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
*/ */
extern void _set_bit_be(int nr, unsigned long * p); extern void _set_bit_be(int nr, volatile unsigned long * p);
extern void _clear_bit_be(int nr, unsigned long * p); extern void _clear_bit_be(int nr, volatile unsigned long * p);
extern void _change_bit_be(int nr, unsigned long * p); extern void _change_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_set_bit_be(int nr, unsigned long * p); extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_clear_bit_be(int nr, unsigned long * p); extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_change_bit_be(int nr, unsigned long * p); extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
extern int _find_first_zero_bit_be(void * p, unsigned size); extern int _find_first_zero_bit_be(void * p, unsigned size);
extern int _find_next_zero_bit_be(void * p, int size, int offset); extern int _find_next_zero_bit_be(void * p, int size, int offset);
......
include/asm-arm/cacheflush.h
View file @ 60f63ed0
...@@ -209,8 +209,21 @@ extern void dmac_flush_range(unsigned long, unsigned long); ...@@ -209,8 +209,21 @@ extern void dmac_flush_range(unsigned long, unsigned long);
#endif #endif
/*
* flush_cache_vmap() is used when creating mappings (eg, via vmap,
* vmalloc, ioremap etc) in kernel space for pages. Since the
* direct-mappings of these pages may contain cached data, we need
* to do a full cache flush to ensure that writebacks don't corrupt
* data placed into these pages via the new mappings.
*/
#define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vmap(start, end) flush_cache_all()
#define flush_cache_vunmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all()
/*
* Copy user data from/to a page which is mapped into a different
* processes address space. Really, we want to allow our "user
* space" model to handle this.
*/
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { memcpy(dst, src, len); \ do { memcpy(dst, src, len); \
flush_icache_user_range(vma, page, vaddr, len); \ flush_icache_user_range(vma, page, vaddr, len); \
......
include/asm-arm/thread_info.h
View file @ 60f63ed0
...@@ -51,8 +51,9 @@ struct thread_info { ...@@ -51,8 +51,9 @@ struct thread_info {
__u32 cpu; /* cpu */ __u32 cpu; /* cpu */
__u32 cpu_domain; /* cpu domain */ __u32 cpu_domain; /* cpu domain */
struct cpu_context_save cpu_context; /* cpu context */ struct cpu_context_save cpu_context; /* cpu context */
struct restart_block restart_block; __u8 used_cp[16]; /* thread used copro */
union fp_state fpstate; union fp_state fpstate;
struct restart_block restart_block;
}; };
#define INIT_THREAD_INFO(tsk) \ #define INIT_THREAD_INFO(tsk) \
...@@ -107,7 +108,8 @@ extern void free_thread_info(struct thread_info *); ...@@ -107,7 +108,8 @@ extern void free_thread_info(struct thread_info *);
#define TI_CPU 20 #define TI_CPU 20
#define TI_CPU_DOMAIN 24 #define TI_CPU_DOMAIN 24
#define TI_CPU_SAVE 28 #define TI_CPU_SAVE 28
#define TI_FPSTATE 76 #define TI_USED_MATH 76
#define TI_FPSTATE (TI_USED_MATH+16)
#endif #endif
......
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