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Commit 61bac46e authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-arm64-for-5.13' of... 

Merge tag 'qcom-arm64-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for 5.13

This extends the initial SM8350 description merged in v5.12 with
CPUfreq, SMMU, UFS, RPMHPD, SPMI, USB and remoteproc support. It adds
initial PMIC definitions for the 6 PMICs found on the MTP and it
introduces the new SM8350 Hardware Development Kit (HDK).

SC7180 is further polished, the DisplayPort portion of the QMP phy is
defined and several new SKUs of the Trogdor devices are introduced.

The new SC7280 platform is introduced, with RPMH, RPMHPD, RPMCC, SPMI,
CPU idle, SMMU and watchdog defined.

SDM845 gains the camera related nodes and some cleanups.

For SM8250 it brings some cleanups and migrates SPI0 to use GPIO for
chip select.

* tag 'qcom-arm64-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (79 commits)
  arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS
  arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS
  arm64: dts: qcom: sm8250: further split of spi pinctrl config
  arm64: dts: qcom: sm8250: split spi pinctrl config
  arm64: dts: qcom: sdm845-db845c: Enable ov8856 sensor and connect to ISP
  arm64: dts: qcom: sdm845-db845c: Configure regulators for camss node
  arm64: dts: qcom: sdm845: Add CAMSS ISP node
  arm64: dts: qcom: pm8150: Enable RTC
  arm64: dts: qcom: sm8350-mtp: Add PMICs
  arm64: dts: qcom: pmr735B: Add base dts file
  arm64: dts: qcom: pmr735a: Add base dts file
  arm64: dts: qcom: pm8350c: Add base dts file
  arm64: dts: qcom: pm8350b: Add base dts file
  arm64: dts: qcom: pm8350: Add base dts file
  arm64: dts: qcom: pmk8350: Add base dts file
  arm64: dts: qcom: sm8350: Add spmi node
  arm64: dts: qcom: db845c: fix correct powerdown pin for WSA881x
  dt-bindings: arm: qcom: Add SM8350 HDK
  arm64: dts: qcom: sc7180: Drop duplicate dp_hot_plug_det node in trogdor
  arm64: dts: qcom: sm8350: fix number of pins in 'gpio-ranges'
  ...

Link: https://lore.kernel.org/r/20210404164914.712946-1-bjorn.andersson@linaro.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d1e3a9ef e9269650
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Showing with 3553 additions and 453 deletions
Documentation/devicetree/bindings/arm/qcom.yaml
View file @ 61bac46e
...@@ -37,6 +37,7 @@ description: | ...@@ -37,6 +37,7 @@ description: |
msm8994 msm8994
msm8996 msm8996
sc7180 sc7180
sc7280
sdm630 sdm630
sdm660 sdm660
sdm845 sdm845
...@@ -136,6 +137,16 @@ properties: ...@@ -136,6 +137,16 @@ properties:
- samsung,a5u-eur - samsung,a5u-eur
- const: qcom,msm8916 - const: qcom,msm8916
- items:
- enum:
- sony,karin_windy
- sony,karin-row
- sony,satsuki-row
- sony,sumire-row
- sony,suzuran-row
- qcom,msm8994
- const: qcom,apq8094
- items: - items:
- const: qcom,msm8996-mtp - const: qcom,msm8996-mtp
...@@ -164,6 +175,11 @@ properties: ...@@ -164,6 +175,11 @@ properties:
- qcom,sc7180-idp - qcom,sc7180-idp
- const: qcom,sc7180 - const: qcom,sc7180
- items:
- enum:
- qcom,sc7280-idp
- const: qcom,sc7280
- items: - items:
- enum: - enum:
- xiaomi,lavender - xiaomi,lavender
...@@ -176,6 +192,7 @@ properties: ...@@ -176,6 +192,7 @@ properties:
- items: - items:
- enum: - enum:
- qcom,ipq6018-cp01
- qcom,ipq6018-cp01-c1 - qcom,ipq6018-cp01-c1
- const: qcom,ipq6018 - const: qcom,ipq6018
...@@ -187,6 +204,7 @@ properties: ...@@ -187,6 +204,7 @@ properties:
- items: - items:
- enum: - enum:
- qcom,sm8350-hdk
- qcom,sm8350-mtp - qcom,sm8350-mtp
- const: qcom,sm8350 - const: qcom,sm8350
......
arch/arm64/boot/dts/qcom/Makefile
View file @ 61bac46e
...@@ -31,6 +31,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb ...@@ -31,6 +31,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r0.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-kb.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-kb.dtb
...@@ -38,8 +42,16 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-lte.dtb ...@@ -38,8 +42,16 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3-kb.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3-kb.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots-r4.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
...@@ -59,4 +71,5 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb ...@@ -59,4 +71,5 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8250-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8350-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View file @ 61bac46e
...@@ -9,5 +9,5 @@ ...@@ -9,5 +9,5 @@
/ { / {
model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; model = "Qualcomm Technologies, Inc. APQ 8016 SBC";
compatible = "qcom,apq8016-sbc", "qcom,apq8016", "qcom,sbc"; compatible = "qcom,apq8016-sbc", "qcom,apq8016";
}; };
arch/arm64/boot/dts/qcom/msm8916.dtsi
View file @ 61bac46e
...@@ -25,10 +25,10 @@ aliases { ...@@ -25,10 +25,10 @@ aliases {
chosen { }; chosen { };
memory { memory@80000000 {
device_type = "memory"; device_type = "memory";
/* We expect the bootloader to fill in the reg */ /* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>; reg = <0 0x80000000 0 0>;
}; };
reserved-memory { reserved-memory {
......
arch/arm64/boot/dts/qcom/msm8994.dtsi
View file @ 61bac46e
...@@ -149,10 +149,10 @@ scm { ...@@ -149,10 +149,10 @@ scm {
}; };
}; };
memory { memory@80000000 {
device_type = "memory"; device_type = "memory";
/* We expect the bootloader to fill in the reg */ /* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>; reg = <0 0x80000000 0 0>;
}; };
tcsr_mutex: hwlock { tcsr_mutex: hwlock {
......
arch/arm64/boot/dts/qcom/pm8150.dtsi
View file @ 61bac46e
...@@ -107,13 +107,11 @@ pm8150_adc_tm: adc-tm@3500 { ...@@ -107,13 +107,11 @@ pm8150_adc_tm: adc-tm@3500 {
status = "disabled"; status = "disabled";
}; };
pm8150_rtc: rtc@6000 { rtc@6000 {
compatible = "qcom,pm8941-rtc"; compatible = "qcom,pm8941-rtc";
reg = <0x6000>; reg = <0x6000>;
reg-names = "rtc", "alarm"; reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
status = "disabled";
}; };
pm8150_gpios: gpio@c000 { pm8150_gpios: gpio@c000 {
......
arch/arm64/boot/dts/qcom/pm8350.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pm8350: pmic@1 {
compatible = "qcom,pm8350", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8350_gpios: gpio@8800 {
compatible = "qcom,pm8350-gpio";
reg = <0x8800>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/pm8350b.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pm8350b: pmic@3 {
compatible = "qcom,pm8350b", "qcom,spmi-pmic";
reg = <0x3 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8350b_gpios: gpio@8800 {
compatible = "qcom,pm8350b-gpio";
reg = <0x8800>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/pm8350c.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pm8350c: pmic@2 {
compatible = "qcom,pm8350c", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8350c_gpios: gpio@8800 {
compatible = "qcom,pm8350c-gpio";
reg = <0x8800>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/pmk8350.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmk8350: pmic@0 {
compatible = "qcom,pmk8350", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmk8350_gpios: gpio@b000 {
compatible = "qcom,pmk8350-gpio";
reg = <0xb000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/pmr735a.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmr735a: pmic@4 {
compatible = "qcom,pmr735a", "qcom,spmi-pmic";
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmr735a_gpios: gpio@8800 {
compatible = "qcom,pmr735a-gpio";
reg = <0x8800>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/pmr735b.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmr735b: pmic@5 {
compatible = "qcom,pmr735b", "qcom,spmi-pmic";
reg = <0x5 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmr735b_gpios: gpio@8800 {
compatible = "qcom,pmr735b-gpio";
reg = <0x8800>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View file @ 61bac46e
...@@ -811,10 +811,6 @@ lt9611_rst_pin: lt9611-rst-pin { ...@@ -811,10 +811,6 @@ lt9611_rst_pin: lt9611-rst-pin {
}; };
}; };
&pm8150_rtc {
status = "okay";
};
&qupv3_id_0 { &qupv3_id_0 {
status = "okay"; status = "okay";
}; };
...@@ -952,6 +948,9 @@ codec { ...@@ -952,6 +948,9 @@ codec {
/* CAN */ /* CAN */
&spi0 { &spi0 {
status = "okay"; status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qup_spi0_data_clk>, <&qup_spi0_cs_gpio>;
cs-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
can@0 { can@0 {
compatible = "microchip,mcp2518fd"; compatible = "microchip,mcp2518fd";
...@@ -1352,3 +1351,14 @@ &vamacro { ...@@ -1352,3 +1351,14 @@ &vamacro {
vdd-micb-supply = <&vreg_s4a_1p8>; vdd-micb-supply = <&vreg_s4a_1p8>;
qcom,dmic-sample-rate = <600000>; qcom,dmic-sample-rate = <600000>;
}; };
/* PINCTRL - additions to nodes defined in sm8250.dtsi */
&qup_spi0_cs_gpio {
drive-strength = <6>;
bias-disable;
};
&qup_spi0_data_clk {
drive-strength = <6>;
bias-disable;
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-coachz-r1.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google CoachZ (rev1) with LTE";
compatible = "google,coachz-rev1-sku0", "qcom,sc7180";
};
&cros_ec_proximity {
label = "proximity-wifi-lte";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-coachz.dtsi"
/ {
model = "Google CoachZ (rev1)";
compatible = "google,coachz-rev1", "qcom,sc7180";
};
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"FP_TO_AP_IRQ_L",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"FPMCU_BOOT0",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"WLC_IRQ",
"FP_RST_L",
"AMP_EN",
"WLC_NRST",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"",
"",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"EN_PP3300_DX_EDP",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"FPMCU_SEL",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"DMIC_CLK_EN",
"HUB_EN",
"",
"AP_SPI_FP_MISO",
"AP_SPI_FP_MOSI",
"AP_SPI_FP_CLK",
"AP_SPI_FP_CS_L",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
dmic_clk_en: dmic_clk_en {
pinmux {
pins = "gpio83";
function = "gpio";
};
pinconf {
pins = "gpio83";
drive-strength = <8>;
bias-pull-up;
};
};
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r2-lte.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-coachz-r2.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google CoachZ (rev2+) with LTE";
compatible = "google,coachz-sku0", "qcom,sc7180";
};
&cros_ec_proximity {
label = "proximity-wifi-lte";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r2.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-coachz.dtsi"
/ {
model = "Google CoachZ (rev2+)";
compatible = "google,coachz", "qcom,sc7180";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180.dtsi"
ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
/* Deleted nodes from trogdor.dtsi */
/delete-node/ &alc5682;
/delete-node/ &pp3300_codec;
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */
adau7002: audio-codec-1 {
compatible = "adi,adau7002";
IOVDD-supply = <&pp1800_l15a>;
#sound-dai-cells = <0>;
};
};
&ap_spi_fp {
status = "okay";
};
&backlight {
pwms = <&cros_ec_pwm 0>;
};
&camcc {
status = "okay";
};
&cros_ec {
cros_ec_proximity: proximity {
compatible = "google,cros-ec-mkbp-proximity";
label = "proximity-wifi";
};
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@5d {
compatible = "goodix,gt7375p";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
vdd-supply = <&pp3300_ts>;
};
};
&i2c7 {
status = "disabled";
};
&i2c9 {
status = "disabled";
};
&panel {
compatible = "boe,nv110wtm-n61";
};
&pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
&sdhc_2 {
status = "okay";
};
&sn65dsi86_out {
data-lanes = <0 1 2 3>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
&en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
&ts_reset_l {
pinconf {
/*
* We want reset state by default and it will be up to the
* driver to disable this when it's ready.
*/
output-low;
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"FP_TO_AP_IRQ_L",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"FPMCU_BOOT0",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"WLC_IRQ",
"FP_RST_L",
"AMP_EN",
"WLC_NRST",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"",
"",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"EN_FP_RAILS",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"",
"HUB_EN",
"",
"AP_SPI_FP_MISO",
"AP_SPI_FP_MOSI",
"AP_SPI_FP_CLK",
"AP_SPI_FP_CS_L",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r4.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor Limozeen board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-lazor-limozeen-nots.dts"
/ {
model = "Google Lazor Limozeen without Touchscreen (rev4)";
compatible = "google,lazor-rev4-sku5", "qcom,sc7180";
};
/*
* rev4-sku5 was built with a different trackpad.
*/
/delete-node/&trackpad;
&ap_tp_i2c {
trackpad: trackpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
pinctrl-names = "default";
pinctrl-0 = <&tp_int_odl>;
interrupt-parent = <&tlmm>;
interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&pp3300_fp_tp>;
hid-descr-addr = <0x20>;
wakeup-source;
};
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor Limozeen board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Lazor Limozeen without Touchscreen";
compatible = "google,lazor-sku6", "google,lazor-sku5", "qcom,sc7180";
};
/delete-node/&ap_ts;
&panel {
compatible = "innolux,n116bca-ea1", "innolux,n116bge";
};
&sdhc_2 {
status = "okay";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor Limozeen board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Lazor Limozeen";
compatible = "google,lazor-sku4", "qcom,sc7180";
};
/delete-node/&ap_ts;
&ap_ts_pen_1v8 {
ap_ts: touchscreen@10 {
compatible = "elan,ekth3500";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
vcc33-supply = <&pp3300_ts>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
};
};
&panel {
compatible = "auo,b116xa01";
};
&sdhc_2 {
status = "okay";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dts
View file @ 61bac46e
...@@ -14,6 +14,15 @@ / { ...@@ -14,6 +14,15 @@ / {
compatible = "google,lazor-rev0", "qcom,sc7180"; compatible = "google,lazor-rev0", "qcom,sc7180";
}; };
/*
* Lazor is stuffed with a 47k NTC as charger thermistor which currently is
* not supported by the PM6150 ADC driver. Disable the charger thermal zone
* to avoid using bogus temperature values.
*/
&charger_thermal {
status = "disabled";
};
&pp3300_hub { &pp3300_hub {
/* pp3300_l7c is used to power the USB hub */ /* pp3300_l7c is used to power the USB hub */
/delete-property/regulator-always-on; /delete-property/regulator-always-on;
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dts
View file @ 61bac46e
...@@ -14,6 +14,15 @@ / { ...@@ -14,6 +14,15 @@ / {
compatible = "google,lazor-rev1", "google,lazor-rev2", "qcom,sc7180"; compatible = "google,lazor-rev1", "google,lazor-rev2", "qcom,sc7180";
}; };
/*
* Lazor is stuffed with a 47k NTC as charger thermistor which currently is
* not supported by the PM6150 ADC driver. Disable the charger thermal zone
* to avoid using bogus temperature values.
*/
&charger_thermal {
status = "disabled";
};
&pp3300_hub { &pp3300_hub {
/* pp3300_l7c is used to power the USB hub */ /* pp3300_l7c is used to power the USB hub */
/delete-property/regulator-always-on; /delete-property/regulator-always-on;
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dts
View file @ 61bac46e
...@@ -5,7 +5,10 @@ ...@@ -5,7 +5,10 @@
* Copyright 2020 Google LLC. * Copyright 2020 Google LLC.
*/ */
#include "sc7180-trogdor-lazor-r3.dts" /dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
#include "sc7180-lite.dtsi"
/ { / {
model = "Google Lazor (rev3+) with KB Backlight"; model = "Google Lazor (rev3+) with KB Backlight";
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dts
View file @ 61bac46e
...@@ -5,7 +5,9 @@ ...@@ -5,7 +5,9 @@
* Copyright 2020 Google LLC. * Copyright 2020 Google LLC.
*/ */
#include "sc7180-trogdor-lazor-r3.dts" /dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi" #include "sc7180-trogdor-lte-sku.dtsi"
/ { / {
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3.dts
View file @ 61bac46e
...@@ -8,8 +8,18 @@ ...@@ -8,8 +8,18 @@
/dts-v1/; /dts-v1/;
#include "sc7180-trogdor-lazor.dtsi" #include "sc7180-trogdor-lazor.dtsi"
#include "sc7180-lite.dtsi"
/ { / {
model = "Google Lazor (rev3+)"; model = "Google Lazor (rev3+)";
compatible = "google,lazor", "qcom,sc7180"; compatible = "google,lazor", "qcom,sc7180";
}; };
/*
* Lazor is stuffed with a 47k NTC as charger thermistor which currently is
* not supported by the PM6150 ADC driver. Disable the charger thermal zone
* to avoid using bogus temperature values.
*/
&charger_thermal {
status = "disabled";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
View file @ 61bac46e
...@@ -12,23 +12,6 @@ ...@@ -12,23 +12,6 @@
#include "sc7180-trogdor.dtsi" #include "sc7180-trogdor.dtsi"
/ {
panel: panel {
compatible = "boe,nv133fhm-n62";
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
ports {
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
&ap_sar_sensor { &ap_sar_sensor {
semtech,cs0-ground; semtech,cs0-ground;
semtech,combined-sensors = <3>; semtech,combined-sensors = <3>;
...@@ -58,8 +41,30 @@ ap_ts: touchscreen@10 { ...@@ -58,8 +41,30 @@ ap_ts: touchscreen@10 {
}; };
}; };
&panel {
compatible = "boe,nv133fhm-n62";
};
&trackpad {
interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
};
&wifi {
qcom,ath10k-calibration-variant = "GO_LAZOR";
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */ /* PINCTRL - modifications to sc7180-trogdor.dtsi */
&trackpad_int_1v8_odl {
pinmux {
pins = "gpio58";
};
pinconf {
pins = "gpio58";
};
};
&ts_reset_l { &ts_reset_l {
pinconf { pinconf {
/* This pin is not connected on -rev0, pull up to park. */ /* This pin is not connected on -rev0, pull up to park. */
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1-lte.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pompom board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-pompom-r1.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pompom (rev1) with LTE";
compatible = "google,pompom-rev1-sku0", "qcom,sc7180";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pompom board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-pompom.dtsi"
/ {
model = "Google Pompom (rev1)";
compatible = "google,pompom-rev1", "qcom,sc7180";
};
&pp3300_hub {
/* pp3300_l7c is used to power the USB hub */
/delete-property/regulator-always-on;
/delete-property/regulator-boot-on;
};
&pp3300_l7c {
regulator-always-on;
regulator-boot-on;
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2-lte.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pompom board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-pompom-r2.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pompom (rev2+) with LTE";
compatible = "google,pompom-sku0", "qcom,sc7180";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pompom board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-pompom.dtsi"
/ {
model = "Google Pompom (rev2+)";
compatible = "google,pompom", "qcom,sc7180";
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pompom board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180.dtsi"
ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
/ {
thermal-zones {
5v-choke-thermal {
polling-delay-passive = <0>;
polling-delay = <250>;
thermal-sensors = <&pm6150_adc_tm 1>;
trips {
5v-choke-crit {
temperature = <125000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
};
&alc5682 {
realtek,dmic-clk-driving-high = "true";
};
&cpu6_alert0 {
temperature = <60000>;
};
&cpu6_alert1 {
temperature = <65000>;
};
&cpu6_thermal {
sustainable-power = <948>;
};
&cpu7_alert0 {
temperature = <60000>;
};
&cpu7_alert1 {
temperature = <65000>;
};
&cpu7_thermal {
sustainable-power = <948>;
};
&cpu8_alert0 {
temperature = <60000>;
};
&cpu8_alert1 {
temperature = <65000>;
};
&cpu8_thermal {
sustainable-power = <948>;
};
&cpu9_alert0 {
temperature = <60000>;
};
&cpu9_alert1 {
temperature = <65000>;
};
&cpu9_thermal {
sustainable-power = <948>;
};
&gpio_keys {
status = "okay";
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
};
};
&panel {
compatible = "kingdisplay,kd116n21-30nv-a010";
};
&pen_insert {
/* Insert = high, eject = low */
gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
};
&pm6150_adc {
5v-choke-thermistor@4e {
reg = <ADC5_AMUX_THM2_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&pm6150_adc_tm {
status = "okay";
5v-choke-thermistor@1 {
reg = <1>;
io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
};
&sdhc_2 {
status = "okay";
};
&usb_c1 {
status = "disabled";
};
&wifi {
qcom,ath10k-calibration-variant = "GO_POMPOM";
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "TP_INT_ODL",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"",
"",
"",
"",
"",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"",
"EN_PP3300_DX_EDP",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"PEN_PDCT_L",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"EN_PP3300_CODEC",
"EN_PP3300_HUB",
"",
"DMIC_SEL",
"",
"",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_R_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
dmic_sel: dmic-sel {
pinmux {
pins = "gpio86";
function = "gpio";
};
pinconf {
pins = "gpio86";
bias-pull-down;
};
};
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
View file @ 61bac46e
...@@ -17,21 +17,6 @@ ...@@ -17,21 +17,6 @@
/ { / {
model = "Google Trogdor (rev1+)"; model = "Google Trogdor (rev1+)";
compatible = "google,trogdor", "qcom,sc7180"; compatible = "google,trogdor", "qcom,sc7180";
panel: panel {
compatible = "auo,b116xa01";
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
ports {
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
}; };
ap_ts_pen_1v8: &i2c4 { ap_ts_pen_1v8: &i2c4 {
...@@ -53,6 +38,10 @@ ap_ts: touchscreen@10 { ...@@ -53,6 +38,10 @@ ap_ts: touchscreen@10 {
}; };
}; };
&panel {
compatible = "auo,b116xa01";
};
&pp3300_hub { &pp3300_hub {
/* pp3300_l7c is used to power the USB hub */ /* pp3300_l7c is used to power the USB hub */
/delete-property/regulator-always-on; /delete-property/regulator-always-on;
...@@ -68,6 +57,22 @@ &sdhc_2 { ...@@ -68,6 +57,22 @@ &sdhc_2 {
status = "okay"; status = "okay";
}; };
&trackpad {
interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
&trackpad_int_1v8_odl {
pinmux {
pins = "gpio58";
};
pinconf {
pins = "gpio58";
};
};
/* PINCTRL - board-specific pinctrl */ /* PINCTRL - board-specific pinctrl */
&tlmm { &tlmm {
......
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View file @ 61bac46e
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
*/ */
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
...@@ -15,16 +16,18 @@ ...@@ -15,16 +16,18 @@
/ { / {
thermal-zones { thermal-zones {
charger-thermal { charger_thermal: charger-thermal {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&pm6150_adc_tm 1>; thermal-sensors = <&pm6150_adc_tm 0>;
trips { trips {
temperature = <125000>; charger-crit {
hysteresis = <1000>; temperature = <125000>;
type = "critical"; hysteresis = <1000>;
type = "critical";
};
}; };
}; };
}; };
...@@ -243,6 +246,7 @@ pen_insert: pen-insert { ...@@ -243,6 +246,7 @@ pen_insert: pen-insert {
gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
linux,code = <SW_PEN_INSERTED>; linux,code = <SW_PEN_INSERTED>;
linux,input-type = <EV_SW>; linux,input-type = <EV_SW>;
wakeup-event-action = <EV_ACT_DEASSERTED>;
wakeup-source; wakeup-source;
}; };
}; };
...@@ -255,6 +259,21 @@ max98357a: audio-codec-0 { ...@@ -255,6 +259,21 @@ max98357a: audio-codec-0 {
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
}; };
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
ports {
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
pwmleds { pwmleds {
compatible = "pwm-leds"; compatible = "pwm-leds";
keyboard_backlight: keyboard-backlight { keyboard_backlight: keyboard-backlight {
...@@ -551,6 +570,10 @@ cr50: tpm@0 { ...@@ -551,6 +570,10 @@ cr50: tpm@0 {
}; };
}; };
&camcc {
status = "disabled";
};
&dsi0 { &dsi0 {
status = "okay"; status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>; vdda-supply = <&vdda_mipi_dsi0_1p2>;
...@@ -642,14 +665,14 @@ ap_tp_i2c: &i2c7 { ...@@ -642,14 +665,14 @@ ap_tp_i2c: &i2c7 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
trackpad@15 { trackpad: trackpad@15 {
compatible = "elan,ekth3000"; compatible = "elan,ekth3000";
reg = <0x15>; reg = <0x15>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&trackpad_int_1v8_odl>; pinctrl-0 = <&tp_int_odl>;
interrupt-parent = <&tlmm>; interrupt-parent = <&tlmm>;
interrupts = <58 IRQ_TYPE_EDGE_FALLING>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&pp3300_fp_tp>; vcc-supply = <&pp3300_fp_tp>;
...@@ -716,8 +739,8 @@ charger-thermistor@4f { ...@@ -716,8 +739,8 @@ charger-thermistor@4f {
&pm6150_adc_tm { &pm6150_adc_tm {
status = "okay"; status = "okay";
charger-thermistor@1 { charger-thermistor@0 {
reg = <1>; reg = <0>;
io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric; qcom,ratiometric;
qcom,hw-settle-time-us = <200>; qcom,hw-settle-time-us = <200>;
...@@ -768,17 +791,17 @@ &sdhc_2 { ...@@ -768,17 +791,17 @@ &sdhc_2 {
}; };
&spi0 { &spi0 {
pinctrl-0 = <&qup_spi0_cs_gpio>; pinctrl-0 = <&qup_spi0_cs_gpio_init_high>, <&qup_spi0_cs_gpio>;
cs-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; cs-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
}; };
&spi6 { &spi6 {
pinctrl-0 = <&qup_spi6_cs_gpio>; pinctrl-0 = <&qup_spi6_cs_gpio_init_high>, <&qup_spi6_cs_gpio>;
cs-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; cs-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
}; };
ap_spi_fp: &spi10 { ap_spi_fp: &spi10 {
pinctrl-0 = <&qup_spi10_cs_gpio>; pinctrl-0 = <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>; cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
cros_ec_fp: ec@0 { cros_ec_fp: ec@0 {
...@@ -787,7 +810,7 @@ cros_ec_fp: ec@0 { ...@@ -787,7 +810,7 @@ cros_ec_fp: ec@0 {
interrupt-parent = <&tlmm>; interrupt-parent = <&tlmm>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>, <&fpmcu_sel>; pinctrl-0 = <&fp_to_ap_irq_l>;
spi-max-frequency = <3000000>; spi-max-frequency = <3000000>;
}; };
}; };
...@@ -812,7 +835,6 @@ bluetooth: bluetooth { ...@@ -812,7 +835,6 @@ bluetooth: bluetooth {
vddrf-supply = <&pp1300_l2c>; vddrf-supply = <&pp1300_l2c>;
vddch0-supply = <&pp3300_l10c>; vddch0-supply = <&pp3300_l10c>;
max-speed = <3200000>; max-speed = <3200000>;
clocks = <&rpmhcc RPMH_RF_CLK2>;
}; };
}; };
...@@ -875,6 +897,22 @@ pinconf { ...@@ -875,6 +897,22 @@ pinconf {
}; };
}; };
&pri_mi2s_active {
pinconf {
pins = "gpio53", "gpio54", "gpio55", "gpio56";
drive-strength = <2>;
bias-pull-down;
};
};
&pri_mi2s_mclk_active {
pinconf {
pins = "gpio57";
drive-strength = <2>;
bias-pull-down;
};
};
&qspi_cs0 { &qspi_cs0 {
pinconf { pinconf {
pins = "gpio68"; pins = "gpio68";
...@@ -1015,6 +1053,14 @@ pinconf-rx { ...@@ -1015,6 +1053,14 @@ pinconf-rx {
}; };
}; };
&sec_mi2s_active {
pinconf {
pins = "gpio49", "gpio50", "gpio51";
drive-strength = <2>;
bias-pull-down;
};
};
/* PINCTRL - board-specific pinctrl */ /* PINCTRL - board-specific pinctrl */
&pm6150_gpio { &pm6150_gpio {
...@@ -1109,20 +1155,6 @@ pinconf { ...@@ -1109,20 +1155,6 @@ pinconf {
}; };
}; };
dp_hot_plug_det: dp-hot-plug-det {
pinmux {
pins = "gpio117";
function = "dp_hot";
};
config {
pins = "gpio117";
bias-disable;
input-enable;
drive-strength = <2>;
};
};
edp_brij_en: edp-brij-en { edp_brij_en: edp-brij-en {
pinmux { pinmux {
pins = "gpio104"; pins = "gpio104";
...@@ -1188,48 +1220,6 @@ pinconf { ...@@ -1188,48 +1220,6 @@ pinconf {
}; };
}; };
fpmcu_boot0: fpmcu-boot0 {
pinmux {
pins = "gpio10";
function = "gpio";
};
pinconf {
pins = "gpio10";
bias-disable;
drive-strength = <2>;
output-low;
};
};
fpmcu_sel: fpmcu-sel {
pinmux {
pins = "gpio22";
function = "gpio";
};
pinconf {
pins = "gpio22";
bias-disable;
drive-strength = <2>;
output-high;
};
};
fp_rst_l: fp-rst-l {
pinmux {
pins = "gpio5";
function = "gpio";
};
pinconf {
pins = "gpio5";
bias-disable;
drive-strength = <2>;
output-high;
};
};
fp_to_ap_irq_l: fp-to-ap-irq-l { fp_to_ap_irq_l: fp-to-ap-irq-l {
pinmux { pinmux {
pins = "gpio4"; pins = "gpio4";
...@@ -1245,7 +1235,6 @@ pinconf { ...@@ -1245,7 +1235,6 @@ pinconf {
}; };
}; };
h1_ap_int_odl: h1-ap-int-odl { h1_ap_int_odl: h1-ap-int-odl {
pinmux { pinmux {
pins = "gpio42"; pins = "gpio42";
...@@ -1339,6 +1328,27 @@ pinconf { ...@@ -1339,6 +1328,27 @@ pinconf {
}; };
}; };
qup_spi0_cs_gpio_init_high: qup-spi0-cs-gpio-init-high {
pinconf {
pins = "gpio37";
output-high;
};
};
qup_spi6_cs_gpio_init_high: qup-spi6-cs-gpio-init-high {
pinconf {
pins = "gpio62";
output-high;
};
};
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
pinconf {
pins = "gpio89";
output-high;
};
};
qup_uart3_sleep: qup-uart3-sleep { qup_uart3_sleep: qup-uart3-sleep {
pinmux { pinmux {
pins = "gpio38", "gpio39", pins = "gpio38", "gpio39",
...@@ -1386,14 +1396,16 @@ pinconf-rx { ...@@ -1386,14 +1396,16 @@ pinconf-rx {
}; };
}; };
trackpad_int_1v8_odl: trackpad-int-1v8-odl { /* Named trackpad_int_1v8_odl on earlier revision schematics */
trackpad_int_1v8_odl:
tp_int_odl: tp-int-odl {
pinmux { pinmux {
pins = "gpio58"; pins = "gpio0";
function = "gpio"; function = "gpio";
}; };
pinconf { pinconf {
pins = "gpio58"; pins = "gpio0";
/* Has external pullup */ /* Has external pullup */
bias-disable; bias-disable;
......
arch/arm64/boot/dts/qcom/sc7180.dtsi
View file @ 61bac46e
...@@ -1856,12 +1856,6 @@ pinmux { ...@@ -1856,12 +1856,6 @@ pinmux {
pins = "gpio49", "gpio50", "gpio51"; pins = "gpio49", "gpio50", "gpio51";
function = "mi2s_1"; function = "mi2s_1";
}; };
pinconf {
pins = "gpio49", "gpio50", "gpio51";
drive-strength = <8>;
bias-pull-up;
};
}; };
pri_mi2s_active: pri-mi2s-active { pri_mi2s_active: pri-mi2s-active {
...@@ -1869,12 +1863,6 @@ pinmux { ...@@ -1869,12 +1863,6 @@ pinmux {
pins = "gpio53", "gpio54", "gpio55", "gpio56"; pins = "gpio53", "gpio54", "gpio55", "gpio56";
function = "mi2s_0"; function = "mi2s_0";
}; };
pinconf {
pins = "gpio53", "gpio54", "gpio55", "gpio56";
drive-strength = <8>;
bias-pull-up;
};
}; };
pri_mi2s_mclk_active: pri-mi2s-mclk-active { pri_mi2s_mclk_active: pri-mi2s-mclk-active {
...@@ -1882,12 +1870,6 @@ pinmux { ...@@ -1882,12 +1870,6 @@ pinmux {
pins = "gpio57"; pins = "gpio57";
function = "lpass_ext"; function = "lpass_ext";
}; };
pinconf {
pins = "gpio57";
drive-strength = <8>;
bias-pull-up;
};
}; };
sdc1_on: sdc1-on { sdc1_on: sdc1-on {
...@@ -2770,12 +2752,11 @@ usb_1_hsphy: phy@88e3000 { ...@@ -2770,12 +2752,11 @@ usb_1_hsphy: phy@88e3000 {
}; };
usb_1_qmpphy: phy-wrapper@88e9000 { usb_1_qmpphy: phy-wrapper@88e9000 {
compatible = "qcom,sc7180-qmp-usb3-phy"; compatible = "qcom,sc7180-qmp-usb3-dp-phy";
reg = <0 0x088e9000 0 0x18c>, reg = <0 0x088e9000 0 0x18c>,
<0 0x088e8000 0 0x38>; <0 0x088e8000 0 0x38>,
reg-names = "reg-base", "dp_com"; <0 0x088ea000 0 0x40>;
status = "disabled"; status = "disabled";
#clock-cells = <1>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
...@@ -2790,7 +2771,7 @@ usb_1_qmpphy: phy-wrapper@88e9000 { ...@@ -2790,7 +2771,7 @@ usb_1_qmpphy: phy-wrapper@88e9000 {
<&gcc GCC_USB3_DP_PHY_PRIM_BCR>; <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
reset-names = "phy", "common"; reset-names = "phy", "common";
usb_1_ssphy: phy@88e9200 { usb_1_ssphy: usb3-phy@88e9200 {
reg = <0 0x088e9200 0 0x128>, reg = <0 0x088e9200 0 0x128>,
<0 0x088e9400 0 0x200>, <0 0x088e9400 0 0x200>,
<0 0x088e9c00 0 0x218>, <0 0x088e9c00 0 0x218>,
...@@ -2803,6 +2784,16 @@ usb_1_ssphy: phy@88e9200 { ...@@ -2803,6 +2784,16 @@ usb_1_ssphy: phy@88e9200 {
clock-names = "pipe0"; clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src"; clock-output-names = "usb3_phy_pipe_clk_src";
}; };
dp_phy: dp-phy@88ea200 {
reg = <0 0x088ea200 0 0x200>,
<0 0x088ea400 0 0x200>,
<0 0x088eaa00 0 0x200>,
<0 0x088ea600 0 0x200>,
<0 0x088ea800 0 0x200>;
#clock-cells = <1>;
#phy-cells = <0>;
};
}; };
dc_noc: interconnect@9160000 { dc_noc: interconnect@9160000 {
...@@ -2854,10 +2845,10 @@ usb_1: usb@a6f8800 { ...@@ -2854,10 +2845,10 @@ usb_1: usb@a6f8800 {
<&gcc GCC_USB30_PRIM_MASTER_CLK>; <&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <150000000>; assigned-clock-rates = <19200000>, <150000000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, <&pdc 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; <&pdc 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "ss_phy_irq", interrupt-names = "hs_phy_irq", "ss_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq"; "dm_hs_phy_irq", "dp_hs_phy_irq";
...@@ -3166,8 +3157,8 @@ dispcc: clock-controller@af00000 { ...@@ -3166,8 +3157,8 @@ dispcc: clock-controller@af00000 {
<&gcc GCC_DISP_GPLL0_CLK_SRC>, <&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&dsi_phy 0>, <&dsi_phy 0>,
<&dsi_phy 1>, <&dsi_phy 1>,
<0>, <&dp_phy 0>,
<0>; <&dp_phy 1>;
clock-names = "bi_tcxo", clock-names = "bi_tcxo",
"gcc_disp_gpll0_clk_src", "gcc_disp_gpll0_clk_src",
"dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_byteclk",
...@@ -3222,7 +3213,7 @@ aoss_reset: reset-controller@c2a0000 { ...@@ -3222,7 +3213,7 @@ aoss_reset: reset-controller@c2a0000 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
aoss_qmp: qmp@c300000 { aoss_qmp: power-controller@c300000 {
compatible = "qcom,sc7180-aoss-qmp"; compatible = "qcom,sc7180-aoss-qmp";
reg = <0 0x0c300000 0 0x100000>; reg = <0 0x0c300000 0 0x100000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
......
arch/arm64/boot/dts/qcom/sc7280-idp.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* sc7280 IDP board device tree source
*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include "sc7280.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sc7280 IDP platform";
compatible = "qcom,sc7280-idp", "qcom,sc7280";
aliases {
serial0 = &uart5;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&qupv3_id_0 {
status = "okay";
};
&uart5 {
status = "okay";
};
/* PINCTRL - additions to nodes defined in sc7280.dtsi */
&qup_uart5_default {
tx {
pins = "gpio46";
drive-strength = <2>;
bias-disable;
};
rx {
pins = "gpio47";
drive-strength = <2>;
bias-pull-up;
};
};
arch/arm64/boot/dts/qcom/sc7280.dtsi 0 → 100644
View file @ 61bac46e
This diff is collapsed.
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View file @ 61bac46e
...@@ -1015,7 +1015,7 @@ swm: swm@c85 { ...@@ -1015,7 +1015,7 @@ swm: swm@c85 {
left_spkr: wsa8810-left{ left_spkr: wsa8810-left{
compatible = "sdw10217201000"; compatible = "sdw10217201000";
reg = <0 1>; reg = <0 1>;
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft"; sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
...@@ -1023,7 +1023,7 @@ left_spkr: wsa8810-left{ ...@@ -1023,7 +1023,7 @@ left_spkr: wsa8810-left{
right_spkr: wsa8810-right{ right_spkr: wsa8810-right{
compatible = "sdw10217201000"; compatible = "sdw10217201000";
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
reg = <0 2>; reg = <0 2>;
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight"; sound-name-prefix = "SpkrRight";
...@@ -1108,6 +1108,25 @@ &cci { ...@@ -1108,6 +1108,25 @@ &cci {
status = "okay"; status = "okay";
}; };
&camss {
vdda-supply = <&vreg_l1a_0p875>;
status = "ok";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <7>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&ov8856_ep>;
};
};
};
};
&cci_i2c0 { &cci_i2c0 {
camera@10 { camera@10 {
compatible = "ovti,ov8856"; compatible = "ovti,ov8856";
...@@ -1137,7 +1156,7 @@ camera@10 { ...@@ -1137,7 +1156,7 @@ camera@10 {
avdd-supply = <&cam0_avdd_2v8>; avdd-supply = <&cam0_avdd_2v8>;
dvdd-supply = <&cam0_dvdd_1v2>; dvdd-supply = <&cam0_dvdd_1v2>;
status = "disable"; status = "ok";
port { port {
ov8856_ep: endpoint { ov8856_ep: endpoint {
...@@ -1145,7 +1164,7 @@ ov8856_ep: endpoint { ...@@ -1145,7 +1164,7 @@ ov8856_ep: endpoint {
link-frequencies = /bits/ 64 link-frequencies = /bits/ 64
<360000000 180000000>; <360000000 180000000>;
data-lanes = <1 2 3 4>; data-lanes = <1 2 3 4>;
// remote-endpoint = <&csiphy0_ep>; remote-endpoint = <&csiphy0_ep>;
}; };
}; };
}; };
......
arch/arm64/boot/dts/qcom/sdm845.dtsi
View file @ 61bac46e
...@@ -2382,7 +2382,7 @@ tlmm: pinctrl@3400000 { ...@@ -2382,7 +2382,7 @@ tlmm: pinctrl@3400000 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 150>; gpio-ranges = <&tlmm 0 0 151>;
wakeup-parent = <&pdc_intc>; wakeup-parent = <&pdc_intc>;
cci0_default: cci0-default { cci0_default: cci0-default {
...@@ -3909,6 +3909,141 @@ videocc: clock-controller@ab00000 { ...@@ -3909,6 +3909,141 @@ videocc: clock-controller@ab00000 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
camss: camss@a00000 {
compatible = "qcom,sdm845-camss";
reg = <0 0xacb3000 0 0x1000>,
<0 0xacba000 0 0x1000>,
<0 0xacc8000 0 0x1000>,
<0 0xac65000 0 0x1000>,
<0 0xac66000 0 0x1000>,
<0 0xac67000 0 0x1000>,
<0 0xac68000 0 0x1000>,
<0 0xacaf000 0 0x4000>,
<0 0xacb6000 0 0x4000>,
<0 0xacc4000 0 0x4000>;
reg-names = "csid0",
"csid1",
"csid2",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"vfe0",
"vfe1",
"vfe_lite";
interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "csid0",
"csid1",
"csid2",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"vfe0",
"vfe1",
"vfe_lite";
power-domains = <&clock_camcc IFE_0_GDSC>,
<&clock_camcc IFE_1_GDSC>,
<&clock_camcc TITAN_TOP_GDSC>;
clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY0_CLK>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY1_CLK>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY2_CLK>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY3_CLK>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMERA_AHB_CLK>,
<&gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK>,
<&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
<&clock_camcc CAM_CC_IFE_1_CLK>,
<&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
clock-names = "camnoc_axi",
"cpas_ahb",
"cphy_rx_src",
"csi0",
"csi0_src",
"csi1",
"csi1_src",
"csi2",
"csi2_src",
"csiphy0",
"csiphy0_timer",
"csiphy0_timer_src",
"csiphy1",
"csiphy1_timer",
"csiphy1_timer_src",
"csiphy2",
"csiphy2_timer",
"csiphy2_timer_src",
"csiphy3",
"csiphy3_timer",
"csiphy3_timer_src",
"gcc_camera_ahb",
"gcc_camera_axi",
"slow_ahb_src",
"soc_ahb",
"vfe0_axi",
"vfe0",
"vfe0_cphy_rx",
"vfe0_src",
"vfe1_axi",
"vfe1",
"vfe1_cphy_rx",
"vfe1_src",
"vfe_lite",
"vfe_lite_cphy_rx",
"vfe_lite_src";
iommus = <&apps_smmu 0x0808 0x0>,
<&apps_smmu 0x0810 0x8>,
<&apps_smmu 0x0c08 0x0>,
<&apps_smmu 0x0c10 0x8>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
cci: cci@ac4a000 { cci: cci@ac4a000 {
compatible = "qcom,sdm845-cci"; compatible = "qcom,sdm845-cci";
#address-cells = <1>; #address-cells = <1>;
...@@ -4428,7 +4563,7 @@ aoss_reset: reset-controller@c2a0000 { ...@@ -4428,7 +4563,7 @@ aoss_reset: reset-controller@c2a0000 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
aoss_qmp: qmp@c300000 { aoss_qmp: power-controller@c300000 {
compatible = "qcom,sdm845-aoss-qmp"; compatible = "qcom,sdm845-aoss-qmp";
reg = <0 0x0c300000 0 0x100000>; reg = <0 0x0c300000 0 0x100000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
......
arch/arm64/boot/dts/qcom/sm8150.dtsi
View file @ 61bac46e
...@@ -914,7 +914,7 @@ tlmm: pinctrl@3100000 { ...@@ -914,7 +914,7 @@ tlmm: pinctrl@3100000 {
<0x0 0x03D00000 0x0 0x300000>; <0x0 0x03D00000 0x0 0x300000>;
reg-names = "west", "east", "north", "south"; reg-names = "west", "east", "north", "south";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&tlmm 0 0 175>; gpio-ranges = <&tlmm 0 0 176>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
......
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
View file @ 61bac46e
...@@ -601,10 +601,6 @@ pa-therm2@4f { ...@@ -601,10 +601,6 @@ pa-therm2@4f {
}; };
}; };
&pm8150_rtc {
status = "okay";
};
&qupv3_id_0 { &qupv3_id_0 {
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/qcom/sm8250.dtsi
View file @ 61bac46e
This diff is collapsed.
arch/arm64/boot/dts/qcom/sm8350-hdk.dts 0 → 100644
View file @ 61bac46e
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2020-2021, Linaro Limited
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8350.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SM8350 HDK";
compatible = "qcom,sm8350-hdk", "qcom,sm8350";
aliases {
serial0 = &uart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
};
};
&adsp {
status = "okay";
firmware-name = "qcom/sm8350/adsp.mbn";
};
&apps_rsc {
pm8350-rpmh-regulators {
compatible = "qcom,pm8350-rpmh-regulators";
qcom,pmic-id = "b";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-s11-supply = <&vph_pwr>;
vdd-s12-supply = <&vph_pwr>;
vdd-l1-l4-supply = <&vreg_s11b_0p95>;
vdd-l2-l7-supply = <&vreg_bob>;
vdd-l3-l5-supply = <&vreg_bob>;
vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
vreg_s10b_1p8: smps10 {
regulator-name = "vreg_s10b_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s11b_0p95: smps11 {
regulator-name = "vreg_s11b_0p95";
regulator-min-microvolt = <952000>;
regulator-max-microvolt = <952000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s12b_1p25: smps12 {
regulator-name = "vreg_s12b_1p25";
regulator-min-microvolt = <1256000>;
regulator-max-microvolt = <1256000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l1b_0p88: ldo1 {
regulator-name = "vreg_l1b_0p88";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <920000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2b_3p07: ldo2 {
regulator-name = "vreg_l2b_3p07";
regulator-min-microvolt = <3072000>;
regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3b_0p9: ldo3 {
regulator-name = "vreg_l3b_0p9";
regulator-min-microvolt = <904000>;
regulator-max-microvolt = <904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5b_0p88: ldo5 {
regulator-name = "vreg_l5b_0p88";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <888000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l6b_1p2: ldo6 {
regulator-name = "vreg_l6b_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1208000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l7b_2p96: ldo7 {
regulator-name = "vreg_l7b_2p96";
regulator-min-microvolt = <2504000>;
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l9b_1p2: ldo9 {
regulator-name = "vreg_l9b_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
};
pm8350c-rpmh-regulators {
compatible = "qcom,pm8350c-rpmh-regulators";
qcom,pmic-id = "c";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-l1-l12-supply = <&vreg_s1c_1p86>;
vdd-l2-l8-supply = <&vreg_s1c_1p86>;
vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
vdd-l6-l9-l11-supply = <&vreg_bob>;
vdd-l10-supply = <&vreg_s12b_1p25>;
vdd-bob-supply = <&vph_pwr>;
vreg_s1c_1p86: smps1 {
regulator-name = "vreg_s1c_1p86";
regulator-min-microvolt = <1856000>;
regulator-max-microvolt = <1880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_bob: bob {
regulator-name = "vreg_bob";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
};
vreg_l1c_1p8: ldo1 {
regulator-name = "vreg_l1c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2c_1p8: ldo2 {
regulator-name = "vreg_l2c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6c_1p8: ldo6 {
regulator-name = "vreg_l6c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_1p2: ldo10 {
regulator-name = "vreg_l10c_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
};
&cdsp {
status = "okay";
firmware-name = "qcom/sm8350/cdsp.mbn";
};
&mpss {
status = "okay";
firmware-name = "qcom/sm8350/modem.mbn";
};
&qupv3_id_1 {
status = "okay";
};
&slpi {
status = "okay";
firmware-name = "qcom/sm8350/slpi.mbn";
};
&tlmm {
gpio-reserved-ranges = <52 8>;
};
&uart2 {
status = "okay";
};
&ufs_mem_hc {
status = "okay";
reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l7b_2p96>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l9b_1p2>;
vccq-max-microamp = <900000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vreg_l5b_0p88>;
vdda-max-microamp = <91600>;
vdda-pll-supply = <&vreg_l6b_1p2>;
vdda-pll-max-microamp = <19000>;
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
/* TODO: Define USB-C connector properly */
dr_mode = "peripheral";
};
&usb_1_hsphy {
status = "okay";
vdda-pll-supply = <&vreg_l5b_0p88>;
vdda18-supply = <&vreg_l1c_1p8>;
vdda33-supply = <&vreg_l2b_3p07>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p88>;
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&usb_hub_enabled_state>;
};
&usb_2_hsphy {
status = "okay";
vdda-pll-supply = <&vreg_l5b_0p88>;
vdda18-supply = <&vreg_l1c_1p8>;
vdda33-supply = <&vreg_l2b_3p07>;
};
&usb_2_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l5b_0p88>;
};
/* PINCTRL - additions to nodes defined in sm8350.dtsi */
&tlmm {
usb_hub_enabled_state: usb-hub-enabled-state {
pins = "gpio42";
function = "gpio";
drive-strength = <2>;
output-low;
};
};
arch/arm64/boot/dts/qcom/sm8350-mtp.dts
View file @ 61bac46e
...@@ -5,8 +5,15 @@ ...@@ -5,8 +5,15 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8350.dtsi" #include "sm8350.dtsi"
#include "pm8350.dtsi"
#include "pm8350b.dtsi"
#include "pm8350c.dtsi"
#include "pmk8350.dtsi"
#include "pmr735a.dtsi"
#include "pmr735b.dtsi"
/ { / {
model = "Qualcomm Technologies, Inc. sm8350 MTP"; model = "Qualcomm Technologies, Inc. sm8350 MTP";
...@@ -31,6 +38,11 @@ vph_pwr: vph-pwr-regulator { ...@@ -31,6 +38,11 @@ vph_pwr: vph-pwr-regulator {
}; };
}; };
&adsp {
status = "okay";
firmware-name = "qcom/sm8350/adsp.mbn";
};
&apps_rsc { &apps_rsc {
pm8350-rpmh-regulators { pm8350-rpmh-regulators {
compatible = "qcom,pm8350-rpmh-regulators"; compatible = "qcom,pm8350-rpmh-regulators";
...@@ -56,57 +68,67 @@ pm8350-rpmh-regulators { ...@@ -56,57 +68,67 @@ pm8350-rpmh-regulators {
vdd-l8-supply = <&vreg_s2c_0p8>; vdd-l8-supply = <&vreg_s2c_0p8>;
vreg_s10b_1p8: smps10 { vreg_s10b_1p8: smps10 {
regulator-name = "vreg_s10b_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
vreg_s11b_0p95: smps11 { vreg_s11b_0p95: smps11 {
regulator-name = "vreg_s11b_0p95";
regulator-min-microvolt = <752000>; regulator-min-microvolt = <752000>;
regulator-max-microvolt = <1000000>; regulator-max-microvolt = <1000000>;
}; };
vreg_s12b_1p25: smps12 { vreg_s12b_1p25: smps12 {
regulator-name = "vreg_s12b_1p25";
regulator-min-microvolt = <1224000>; regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1360000>; regulator-max-microvolt = <1360000>;
}; };
vreg_l1b_0p88: ldo1 { vreg_l1b_0p88: ldo1 {
regulator-name = "vreg_l1b_0p88";
regulator-min-microvolt = <912000>; regulator-min-microvolt = <912000>;
regulator-max-microvolt = <920000>; regulator-max-microvolt = <920000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l2b_3p07: ldo2 { vreg_l2b_3p07: ldo2 {
regulator-name = "vreg_l2b_3p07";
regulator-min-microvolt = <3072000>; regulator-min-microvolt = <3072000>;
regulator-max-microvolt = <3072000>; regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l3b_0p9: ldo3 { vreg_l3b_0p9: ldo3 {
regulator-name = "vreg_l3b_0p9";
regulator-min-microvolt = <904000>; regulator-min-microvolt = <904000>;
regulator-max-microvolt = <904000>; regulator-max-microvolt = <904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l5b_0p88: ldo5 { vreg_l5b_0p88: ldo5 {
regulator-name = "vreg_l3b_0p9";
regulator-min-microvolt = <880000>; regulator-min-microvolt = <880000>;
regulator-max-microvolt = <888000>; regulator-max-microvolt = <888000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l6b_1p2: ldo6 { vreg_l6b_1p2: ldo6 {
regulator-name = "vreg_l6b_1p2";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1208000>; regulator-max-microvolt = <1208000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l7b_2p96: ldo7 { vreg_l7b_2p96: ldo7 {
regulator-name = "vreg_l7b_2p96";
regulator-min-microvolt = <2400000>; regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3008000>; regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l9b_1p2: ldo9 { vreg_l9b_1p2: ldo9 {
regulator-name = "vreg_l9b_1p2";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>; regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
...@@ -137,99 +159,116 @@ pm8350c-rpmh-regulators { ...@@ -137,99 +159,116 @@ pm8350c-rpmh-regulators {
vdd-bob-supply = <&vph_pwr>; vdd-bob-supply = <&vph_pwr>;
vreg_s1c_1p86: smps1 { vreg_s1c_1p86: smps1 {
regulator-name = "vreg_s1c_1p86";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1952000>; regulator-max-microvolt = <1952000>;
}; };
vreg_s2c_0p8: smps2 { vreg_s2c_0p8: smps2 {
regulator-name = "vreg_s2c_0p8";
regulator-min-microvolt = <640000>; regulator-min-microvolt = <640000>;
regulator-max-microvolt = <1000000>; regulator-max-microvolt = <1000000>;
}; };
vreg_s10c_1p05: smps10 { vreg_s10c_1p05: smps10 {
regulator-name = "vreg_s10c_1p05";
regulator-min-microvolt = <1048000>; regulator-min-microvolt = <1048000>;
regulator-max-microvolt = <1128000>; regulator-max-microvolt = <1128000>;
}; };
vreg_bob: bob { vreg_bob: bob {
regulator-name = "vreg_bob";
regulator-min-microvolt = <3008000>; regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>; regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
}; };
vreg_l1c_1p8: ldo1 { vreg_l1c_1p8: ldo1 {
regulator-name = "vreg_l1c_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l2c_1p8: ldo2 { vreg_l2c_1p8: ldo2 {
regulator-name = "vreg_l2c_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l3c_3p0: ldo3 { vreg_l3c_3p0: ldo3 {
regulator-name = "vreg_l3c_3p0";
regulator-min-microvolt = <3008000>; regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>; regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l4c_uim1: ldo4 { vreg_l4c_uim1: ldo4 {
regulator-name = "vreg_l4c_uim1";
regulator-min-microvolt = <1704000>; regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l5c_uim2: ldo5 { vreg_l5c_uim2: ldo5 {
regulator-name = "vreg_l5c_uim2";
regulator-min-microvolt = <1704000>; regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l6c_1p8: ldo6 { vreg_l6c_1p8: ldo6 {
regulator-name = "vreg_l6c_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>; regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l7c_3p0: ldo7 { vreg_l7c_3p0: ldo7 {
regulator-name = "vreg_l7c_3p0";
regulator-min-microvolt = <3008000>; regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>; regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l8c_1p8: ldo8 { vreg_l8c_1p8: ldo8 {
regulator-name = "vreg_l8c_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l9c_2p96: ldo9 { vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2960000>; regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <3008000>; regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l10c_1p2: ldo10 { vreg_l10c_1p2: ldo10 {
regulator-name = "vreg_l10c_1p2";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>; regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l11c_2p96: ldo11 { vreg_l11c_2p96: ldo11 {
regulator-name = "vreg_l11c_2p96";
regulator-min-microvolt = <2400000>; regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3008000>; regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l12c_1p8: ldo12 { vreg_l12c_1p8: ldo12 {
regulator-name = "vreg_l12c_1p8";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>; regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vreg_l13c_3p0: ldo13 { vreg_l13c_3p0: ldo13 {
regulator-name = "vreg_l13c_3p0";
regulator-min-microvolt = <3000000>; regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
...@@ -237,10 +276,25 @@ vreg_l13c_3p0: ldo13 { ...@@ -237,10 +276,25 @@ vreg_l13c_3p0: ldo13 {
}; };
}; };
&cdsp {
status = "okay";
firmware-name = "qcom/sm8350/cdsp.mbn";
};
&mpss {
status = "okay";
firmware-name = "qcom/sm8350/modem.mbn";
};
&qupv3_id_1 { &qupv3_id_1 {
status = "okay"; status = "okay";
}; };
&slpi {
status = "okay";
firmware-name = "qcom/sm8350/slpi.mbn";
};
&tlmm { &tlmm {
gpio-reserved-ranges = <52 8>; gpio-reserved-ranges = <52 8>;
}; };
...@@ -248,3 +302,65 @@ &tlmm { ...@@ -248,3 +302,65 @@ &tlmm {
&uart2 { &uart2 {
status = "okay"; status = "okay";
}; };
&ufs_mem_hc {
status = "okay";
reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l7b_2p96>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l9b_1p2>;
vccq-max-microamp = <900000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vreg_l5b_0p88>;
vdda-max-microamp = <91600>;
vdda-pll-supply = <&vreg_l6b_1p2>;
vdda-pll-max-microamp = <19000>;
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "peripheral";
};
&usb_1_hsphy {
status = "okay";
vdda-pll-supply = <&vreg_l5b_0p88>;
vdda18-supply = <&vreg_l1c_1p8>;
vdda33-supply = <&vreg_l2b_3p07>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p88>;
};
&usb_2 {
status = "okay";
};
&usb_2_hsphy {
status = "okay";
vdda-pll-supply = <&vreg_l5b_0p88>;
vdda18-supply = <&vreg_l1c_1p8>;
vdda33-supply = <&vreg_l2b_3p07>;
};
&usb_2_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l5b_0p88>;
};
arch/arm64/boot/dts/qcom/sm8350.dtsi
View file @ 61bac46e
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