Commit 625e5f38 authored by Asad Kamal's avatar Asad Kamal Committed by Alex Deucher

drm/amdgpu: Expose ras version & schema info

Expose ras table version & schema info to sysfs

v2: Updated schema to get poison support info
from ras context, removed asic specific checks
Signed-off-by: default avatarAsad Kamal <asad.kamal@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d4a02673
...@@ -1370,6 +1370,22 @@ static ssize_t amdgpu_ras_sysfs_features_read(struct device *dev, ...@@ -1370,6 +1370,22 @@ static ssize_t amdgpu_ras_sysfs_features_read(struct device *dev,
return sysfs_emit(buf, "feature mask: 0x%x\n", con->features); return sysfs_emit(buf, "feature mask: 0x%x\n", con->features);
} }
static ssize_t amdgpu_ras_sysfs_version_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct amdgpu_ras *con =
container_of(attr, struct amdgpu_ras, version_attr);
return sysfs_emit(buf, "table version: 0x%x\n", con->eeprom_control.tbl_hdr.version);
}
static ssize_t amdgpu_ras_sysfs_schema_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct amdgpu_ras *con =
container_of(attr, struct amdgpu_ras, schema_attr);
return sysfs_emit(buf, "schema: 0x%x\n", con->schema);
}
static void amdgpu_ras_sysfs_remove_bad_page_node(struct amdgpu_device *adev) static void amdgpu_ras_sysfs_remove_bad_page_node(struct amdgpu_device *adev)
{ {
struct amdgpu_ras *con = amdgpu_ras_get_context(adev); struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
...@@ -1379,11 +1395,13 @@ static void amdgpu_ras_sysfs_remove_bad_page_node(struct amdgpu_device *adev) ...@@ -1379,11 +1395,13 @@ static void amdgpu_ras_sysfs_remove_bad_page_node(struct amdgpu_device *adev)
RAS_FS_NAME); RAS_FS_NAME);
} }
static int amdgpu_ras_sysfs_remove_feature_node(struct amdgpu_device *adev) static int amdgpu_ras_sysfs_remove_dev_attr_node(struct amdgpu_device *adev)
{ {
struct amdgpu_ras *con = amdgpu_ras_get_context(adev); struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
struct attribute *attrs[] = { struct attribute *attrs[] = {
&con->features_attr.attr, &con->features_attr.attr,
&con->version_attr.attr,
&con->schema_attr.attr,
NULL NULL
}; };
struct attribute_group group = { struct attribute_group group = {
...@@ -1459,7 +1477,7 @@ static int amdgpu_ras_sysfs_remove_all(struct amdgpu_device *adev) ...@@ -1459,7 +1477,7 @@ static int amdgpu_ras_sysfs_remove_all(struct amdgpu_device *adev)
if (amdgpu_bad_page_threshold != 0) if (amdgpu_bad_page_threshold != 0)
amdgpu_ras_sysfs_remove_bad_page_node(adev); amdgpu_ras_sysfs_remove_bad_page_node(adev);
amdgpu_ras_sysfs_remove_feature_node(adev); amdgpu_ras_sysfs_remove_dev_attr_node(adev);
return 0; return 0;
} }
...@@ -1582,6 +1600,10 @@ static BIN_ATTR(gpu_vram_bad_pages, S_IRUGO, ...@@ -1582,6 +1600,10 @@ static BIN_ATTR(gpu_vram_bad_pages, S_IRUGO,
amdgpu_ras_sysfs_badpages_read, NULL, 0); amdgpu_ras_sysfs_badpages_read, NULL, 0);
static DEVICE_ATTR(features, S_IRUGO, static DEVICE_ATTR(features, S_IRUGO,
amdgpu_ras_sysfs_features_read, NULL); amdgpu_ras_sysfs_features_read, NULL);
static DEVICE_ATTR(version, 0444,
amdgpu_ras_sysfs_version_show, NULL);
static DEVICE_ATTR(schema, 0444,
amdgpu_ras_sysfs_schema_show, NULL);
static int amdgpu_ras_fs_init(struct amdgpu_device *adev) static int amdgpu_ras_fs_init(struct amdgpu_device *adev)
{ {
struct amdgpu_ras *con = amdgpu_ras_get_context(adev); struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
...@@ -1590,6 +1612,8 @@ static int amdgpu_ras_fs_init(struct amdgpu_device *adev) ...@@ -1590,6 +1612,8 @@ static int amdgpu_ras_fs_init(struct amdgpu_device *adev)
}; };
struct attribute *attrs[] = { struct attribute *attrs[] = {
&con->features_attr.attr, &con->features_attr.attr,
&con->version_attr.attr,
&con->schema_attr.attr,
NULL NULL
}; };
struct bin_attribute *bin_attrs[] = { struct bin_attribute *bin_attrs[] = {
...@@ -1598,11 +1622,20 @@ static int amdgpu_ras_fs_init(struct amdgpu_device *adev) ...@@ -1598,11 +1622,20 @@ static int amdgpu_ras_fs_init(struct amdgpu_device *adev)
}; };
int r; int r;
group.attrs = attrs;
/* add features entry */ /* add features entry */
con->features_attr = dev_attr_features; con->features_attr = dev_attr_features;
group.attrs = attrs;
sysfs_attr_init(attrs[0]); sysfs_attr_init(attrs[0]);
/* add version entry */
con->version_attr = dev_attr_version;
sysfs_attr_init(attrs[1]);
/* add schema entry */
con->schema_attr = dev_attr_schema;
sysfs_attr_init(attrs[2]);
if (amdgpu_bad_page_threshold != 0) { if (amdgpu_bad_page_threshold != 0) {
/* add bad_page_features entry */ /* add bad_page_features entry */
bin_attr_gpu_vram_bad_pages.private = NULL; bin_attr_gpu_vram_bad_pages.private = NULL;
...@@ -2594,6 +2627,14 @@ static void amdgpu_ras_query_poison_mode(struct amdgpu_device *adev) ...@@ -2594,6 +2627,14 @@ static void amdgpu_ras_query_poison_mode(struct amdgpu_device *adev)
} }
} }
static int amdgpu_get_ras_schema(struct amdgpu_device *adev)
{
return amdgpu_ras_is_poison_mode_supported(adev) ? AMDGPU_RAS_ERROR__POISON : 0 |
AMDGPU_RAS_ERROR__SINGLE_CORRECTABLE |
AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE |
AMDGPU_RAS_ERROR__PARITY;
}
int amdgpu_ras_init(struct amdgpu_device *adev) int amdgpu_ras_init(struct amdgpu_device *adev)
{ {
struct amdgpu_ras *con = amdgpu_ras_get_context(adev); struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
...@@ -2636,6 +2677,7 @@ int amdgpu_ras_init(struct amdgpu_device *adev) ...@@ -2636,6 +2677,7 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
con->update_channel_flag = false; con->update_channel_flag = false;
con->features = 0; con->features = 0;
con->schema = 0;
INIT_LIST_HEAD(&con->head); INIT_LIST_HEAD(&con->head);
/* Might need get this flag from vbios. */ /* Might need get this flag from vbios. */
con->flags = RAS_DEFAULT_FLAGS; con->flags = RAS_DEFAULT_FLAGS;
...@@ -2691,6 +2733,9 @@ int amdgpu_ras_init(struct amdgpu_device *adev) ...@@ -2691,6 +2733,9 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
amdgpu_ras_query_poison_mode(adev); amdgpu_ras_query_poison_mode(adev);
/* Get RAS schema for particular SOC */
con->schema = amdgpu_get_ras_schema(adev);
if (amdgpu_ras_fs_init(adev)) { if (amdgpu_ras_fs_init(adev)) {
r = -EINVAL; r = -EINVAL;
goto release_con; goto release_con;
......
...@@ -389,9 +389,12 @@ struct amdgpu_ras { ...@@ -389,9 +389,12 @@ struct amdgpu_ras {
/* ras infrastructure */ /* ras infrastructure */
/* for ras itself. */ /* for ras itself. */
uint32_t features; uint32_t features;
uint32_t schema;
struct list_head head; struct list_head head;
/* sysfs */ /* sysfs */
struct device_attribute features_attr; struct device_attribute features_attr;
struct device_attribute version_attr;
struct device_attribute schema_attr;
struct bin_attribute badpages_attr; struct bin_attribute badpages_attr;
struct dentry *de_ras_eeprom_table; struct dentry *de_ras_eeprom_table;
/* block array */ /* block array */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment