Commit 6488867c authored by Florian Tobias Schandinat's avatar Florian Tobias Schandinat

Merge branch 'viafb-next' of git://github.com/schandinat/linux-2.6 into fbdev-next

parents 4d740801 4ce36bbb
......@@ -172,30 +172,20 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len)
}
/* DVI Set Mode */
void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp,
int set_iga)
void viafb_dvi_set_mode(const struct fb_var_screeninfo *var, int iga)
{
struct VideoModeTable *rb_mode;
struct crt_mode_table *pDviTiming;
unsigned long desirePixelClock, maxPixelClock;
pDviTiming = mode->crtc;
desirePixelClock = pDviTiming->refresh_rate
* pDviTiming->crtc.hor_total * pDviTiming->crtc.ver_total
/ 1000000;
maxPixelClock = (unsigned long)viaparinfo->
tmds_setting_info->max_pixel_clock;
DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n");
if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) {
rb_mode = viafb_get_rb_mode(mode->crtc[0].crtc.hor_addr,
mode->crtc[0].crtc.ver_addr);
if (rb_mode) {
mode = rb_mode;
pDviTiming = rb_mode->crtc;
struct fb_var_screeninfo dvi_var = *var;
struct crt_mode_table *rb_mode;
int maxPixelClock;
maxPixelClock = viaparinfo->shared->tmds_setting_info.max_pixel_clock;
if (maxPixelClock && PICOS2KHZ(var->pixclock) / 1000 > maxPixelClock) {
rb_mode = viafb_get_best_rb_mode(var->xres, var->yres, 60);
if (rb_mode)
viafb_fill_var_timing_info(&dvi_var, rb_mode);
}
}
viafb_fill_crtc_timing(pDviTiming, mode, mode_bpp / 8, set_iga);
viafb_fill_crtc_timing(&dvi_var, iga);
}
/* Sense DVI Connector */
......
......@@ -59,7 +59,6 @@ void viafb_dvi_enable(void);
bool __devinit viafb_tmds_trasmitter_identify(void);
void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting);
void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,
int set_iga);
void viafb_dvi_set_mode(const struct fb_var_screeninfo *var, int iga);
#endif /* __DVI_H__ */
......@@ -35,6 +35,8 @@ int viafb_LCD_ON ;
int viafb_LCD2_ON;
int viafb_SAMM_ON;
int viafb_dual_fb;
unsigned int viafb_second_xres = 640;
unsigned int viafb_second_yres = 480;
int viafb_hotplug_Xres = 640;
int viafb_hotplug_Yres = 480;
int viafb_hotplug_bpp = 32;
......
......@@ -67,6 +67,8 @@ extern int viafb_lcd_dsp_method;
extern int viafb_lcd_mode;
extern int viafb_CRT_ON;
extern unsigned int viafb_second_xres;
extern unsigned int viafb_second_yres;
extern int viafb_hotplug_Xres;
extern int viafb_hotplug_Yres;
extern int viafb_hotplug_bpp;
......
This diff is collapsed.
This diff is collapsed.
......@@ -548,8 +548,7 @@ static void lcd_patch_skew(struct lvds_setting_information
}
/* LCD Set Mode */
void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
struct lvds_setting_information *plvds_setting_info,
void viafb_lcd_set_mode(struct lvds_setting_information *plvds_setting_info,
struct lvds_chip_information *plvds_chip_info)
{
int set_iga = plvds_setting_info->iga_path;
......@@ -559,16 +558,15 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
int panel_hres = plvds_setting_info->lcd_panel_hres;
int panel_vres = plvds_setting_info->lcd_panel_vres;
u32 clock;
struct display_timing mode_crt_reg, panel_crt_reg;
struct crt_mode_table *panel_crt_table = NULL;
struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
panel_vres);
struct display_timing mode_crt_reg, panel_crt_reg, timing;
struct crt_mode_table *mode_crt_table, *panel_crt_table;
DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
/* Get mode table */
mode_crt_table = viafb_get_best_mode(set_hres, set_vres, 60);
mode_crt_reg = mode_crt_table->crtc;
/* Get panel table Pointer */
panel_crt_table = vmode_tbl->crtc;
panel_crt_table = viafb_get_best_mode(panel_hres, panel_vres, 60);
panel_crt_reg = panel_crt_table->crtc;
DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
......@@ -576,31 +574,28 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total
* panel_crt_table->refresh_rate;
plvds_setting_info->vclk = clock;
if (set_iga == IGA1) {
/* IGA1 doesn't have LCD scaling, so set it as centering. */
viafb_load_crtc_timing(lcd_centering_timging
(mode_crt_reg, panel_crt_reg), IGA1);
if (set_iga == IGA2 && (set_hres < panel_hres || set_vres < panel_vres)
&& plvds_setting_info->display_method == LCD_EXPANDSION) {
timing = panel_crt_reg;
load_lcd_scaling(set_hres, set_vres, panel_hres, panel_vres);
} else {
/* Expansion */
if (plvds_setting_info->display_method == LCD_EXPANDSION
&& (set_hres < panel_hres || set_vres < panel_vres)) {
/* expansion timing IGA2 loaded panel set timing*/
viafb_load_crtc_timing(panel_crt_reg, IGA2);
DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n");
load_lcd_scaling(set_hres, set_vres, panel_hres,
panel_vres);
DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n");
} else { /* Centering */
/* centering timing IGA2 always loaded panel
and mode releative timing */
viafb_load_crtc_timing(lcd_centering_timging
(mode_crt_reg, panel_crt_reg), IGA2);
viafb_write_reg_mask(CR79, VIACR, 0x00,
timing = lcd_centering_timging(mode_crt_reg, panel_crt_reg);
if (set_iga == IGA2)
/* disable scaling */
via_write_reg_mask(VIACR, 0x79, 0x00,
BIT0 + BIT1 + BIT2);
/* LCD scaling disabled */
}
}
timing.hor_blank_end += timing.hor_blank_start;
timing.hor_sync_end += timing.hor_sync_start;
timing.ver_blank_end += timing.ver_blank_start;
timing.ver_sync_end += timing.ver_sync_start;
if (set_iga == IGA1)
via_set_primary_timing(&timing);
else if (set_iga == IGA2)
via_set_secondary_timing(&timing);
/* Fetch count for IGA2 only */
viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
......
......@@ -76,8 +76,7 @@ void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
*plvds_chip_info,
struct lvds_setting_information
*plvds_setting_info);
void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
struct lvds_setting_information *plvds_setting_info,
void viafb_lcd_set_mode(struct lvds_setting_information *plvds_setting_info,
struct lvds_chip_information *plvds_chip_info);
bool __devinit viafb_lvds_trasmitter_identify(void);
void viafb_init_lvds_output_interface(struct lvds_chip_information
......@@ -85,7 +84,5 @@ void viafb_init_lvds_output_interface(struct lvds_chip_information
struct lvds_setting_information
*plvds_setting_info);
bool viafb_lcd_get_mobile_state(bool *mobile);
void viafb_load_crtc_timing(struct display_timing device_timing,
int set_iga);
#endif /* __LCD_H__ */
......@@ -22,6 +22,8 @@
#ifndef __SHARE_H__
#define __SHARE_H__
#include "via_modesetting.h"
/* Define Bit Field */
#define BIT0 0x01
#define BIT1 0x02
......@@ -634,10 +636,6 @@
#define V_SYNC_SATRT_SHADOW_INDEX 18
#define V_SYNC_END_SHADOW_INDEX 19
/* Definition Video Mode Pixel Clock (picoseconds)
*/
#define RES_640X480_60HZ_PIXCLOCK 39722
/* LCD display method
*/
#define LCD_EXPANDSION 0x00
......@@ -648,23 +646,6 @@
#define LCD_OPENLDI 0x00
#define LCD_SPWG 0x01
/* Define display timing
*/
struct display_timing {
u16 hor_total;
u16 hor_addr;
u16 hor_blank_start;
u16 hor_blank_end;
u16 hor_sync_start;
u16 hor_sync_end;
u16 ver_total;
u16 ver_addr;
u16 ver_blank_start;
u16 ver_blank_end;
u16 ver_sync_start;
u16 ver_sync_end;
};
struct crt_mode_table {
int refresh_rate;
int h_sync_polarity;
......
......@@ -35,7 +35,7 @@ static struct via_port_cfg adap_configs[] = {
* The OLPC XO-1.5 puts the camera power and reset lines onto
* GPIO 2C.
*/
static const struct via_port_cfg olpc_adap_configs[] = {
static struct via_port_cfg olpc_adap_configs[] = {
[VIA_PORT_26] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x26 },
[VIA_PORT_31] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x31 },
[VIA_PORT_25] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x25 },
......
......@@ -29,6 +29,110 @@
#include "share.h"
#include "debug.h"
void via_set_primary_timing(const struct display_timing *timing)
{
struct display_timing raw;
raw.hor_total = timing->hor_total / 8 - 5;
raw.hor_addr = timing->hor_addr / 8 - 1;
raw.hor_blank_start = timing->hor_blank_start / 8 - 1;
raw.hor_blank_end = timing->hor_blank_end / 8 - 1;
raw.hor_sync_start = timing->hor_sync_start / 8;
raw.hor_sync_end = timing->hor_sync_end / 8;
raw.ver_total = timing->ver_total - 2;
raw.ver_addr = timing->ver_addr - 1;
raw.ver_blank_start = timing->ver_blank_start - 1;
raw.ver_blank_end = timing->ver_blank_end - 1;
raw.ver_sync_start = timing->ver_sync_start - 1;
raw.ver_sync_end = timing->ver_sync_end - 1;
/* unlock timing registers */
via_write_reg_mask(VIACR, 0x11, 0x00, 0x80);
via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF);
via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF);
via_write_reg(VIACR, 0x02, raw.hor_blank_start & 0xFF);
via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F);
via_write_reg(VIACR, 0x04, raw.hor_sync_start & 0xFF);
via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F)
| (raw.hor_blank_end << (7 - 5) & 0x80), 0x9F);
via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF);
via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01)
| (raw.ver_addr >> (8 - 1) & 0x02)
| (raw.ver_sync_start >> (8 - 2) & 0x04)
| (raw.ver_blank_start >> (8 - 3) & 0x08)
| (raw.ver_total >> (9 - 5) & 0x20)
| (raw.ver_addr >> (9 - 6) & 0x40)
| (raw.ver_sync_start >> (9 - 7) & 0x80), 0xEF);
via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20,
0x20);
via_write_reg(VIACR, 0x10, raw.ver_sync_start & 0xFF);
via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F);
via_write_reg(VIACR, 0x12, raw.ver_addr & 0xFF);
via_write_reg(VIACR, 0x15, raw.ver_blank_start & 0xFF);
via_write_reg(VIACR, 0x16, raw.ver_blank_end & 0xFF);
via_write_reg_mask(VIACR, 0x33, (raw.hor_sync_start >> (8 - 4) & 0x10)
| (raw.hor_blank_end >> (6 - 5) & 0x20), 0x30);
via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01)
| (raw.ver_sync_start >> (10 - 1) & 0x02)
| (raw.ver_addr >> (10 - 2) & 0x04)
| (raw.ver_blank_start >> (10 - 3) & 0x08), 0x0F);
via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08);
/* lock timing registers */
via_write_reg_mask(VIACR, 0x11, 0x80, 0x80);
/* reset timing control */
via_write_reg_mask(VIACR, 0x17, 0x00, 0x80);
via_write_reg_mask(VIACR, 0x17, 0x80, 0x80);
}
void via_set_secondary_timing(const struct display_timing *timing)
{
struct display_timing raw;
raw.hor_total = timing->hor_total - 1;
raw.hor_addr = timing->hor_addr - 1;
raw.hor_blank_start = timing->hor_blank_start - 1;
raw.hor_blank_end = timing->hor_blank_end - 1;
raw.hor_sync_start = timing->hor_sync_start - 1;
raw.hor_sync_end = timing->hor_sync_end - 1;
raw.ver_total = timing->ver_total - 1;
raw.ver_addr = timing->ver_addr - 1;
raw.ver_blank_start = timing->ver_blank_start - 1;
raw.ver_blank_end = timing->ver_blank_end - 1;
raw.ver_sync_start = timing->ver_sync_start - 1;
raw.ver_sync_end = timing->ver_sync_end - 1;
via_write_reg(VIACR, 0x50, raw.hor_total & 0xFF);
via_write_reg(VIACR, 0x51, raw.hor_addr & 0xFF);
via_write_reg(VIACR, 0x52, raw.hor_blank_start & 0xFF);
via_write_reg(VIACR, 0x53, raw.hor_blank_end & 0xFF);
via_write_reg(VIACR, 0x54, (raw.hor_blank_start >> 8 & 0x07)
| (raw.hor_blank_end >> (8 - 3) & 0x38)
| (raw.hor_sync_start >> (8 - 6) & 0xC0));
via_write_reg_mask(VIACR, 0x55, (raw.hor_total >> 8 & 0x0F)
| (raw.hor_addr >> (8 - 4) & 0x70), 0x7F);
via_write_reg(VIACR, 0x56, raw.hor_sync_start & 0xFF);
via_write_reg(VIACR, 0x57, raw.hor_sync_end & 0xFF);
via_write_reg(VIACR, 0x58, raw.ver_total & 0xFF);
via_write_reg(VIACR, 0x59, raw.ver_addr & 0xFF);
via_write_reg(VIACR, 0x5A, raw.ver_blank_start & 0xFF);
via_write_reg(VIACR, 0x5B, raw.ver_blank_end & 0xFF);
via_write_reg(VIACR, 0x5C, (raw.ver_blank_start >> 8 & 0x07)
| (raw.ver_blank_end >> (8 - 3) & 0x38)
| (raw.hor_sync_end >> (8 - 6) & 0x40)
| (raw.hor_sync_start >> (10 - 7) & 0x80));
via_write_reg(VIACR, 0x5D, (raw.ver_total >> 8 & 0x07)
| (raw.ver_addr >> (8 - 3) & 0x38)
| (raw.hor_blank_end >> (11 - 6) & 0x40)
| (raw.hor_sync_start >> (11 - 7) & 0x80));
via_write_reg(VIACR, 0x5E, raw.ver_sync_start & 0xFF);
via_write_reg(VIACR, 0x5F, (raw.ver_sync_end & 0x1F)
| (raw.ver_sync_start >> (8 - 5) & 0xE0));
}
void via_set_primary_address(u32 addr)
{
DEBUG_MSG(KERN_DEBUG "via_set_primary_address(0x%08X)\n", addr);
......
......@@ -33,6 +33,24 @@
#define VIA_PITCH_MAX 0x3FF8
struct display_timing {
u16 hor_total;
u16 hor_addr;
u16 hor_blank_start;
u16 hor_blank_end;
u16 hor_sync_start;
u16 hor_sync_end;
u16 ver_total;
u16 ver_addr;
u16 ver_blank_start;
u16 ver_blank_end;
u16 ver_sync_start;
u16 ver_sync_end;
};
void via_set_primary_timing(const struct display_timing *timing);
void via_set_secondary_timing(const struct display_timing *timing);
void via_set_primary_address(u32 addr);
void via_set_secondary_address(u32 addr);
void via_set_primary_pitch(u32 pitch);
......
This diff is collapsed.
......@@ -281,7 +281,7 @@ static struct crt_mode_table CRTM640x480[] = {
/*r_rate,hsp,vsp */
/*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
{REFRESH_60, M640X480_R60_HSP, M640X480_R60_VSP,
{800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} },
{800, 640, 640, 160, 656, 96, 525, 480, 480, 45, 490, 2} },
{REFRESH_75, M640X480_R75_HSP, M640X480_R75_VSP,
{840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} },
{REFRESH_85, M640X480_R85_HSP, M640X480_R85_VSP,
......@@ -863,26 +863,56 @@ int NUM_TOTAL_CLE266_ModeXregs = ARRAY_SIZE(CLE266_ModeXregs);
int NUM_TOTAL_PATCH_MODE = ARRAY_SIZE(res_patch_table);
struct VideoModeTable *viafb_get_mode(int hres, int vres)
static struct VideoModeTable *get_modes(struct VideoModeTable *vmt, int n,
int hres, int vres)
{
u32 i;
for (i = 0; i < ARRAY_SIZE(viafb_modes); i++)
if (viafb_modes[i].mode_array &&
viafb_modes[i].crtc[0].crtc.hor_addr == hres &&
viafb_modes[i].crtc[0].crtc.ver_addr == vres)
int i;
for (i = 0; i < n; i++)
if (vmt[i].mode_array &&
vmt[i].crtc[0].crtc.hor_addr == hres &&
vmt[i].crtc[0].crtc.ver_addr == vres)
return &viafb_modes[i];
return NULL;
}
struct VideoModeTable *viafb_get_rb_mode(int hres, int vres)
static struct crt_mode_table *get_best_mode(struct VideoModeTable *vmt,
int refresh)
{
u32 i;
for (i = 0; i < ARRAY_SIZE(viafb_rb_modes); i++)
if (viafb_rb_modes[i].mode_array &&
viafb_rb_modes[i].crtc[0].crtc.hor_addr == hres &&
viafb_rb_modes[i].crtc[0].crtc.ver_addr == vres)
return &viafb_rb_modes[i];
struct crt_mode_table *best;
int i;
if (!vmt)
return NULL;
best = &vmt->crtc[0];
for (i = 1; i < vmt->mode_array; i++) {
if (abs(vmt->crtc[i].refresh_rate - refresh)
< abs(best->refresh_rate - refresh))
best = &vmt->crtc[i];
}
return best;
}
static struct VideoModeTable *viafb_get_mode(int hres, int vres)
{
return get_modes(viafb_modes, ARRAY_SIZE(viafb_modes), hres, vres);
}
struct crt_mode_table *viafb_get_best_mode(int hres, int vres, int refresh)
{
return get_best_mode(viafb_get_mode(hres, vres), refresh);
}
static struct VideoModeTable *viafb_get_rb_mode(int hres, int vres)
{
return get_modes(viafb_rb_modes, ARRAY_SIZE(viafb_rb_modes), hres,
vres);
}
struct crt_mode_table *viafb_get_best_rb_mode(int hres, int vres, int refresh)
{
return get_best_mode(viafb_get_rb_mode(hres, vres), refresh);
}
......@@ -60,7 +60,7 @@ extern struct io_reg PM1024x768[];
extern struct patch_table res_patch_table[];
extern struct VPITTable VPIT;
struct VideoModeTable *viafb_get_mode(int hres, int vres);
struct VideoModeTable *viafb_get_rb_mode(int hres, int vres);
struct crt_mode_table *viafb_get_best_mode(int hres, int vres, int refresh);
struct crt_mode_table *viafb_get_best_rb_mode(int hres, int vres, int refresh);
#endif /* __VIAMODE_H__ */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment