Commit 650ab0c0 authored by Alex Deucher's avatar Alex Deucher Committed by Greg Kroah-Hartman

drm/radeon/dce32+: use fractional fb dividers for high clocks

commit a02dc74b upstream.

Fixes flickering with some high res montiors.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
[bwh: Backported to 3.2: use pll->flags instead of radeon_crtc->pll_flags]
Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
Cc: Weng Meiling <wengmeiling.weng@huawei.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5f68cf4c
...@@ -573,6 +573,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, ...@@ -573,6 +573,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
/* use frac fb div on APUs */ /* use frac fb div on APUs */
if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev))
pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
} else { } else {
pll->flags |= RADEON_PLL_LEGACY; pll->flags |= RADEON_PLL_LEGACY;
......
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