Commit 657e1de8 authored by Russell King's avatar Russell King Committed by Russell King

Merge branch 'for-rmk-realview' of git://linux-arm.org/linux-2.6 into devel

parents 93982535 6f13d278
...@@ -804,7 +804,7 @@ config HOTPLUG_CPU ...@@ -804,7 +804,7 @@ config HOTPLUG_CPU
config LOCAL_TIMERS config LOCAL_TIMERS
bool "Use local timer interrupts" bool "Use local timer interrupts"
depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
default y default y
help help
Enable support for local timers on SMP platforms, rather then the Enable support for local timers on SMP platforms, rather then the
......
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...@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void); ...@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
/* /*
* Stop a local timer interrupt. * Stop a local timer interrupt.
*/ */
extern void local_timer_stop(unsigned int cpu); extern void local_timer_stop(void);
/* /*
* Platform provides this to acknowledge a local timer IRQ * Platform provides this to acknowledge a local timer IRQ
...@@ -123,7 +123,7 @@ extern int local_timer_ack(void); ...@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
#else #else
static inline void local_timer_stop(unsigned int cpu) static inline void local_timer_stop(void)
{ {
} }
...@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu) ...@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
/* /*
* Setup a local timer interrupt for a CPU. * Setup a local timer interrupt for a CPU.
*/ */
extern void local_timer_setup(unsigned int cpu); extern void local_timer_setup(void);
/* /*
* show local interrupt info * show local interrupt info
......
...@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void) ...@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void)
/* /*
* Stop the local timer for this CPU. * Stop the local timer for this CPU.
*/ */
local_timer_stop(cpu); local_timer_stop();
/* /*
* Flush user cache and TLB mappings, and then remove this CPU * Flush user cache and TLB mappings, and then remove this CPU
...@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) ...@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
/* /*
* Setup local timer for this CPU. * Setup local timer for this CPU.
*/ */
local_timer_setup(cpu); local_timer_setup();
calibrate_delay(); calibrate_delay();
......
...@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB ...@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB
help help
Include support for the ARM(R) RealView Emulation Baseboard platform. Include support for the ARM(R) RealView Emulation Baseboard platform.
config REALVIEW_EB_A9MP
bool "Support Multicore Cortex-A9"
depends on MACH_REALVIEW_EB
select CPU_V7
help
Enable support for the Cortex-A9MPCore tile on the Realview platform.
config REALVIEW_EB_ARM11MP config REALVIEW_EB_ARM11MP
bool "Support ARM11MPCore tile" bool "Support ARM11MPCore tile"
depends on MACH_REALVIEW_EB depends on MACH_REALVIEW_EB
...@@ -26,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB ...@@ -26,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
config MACH_REALVIEW_PB11MP config MACH_REALVIEW_PB11MP
bool "Support RealView/PB11MPCore platform" bool "Support RealView/PB11MPCore platform"
select CPU_V6
select ARM_GIC select ARM_GIC
help help
Include support for the ARM(R) RealView MPCore Platform Baseboard. Include support for the ARM(R) RealView MPCore Platform Baseboard.
...@@ -39,4 +47,24 @@ config MACH_REALVIEW_PB1176 ...@@ -39,4 +47,24 @@ config MACH_REALVIEW_PB1176
help help
Include support for the ARM(R) RealView ARM1176 Platform Baseboard. Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
config MACH_REALVIEW_PBA8
bool "Support RealView/PB-A8 platform"
select CPU_V7
select ARM_GIC
help
Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
PB-A8 is a platform with an on-board Cortex-A8 and has support for
PCI-E and Compact Flash.
config REALVIEW_HIGH_PHYS_OFFSET
bool "High physical base address for the RealView platform"
depends on !MACH_REALVIEW_PB1176
default y
help
RealView boards other than PB1176 have the RAM available at
0x70000000, 256MB of which being mirrored at 0x00000000. If
the board supports 512MB of RAM, this option allows the
memory to be accessed contiguously at the high physical
offset.
endmenu endmenu
...@@ -6,5 +6,6 @@ obj-y := core.o clock.o ...@@ -6,5 +6,6 @@ obj-y := core.o clock.o
obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
zreladdr-y := 0x70008000
params_phys-y := 0x70000100
initrd_phys-y := 0x70800000
else
zreladdr-y := 0x00008000 zreladdr-y := 0x00008000
params_phys-y := 0x00000100 params_phys-y := 0x00000100
initrd_phys-y := 0x00800000 initrd_phys-y := 0x00800000
endif
...@@ -28,12 +28,14 @@ ...@@ -28,12 +28,14 @@
#include <linux/clocksource.h> #include <linux/clocksource.h>
#include <linux/clockchips.h> #include <linux/clockchips.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/smc911x.h>
#include <asm/clkdev.h> #include <asm/clkdev.h>
#include <asm/system.h> #include <asm/system.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/leds.h> #include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/hardware/arm_timer.h> #include <asm/hardware/arm_timer.h>
#include <asm/hardware/icst307.h> #include <asm/hardware/icst307.h>
...@@ -50,7 +52,7 @@ ...@@ -50,7 +52,7 @@
#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET) #define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
/* used by entry-macro.S */ /* used by entry-macro.S and platsmp.c */
void __iomem *gic_cpu_base_addr; void __iomem *gic_cpu_base_addr;
/* /*
...@@ -125,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num) ...@@ -125,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
return platform_device_register(&realview_flash_device); return platform_device_register(&realview_flash_device);
} }
static struct smc911x_platdata realview_smc911x_platdata = {
.flags = SMC911X_USE_32BIT,
.irq_flags = IRQF_SHARED,
.irq_polarity = 1,
};
static struct platform_device realview_eth_device = {
.name = "smc911x",
.id = 0,
.num_resources = 2,
};
int realview_eth_register(const char *name, struct resource *res)
{
if (name)
realview_eth_device.name = name;
realview_eth_device.resource = res;
if (strcmp(realview_eth_device.name, "smc911x") == 0)
realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
return platform_device_register(&realview_eth_device);
}
static struct resource realview_i2c_resource = { static struct resource realview_i2c_resource = {
.start = REALVIEW_I2C_BASE, .start = REALVIEW_I2C_BASE,
.end = REALVIEW_I2C_BASE + SZ_4K - 1, .end = REALVIEW_I2C_BASE + SZ_4K - 1,
...@@ -178,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = { ...@@ -178,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco) static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
{ {
void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET; void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; void __iomem *sys_osc;
u32 val; u32 val;
if (machine_is_realview_pb1176())
sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
else
sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
val = readl(sys_osc) & ~0x7ffff; val = readl(sys_osc) & ~0x7ffff;
val |= vco.v | (vco.r << 9) | (vco.s << 16); val |= vco.v | (vco.r << 9) | (vco.s << 16);
...@@ -274,7 +304,30 @@ static struct clcd_panel vga = { ...@@ -274,7 +304,30 @@ static struct clcd_panel vga = {
.width = -1, .width = -1,
.height = -1, .height = -1,
.tim2 = TIM2_BCD | TIM2_IPC, .tim2 = TIM2_BCD | TIM2_IPC,
.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
.bpp = 16,
};
static struct clcd_panel xvga = {
.mode = {
.name = "XVGA",
.refresh = 60,
.xres = 1024,
.yres = 768,
.pixclock = 15748,
.left_margin = 152,
.right_margin = 48,
.upper_margin = 23,
.lower_margin = 3,
.hsync_len = 104,
.vsync_len = 4,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
.width = -1,
.height = -1,
.tim2 = TIM2_BCD | TIM2_IPC,
.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
.bpp = 16, .bpp = 16,
}; };
...@@ -297,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = { ...@@ -297,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
.width = -1, .width = -1,
.height = -1, .height = -1,
.tim2 = TIM2_BCD, .tim2 = TIM2_BCD,
.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
.bpp = 16, .bpp = 16,
}; };
...@@ -320,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = { ...@@ -320,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
.width = -1, .width = -1,
.height = -1, .height = -1,
.tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
.bpp = 16, .bpp = 16,
}; };
...@@ -343,7 +396,7 @@ static struct clcd_panel epson_2_2_in = { ...@@ -343,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
.width = -1, .width = -1,
.height = -1, .height = -1,
.tim2 = TIM2_BCD | TIM2_IPC, .tim2 = TIM2_BCD | TIM2_IPC,
.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
.bpp = 16, .bpp = 16,
}; };
...@@ -356,9 +409,15 @@ static struct clcd_panel epson_2_2_in = { ...@@ -356,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
static struct clcd_panel *realview_clcd_panel(void) static struct clcd_panel *realview_clcd_panel(void)
{ {
void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
struct clcd_panel *panel = &vga; struct clcd_panel *vga_panel;
struct clcd_panel *panel;
u32 val; u32 val;
if (machine_is_realview_eb())
vga_panel = &vga;
else
vga_panel = &xvga;
val = readl(sys_clcd) & SYS_CLCD_ID_MASK; val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
if (val == SYS_CLCD_ID_SANYO_3_8) if (val == SYS_CLCD_ID_SANYO_3_8)
panel = &sanyo_3_8_in; panel = &sanyo_3_8_in;
...@@ -367,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void) ...@@ -367,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
else if (val == SYS_CLCD_ID_EPSON_2_2) else if (val == SYS_CLCD_ID_EPSON_2_2)
panel = &epson_2_2_in; panel = &epson_2_2_in;
else if (val == SYS_CLCD_ID_VGA) else if (val == SYS_CLCD_ID_VGA)
panel = &vga; panel = vga_panel;
else { else {
printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
val); val);
panel = &vga; panel = vga_panel;
} }
return panel; return panel;
...@@ -406,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb) ...@@ -406,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
writel(val, sys_clcd); writel(val, sys_clcd);
} }
static unsigned long framesize = SZ_1M;
static int realview_clcd_setup(struct clcd_fb *fb) static int realview_clcd_setup(struct clcd_fb *fb)
{ {
unsigned long framesize;
dma_addr_t dma; dma_addr_t dma;
if (machine_is_realview_eb())
/* VGA, 16bpp */
framesize = 640 * 480 * 2;
else
/* XVGA, 16bpp */
framesize = 1024 * 768 * 2;
fb->panel = realview_clcd_panel(); fb->panel = realview_clcd_panel();
fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
...@@ -636,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq) ...@@ -636,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
* The dummy clock device has to be registered before the main device * The dummy clock device has to be registered before the main device
* so that the latter will broadcast the clock events * so that the latter will broadcast the clock events
*/ */
local_timer_setup(smp_processor_id()); local_timer_setup();
#endif #endif
/* /*
......
...@@ -51,8 +51,7 @@ extern struct mmc_platform_data realview_mmc1_plat_data; ...@@ -51,8 +51,7 @@ extern struct mmc_platform_data realview_mmc1_plat_data;
extern struct clcd_board clcd_plat_data; extern struct clcd_board clcd_plat_data;
extern void __iomem *gic_cpu_base_addr; extern void __iomem *gic_cpu_base_addr;
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
extern void __iomem *twd_base_addr; extern void __iomem *twd_base;
extern unsigned int twd_size;
#endif #endif
extern void __iomem *timer0_va_base; extern void __iomem *timer0_va_base;
extern void __iomem *timer1_va_base; extern void __iomem *timer1_va_base;
...@@ -62,5 +61,6 @@ extern void __iomem *timer3_va_base; ...@@ -62,5 +61,6 @@ extern void __iomem *timer3_va_base;
extern void realview_leds_event(led_event_t ledevt); extern void realview_leds_event(led_event_t ledevt);
extern void realview_timer_init(unsigned int timer_irq); extern void realview_timer_init(unsigned int timer_irq);
extern int realview_flash_register(struct resource *res, u32 num); extern int realview_flash_register(struct resource *res, u32 num);
extern int realview_eth_register(const char *name, struct resource *res);
#endif #endif
...@@ -13,6 +13,8 @@ ...@@ -13,6 +13,8 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/completion.h> #include <linux/completion.h>
#include <asm/cacheflush.h>
extern volatile int pen_release; extern volatile int pen_release;
static DECLARE_COMPLETION(cpu_killed); static DECLARE_COMPLETION(cpu_killed);
...@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void) ...@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
{ {
unsigned int v; unsigned int v;
asm volatile( "mcr p15, 0, %1, c7, c14, 0\n" flush_cache_all();
asm volatile(
" mcr p15, 0, %1, c7, c5, 0\n" " mcr p15, 0, %1, c7, c5, 0\n"
" mcr p15, 0, %1, c7, c10, 4\n" " mcr p15, 0, %1, c7, c10, 4\n"
/* /*
......
...@@ -49,16 +49,14 @@ ...@@ -49,16 +49,14 @@
#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE 0x10100700 #define REALVIEW_EB11MP_TWD_BASE 0x10100600
#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
#else #else
#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 #define REALVIEW_EB11MP_TWD_BASE 0x1F000600
#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
...@@ -163,7 +161,7 @@ ...@@ -163,7 +161,7 @@
#define NR_IRQS NR_IRQS_EB #define NR_IRQS NR_IRQS_EB
#endif #endif
#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ #if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
#undef MAX_GIC_NR #undef MAX_GIC_NR
#define MAX_GIC_NR NR_GIC_EB11MP #define MAX_GIC_NR NR_GIC_EB11MP
...@@ -177,6 +175,7 @@ ...@@ -177,6 +175,7 @@
#define REALVIEW_EB_PROC_ARM9 0x02000000 #define REALVIEW_EB_PROC_ARM9 0x02000000
#define REALVIEW_EB_PROC_ARM11 0x04000000 #define REALVIEW_EB_PROC_ARM11 0x04000000
#define REALVIEW_EB_PROC_ARM11MP 0x06000000 #define REALVIEW_EB_PROC_ARM11MP 0x06000000
#define REALVIEW_EB_PROC_A9MP 0x0C000000
#define check_eb_proc(proc_type) \ #define check_eb_proc(proc_type) \
((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
...@@ -188,4 +187,13 @@ ...@@ -188,4 +187,13 @@
#define core_tile_eb11mp() 0 #define core_tile_eb11mp() 0
#endif #endif
#ifdef CONFIG_REALVIEW_EB_A9MP
#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
#else
#define core_tile_a9mp() 0
#endif
#define machine_is_realview_eb_mp() \
(machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
#endif /* __ASM_ARCH_BOARD_EB_H */ #endif /* __ASM_ARCH_BOARD_EB_H */
...@@ -77,8 +77,7 @@ ...@@ -77,8 +77,7 @@
*/ */
#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ #define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ #define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 #define REALVIEW_TC11MP_TWD_BASE 0x1F000600
#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
......
/*
* include/asm-arm/arch-realview/board-pba8.h
*
* Copyright (C) 2008 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#ifndef __ASM_ARCH_BOARD_PBA8_H
#define __ASM_ARCH_BOARD_PBA8_H
#include <mach/platform.h>
/*
* Peripheral addresses
*/
#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
/*
* PBA8 PCI regions
*/
#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
/*
* Irqs
*/
#define IRQ_PBA8_GIC_START 32
/* L220
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
*/
/*
* PB-A8 on-board gic irq sources
*/
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
/* 9 reserved */
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
/* ... */
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
#define IRQ_PBA8_SMC -1
#define IRQ_PBA8_SCTL -1
#define NR_GIC_PBA8 1
/*
* Only define NR_IRQS if less than NR_IRQS_PBA8
*/
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
#if defined(CONFIG_MACH_REALVIEW_PBA8)
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
#undef NR_IRQS
#define NR_IRQS NR_IRQS_PBA8
#endif
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
#undef MAX_GIC_NR
#define MAX_GIC_NR NR_GIC_PBA8
#endif
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
#endif /* __ASM_ARCH_BOARD_PBA8_H */
...@@ -8,15 +8,36 @@ ...@@ -8,15 +8,36 @@
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
* */
*/
#if defined(CONFIG_MACH_REALVIEW_EB) || \
defined(CONFIG_MACH_REALVIEW_PB11MP) || \
defined(CONFIG_MACH_REALVIEW_PBA8)
#ifndef DEBUG_LL_UART_OFFSET
#define DEBUG_LL_UART_OFFSET 0x00009000
#elif DEBUG_LL_UART_OFFSET != 0x00009000
#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
#endif
#endif
#ifdef CONFIG_MACH_REALVIEW_PB1176
#ifndef DEBUG_LL_UART_OFFSET
#define DEBUG_LL_UART_OFFSET 0x0010c000
#elif DEBUG_LL_UART_OFFSET != 0x0010c000
#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
#endif
#endif
#ifndef DEBUG_LL_UART_OFFSET
#error "Unknown RealView platform"
#endif
.macro addruart,rx .macro addruart,rx
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled? tst \rx, #1 @ MMU enabled?
moveq \rx, #0x10000000 moveq \rx, #0x10000000
movne \rx, #0xf0000000 @ virtual base movne \rx, #0xfb000000 @ virtual base
orr \rx, \rx, #0x00009000 orr \rx, \rx, #DEBUG_LL_UART_OFFSET
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>
...@@ -25,7 +25,14 @@ ...@@ -25,7 +25,14 @@
#include <asm/sizes.h> #include <asm/sizes.h>
/* macro to get at IO space when running virtually */ /* macro to get at IO space when running virtually */
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000) /*
* Statically mapped addresses:
*
* 10xx xxxx -> fbxx xxxx
* 1exx xxxx -> fdxx xxxx
* 1fxx xxxx -> fexx xxxx
*/
#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000)
#define __io_address(n) __io(IO_ADDRESS(n)) #define __io_address(n) __io(IO_ADDRESS(n))
#endif #endif
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <mach/board-eb.h> #include <mach/board-eb.h>
#include <mach/board-pb11mp.h> #include <mach/board-pb11mp.h>
#include <mach/board-pb1176.h> #include <mach/board-pb1176.h>
#include <mach/board-pba8.h>
#define IRQ_LOCALTIMER 29 #define IRQ_LOCALTIMER 29
#define IRQ_LOCALWDOG 30 #define IRQ_LOCALWDOG 30
......
...@@ -23,6 +23,10 @@ ...@@ -23,6 +23,10 @@
/* /*
* Physical DRAM offset. * Physical DRAM offset.
*/ */
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
#define PHYS_OFFSET UL(0x70000000)
#else
#define PHYS_OFFSET UL(0x00000000) #define PHYS_OFFSET UL(0x00000000)
#endif
#endif #endif
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <mach/board-eb.h> #include <mach/board-eb.h>
#include <mach/board-pb11mp.h> #include <mach/board-pb11mp.h>
#include <mach/board-pb1176.h> #include <mach/board-pb1176.h>
#include <mach/board-pba8.h>
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) #define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
...@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void) ...@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
return REALVIEW_PB11MP_UART0_BASE; return REALVIEW_PB11MP_UART0_BASE;
else if (machine_is_realview_pb1176()) else if (machine_is_realview_pb1176())
return REALVIEW_PB1176_UART0_BASE; return REALVIEW_PB1176_UART0_BASE;
else if (machine_is_realview_pba8())
return REALVIEW_PBA8_UART0_BASE;
else else
return 0; return 0;
} }
......
...@@ -18,4 +18,4 @@ ...@@ -18,4 +18,4 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#define VMALLOC_END (PAGE_OFFSET + 0x18000000) #define VMALLOC_END 0xf8000000
...@@ -38,18 +38,14 @@ void local_timer_interrupt(void) ...@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
#define TWD_BASE(cpu) (twd_base_addr + (cpu) * twd_size)
/* set up by the platform code */ /* set up by the platform code */
void __iomem *twd_base_addr; void __iomem *twd_base;
unsigned int twd_size;
static unsigned long mpcore_timer_rate; static unsigned long mpcore_timer_rate;
static void local_timer_set_mode(enum clock_event_mode mode, static void local_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *clk) struct clock_event_device *clk)
{ {
void __iomem *base = TWD_BASE(smp_processor_id());
unsigned long ctrl; unsigned long ctrl;
switch(mode) { switch(mode) {
...@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode, ...@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
ctrl = 0; ctrl = 0;
} }
__raw_writel(ctrl, base + TWD_TIMER_CONTROL); __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
} }
static int local_timer_set_next_event(unsigned long evt, static int local_timer_set_next_event(unsigned long evt,
struct clock_event_device *unused) struct clock_event_device *unused)
{ {
void __iomem *base = TWD_BASE(smp_processor_id()); unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
__raw_writel(evt, base + TWD_TIMER_COUNTER); __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
__raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL); __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
return 0; return 0;
} }
...@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt, ...@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
*/ */
int local_timer_ack(void) int local_timer_ack(void)
{ {
void __iomem *base = TWD_BASE(smp_processor_id()); if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
__raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
__raw_writel(1, base + TWD_TIMER_INTSTAT);
return 1; return 1;
} }
return 0; return 0;
} }
static void __cpuinit twd_calibrate_rate(unsigned int cpu) static void __cpuinit twd_calibrate_rate(void)
{ {
void __iomem *base = TWD_BASE(cpu);
unsigned long load, count; unsigned long load, count;
u64 waitjiffies; u64 waitjiffies;
...@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu) ...@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
waitjiffies += 5; waitjiffies += 5;
/* enable, no interrupt or reload */ /* enable, no interrupt or reload */
__raw_writel(0x1, base + TWD_TIMER_CONTROL); __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
/* maximum value */ /* maximum value */
__raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER); __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
while (get_jiffies_64() < waitjiffies) while (get_jiffies_64() < waitjiffies)
udelay(10); udelay(10);
count = __raw_readl(base + TWD_TIMER_COUNTER); count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
...@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu) ...@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
load = mpcore_timer_rate / HZ; load = mpcore_timer_rate / HZ;
__raw_writel(load, base + TWD_TIMER_LOAD); __raw_writel(load, twd_base + TWD_TIMER_LOAD);
} }
/* /*
* Setup the local clock events for a CPU. * Setup the local clock events for a CPU.
*/ */
void __cpuinit local_timer_setup(unsigned int cpu) void __cpuinit local_timer_setup(void)
{ {
unsigned int cpu = smp_processor_id();
struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
unsigned long flags; unsigned long flags;
twd_calibrate_rate(cpu); twd_calibrate_rate();
clk->name = "local_timer"; clk->name = "local_timer";
clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
...@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu) ...@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
/* /*
* take a local timer down * take a local timer down
*/ */
void __cpuexit local_timer_stop(unsigned int cpu) void __cpuexit local_timer_stop(void)
{ {
__raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL); __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
} }
#else /* CONFIG_LOCAL_TIMERS */ #else /* CONFIG_LOCAL_TIMERS */
...@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode, ...@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
{ {
} }
void __cpuinit local_timer_setup(unsigned int cpu) void __cpuinit local_timer_setup(void)
{ {
unsigned int cpu = smp_processor_id();
struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
clk->name = "dummy_timer"; clk->name = "dummy_timer";
......
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#include <mach/board-pb11mp.h> #include <mach/board-pb11mp.h>
#include <mach/scu.h> #include <mach/scu.h>
#include "core.h"
extern void realview_secondary_startup(void); extern void realview_secondary_startup(void);
/* /*
...@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void); ...@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void);
*/ */
volatile int __cpuinitdata pen_release = -1; volatile int __cpuinitdata pen_release = -1;
static void __iomem *scu_base_addr(void)
{
if (machine_is_realview_eb_mp())
return __io_address(REALVIEW_EB11MP_SCU_BASE);
else if (machine_is_realview_pb11mp())
return __io_address(REALVIEW_TC11MP_SCU_BASE);
else
return (void __iomem *)0;
}
static unsigned int __init get_core_count(void) static unsigned int __init get_core_count(void)
{ {
unsigned int ncores; unsigned int ncores;
void __iomem *scu_base = 0; void __iomem *scu_base = scu_base_addr();
if (machine_is_realview_eb() && core_tile_eb11mp())
scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
else if (machine_is_realview_pb11mp())
scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
if (scu_base) { if (scu_base) {
ncores = __raw_readl(scu_base + SCU_CONFIG); ncores = __raw_readl(scu_base + SCU_CONFIG);
...@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void) ...@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void)
static void scu_enable(void) static void scu_enable(void)
{ {
u32 scu_ctrl; u32 scu_ctrl;
void __iomem *scu_base; void __iomem *scu_base = scu_base_addr();
if (machine_is_realview_eb() && core_tile_eb11mp())
scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
else if (machine_is_realview_pb11mp())
scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
else
BUG();
scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
scu_ctrl |= 1; scu_ctrl |= 1;
...@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) ...@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
* for us: do so * for us: do so
*/ */
if (machine_is_realview_eb() && core_tile_eb11mp()) gic_cpu_init(0, gic_cpu_base_addr);
gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
else if (machine_is_realview_pb11mp())
gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
/* /*
* let the primary processor know we're out of the * let the primary processor know we're out of the
...@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) ...@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
* realview_timer_init * realview_timer_init
*/ */
if ((machine_is_realview_eb() && core_tile_eb11mp()) || local_timer_setup();
machine_is_realview_pb11mp())
local_timer_setup(cpu);
#endif #endif
/* /*
......
...@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = { ...@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
static void __init realview_eb_map_io(void) static void __init realview_eb_map_io(void)
{ {
iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
if (core_tile_eb11mp()) if (core_tile_eb11mp() || core_tile_a9mp())
iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
} }
...@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = { ...@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = {
}, },
}; };
static struct platform_device realview_eb_eth_device = {
.id = 0,
.num_resources = ARRAY_SIZE(realview_eb_eth_resources),
.resource = realview_eb_eth_resources,
};
/* /*
* Detect and register the correct Ethernet device. RealView/EB rev D * Detect and register the correct Ethernet device. RealView/EB rev D
* platforms use the newer SMSC LAN9118 Ethernet chip * platforms use the newer SMSC LAN9118 Ethernet chip
...@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = { ...@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = {
static int eth_device_register(void) static int eth_device_register(void)
{ {
void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
const char *name = NULL;
u32 idrev; u32 idrev;
if (!eth_addr) if (!eth_addr)
return -ENOMEM; return -ENOMEM;
idrev = readl(eth_addr + 0x50); idrev = readl(eth_addr + 0x50);
if ((idrev & 0xFFFF0000) == 0x01180000) if ((idrev & 0xFFFF0000) != 0x01180000)
/* SMSC LAN9118 chip present */ /* SMSC LAN9118 not present, use LAN91C111 instead */
realview_eb_eth_device.name = "smc911x"; name = "smc91x";
else
/* SMSC 91C111 chip present */
realview_eb_eth_device.name = "smc91x";
iounmap(eth_addr); iounmap(eth_addr);
return platform_device_register(&realview_eb_eth_device); return realview_eth_register(name, realview_eb_eth_resources);
} }
static void __init gic_init_irq(void) static void __init gic_init_irq(void)
{ {
if (core_tile_eb11mp()) { if (core_tile_eb11mp() || core_tile_a9mp()) {
unsigned int pldctrl; unsigned int pldctrl;
/* new irq mode */ /* new irq mode */
...@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void) ...@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void)
timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
if (core_tile_eb11mp()) { if (core_tile_eb11mp() || core_tile_a9mp()) {
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
twd_size = REALVIEW_EB11MP_TWD_SIZE;
#endif #endif
timer_irq = IRQ_EB11MP_TIMER0_1; timer_irq = IRQ_EB11MP_TIMER0_1;
} else } else
...@@ -362,7 +353,7 @@ static void __init realview_eb_init(void) ...@@ -362,7 +353,7 @@ static void __init realview_eb_init(void)
{ {
int i; int i;
if (core_tile_eb11mp()) { if (core_tile_eb11mp() || core_tile_a9mp()) {
realview_eb11mp_fixup(); realview_eb11mp_fixup();
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
...@@ -390,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") ...@@ -390,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_EB_UART0_BASE, .phys_io = REALVIEW_EB_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.map_io = realview_eb_map_io, .map_io = realview_eb_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_eb_timer, .timer = &realview_eb_timer,
......
...@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = { ...@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = {
}, },
}; };
static struct platform_device realview_pb1176_smsc911x_device = {
.name = "smc911x",
.id = 0,
.num_resources = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
.resource = realview_pb1176_smsc911x_resources,
};
static void __init gic_init_irq(void) static void __init gic_init_irq(void)
{ {
/* ARM1176 DevChip GIC, primary */ /* ARM1176 DevChip GIC, primary */
...@@ -266,7 +259,7 @@ static void __init realview_pb1176_init(void) ...@@ -266,7 +259,7 @@ static void __init realview_pb1176_init(void)
#endif #endif
realview_flash_register(&realview_pb1176_flash_resource, 1); realview_flash_register(&realview_pb1176_flash_resource, 1);
platform_device_register(&realview_pb1176_smsc911x_device); realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
struct amba_device *d = amba_devs[i]; struct amba_device *d = amba_devs[i];
...@@ -282,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") ...@@ -282,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PB1176_UART0_BASE, .phys_io = REALVIEW_PB1176_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.map_io = realview_pb1176_map_io, .map_io = realview_pb1176_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pb1176_timer, .timer = &realview_pb1176_timer,
......
...@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = { ...@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = {
}, },
}; };
static struct platform_device realview_pb11mp_smsc911x_device = {
.name = "smc911x",
.id = 0,
.num_resources = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
.resource = realview_pb11mp_smsc911x_resources,
};
struct resource realview_pb11mp_cf_resources[] = { struct resource realview_pb11mp_cf_resources[] = {
[0] = { [0] = {
.start = REALVIEW_PB11MP_CF_BASE, .start = REALVIEW_PB11MP_CF_BASE,
...@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void) ...@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void)
timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE); twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
twd_size = REALVIEW_TC11MP_TWD_SIZE;
#endif #endif
realview_timer_init(IRQ_TC11MP_TIMER0_1); realview_timer_init(IRQ_TC11MP_TIMER0_1);
} }
...@@ -314,7 +306,7 @@ static void __init realview_pb11mp_init(void) ...@@ -314,7 +306,7 @@ static void __init realview_pb11mp_init(void)
realview_flash_register(realview_pb11mp_flash_resource, realview_flash_register(realview_pb11mp_flash_resource,
ARRAY_SIZE(realview_pb11mp_flash_resource)); ARRAY_SIZE(realview_pb11mp_flash_resource));
platform_device_register(&realview_pb11mp_smsc911x_device); realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
platform_device_register(&realview_i2c_device); platform_device_register(&realview_i2c_device);
platform_device_register(&realview_pb11mp_cf_device); platform_device_register(&realview_pb11mp_cf_device);
...@@ -332,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") ...@@ -332,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PB11MP_UART0_BASE, .phys_io = REALVIEW_PB11MP_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.map_io = realview_pb11mp_map_io, .map_io = realview_pb11mp_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pb11mp_timer, .timer = &realview_pb11mp_timer,
......
/*
* linux/arch/arm/mach-realview/realview_pba8.c
*
* Copyright (C) 2008 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/icst307.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/board-pba8.h>
#include <mach/irqs.h>
#include "core.h"
#include "clock.h"
static struct map_desc realview_pba8_io_desc[] __initdata = {
{
.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
},
#ifdef CONFIG_PCI
{
.virtual = PCIX_UNIT_BASE,
.pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
.length = REALVIEW_PBA8_PCI_BASE_SIZE,
.type = MT_DEVICE
},
#endif
#ifdef CONFIG_DEBUG_LL
{
.virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
.pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
},
#endif
};
static void __init realview_pba8_map_io(void)
{
iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
}
/*
* RealView PBA8Core AMBA devices
*/
#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
#define GPIO2_DMA { 0, 0 }
#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
#define GPIO3_DMA { 0, 0 }
#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
#define AACI_DMA { 0x80, 0x81 }
#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
#define MMCI0_DMA { 0x84, 0 }
#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
#define KMI0_DMA { 0, 0 }
#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
#define KMI1_DMA { 0, 0 }
#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
#define PBA8_SMC_DMA { 0, 0 }
#define MPMC_IRQ { NO_IRQ, NO_IRQ }
#define MPMC_DMA { 0, 0 }
#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
#define PBA8_CLCD_DMA { 0, 0 }
#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
#define DMAC_DMA { 0, 0 }
#define SCTL_IRQ { NO_IRQ, NO_IRQ }
#define SCTL_DMA { 0, 0 }
#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
#define PBA8_WATCHDOG_DMA { 0, 0 }
#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
#define PBA8_GPIO0_DMA { 0, 0 }
#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
#define GPIO1_DMA { 0, 0 }
#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
#define PBA8_RTC_DMA { 0, 0 }
#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
#define SCI_DMA { 7, 6 }
#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
#define PBA8_UART0_DMA { 15, 14 }
#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
#define PBA8_UART1_DMA { 13, 12 }
#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
#define PBA8_UART2_DMA { 11, 10 }
#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
#define PBA8_UART3_DMA { 0x86, 0x87 }
#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
#define PBA8_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
static struct amba_device *amba_devs[] __initdata = {
&dmac_device,
&uart0_device,
&uart1_device,
&uart2_device,
&uart3_device,
&smc_device,
&clcd_device,
&sctl_device,
&wdog_device,
&gpio0_device,
&gpio1_device,
&gpio2_device,
&rtc_device,
&sci0_device,
&ssp0_device,
&aaci_device,
&mmc0_device,
&kmi0_device,
&kmi1_device,
};
/*
* RealView PB-A8 platform devices
*/
static struct resource realview_pba8_flash_resource[] = {
[0] = {
.start = REALVIEW_PBA8_FLASH0_BASE,
.end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = REALVIEW_PBA8_FLASH1_BASE,
.end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
static struct resource realview_pba8_smsc911x_resources[] = {
[0] = {
.start = REALVIEW_PBA8_ETH_BASE,
.end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_PBA8_ETH,
.end = IRQ_PBA8_ETH,
.flags = IORESOURCE_IRQ,
},
};
struct resource realview_pba8_cf_resources[] = {
[0] = {
.start = REALVIEW_PBA8_CF_BASE,
.end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = REALVIEW_PBA8_CF_MEM_BASE,
.end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = -1, /* FIXME: Find correct irq */
.end = -1,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device realview_pba8_cf_device = {
.name = "compactflash",
.id = 0,
.num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
.resource = realview_pba8_cf_resources,
};
static void __init gic_init_irq(void)
{
/* ARM PB-A8 on-board GIC */
gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
}
static void __init realview_pba8_timer_init(void)
{
timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
realview_timer_init(IRQ_PBA8_TIMER0_1);
}
static struct sys_timer realview_pba8_timer = {
.init = realview_pba8_timer_init,
};
static void __init realview_pba8_init(void)
{
int i;
realview_flash_register(realview_pba8_flash_resource,
ARRAY_SIZE(realview_pba8_flash_resource));
realview_eth_register(NULL, realview_pba8_smsc911x_resources);
platform_device_register(&realview_i2c_device);
platform_device_register(&realview_pba8_cf_device);
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
struct amba_device *d = amba_devs[i];
amba_device_register(d, &iomem_resource);
}
#ifdef CONFIG_LEDS
leds_event = realview_leds_event;
#endif
}
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PBA8_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.map_io = realview_pba8_map_io,
.init_irq = gic_init_irq,
.timer = &realview_pba8_timer,
.init_machine = realview_pba8_init,
MACHINE_END
...@@ -704,7 +704,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH ...@@ -704,7 +704,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0 config CACHE_L2X0
bool "Enable the L2x0 outer cache controller" bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
default y default y
select OUTER_CACHE select OUTER_CACHE
help help
......
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