Commit 65d1f889 authored by Ovidiu Bunea's avatar Ovidiu Bunea Committed by Alex Deucher

drm/amd/display: Roll back unit correction

[why]
This Unit correction exposes a Replay corruption.

[how]
This reverts commit:
commit dbd29029 ("drm/amd/display: Correct unit conversion for vstartup")

Roll back unit conversion until Replay can fix their corruption.

Fixes: dbd29029 ("drm/amd/display: Correct unit conversion for vstartup")
Reviewed-by: default avatarReza Amini <reza.amini@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarOvidiu Bunea <ovidiu.bunea@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 96182df9
...@@ -31,7 +31,6 @@ ...@@ -31,7 +31,6 @@
#include "dml/dcn20/dcn20_fpu.h" #include "dml/dcn20/dcn20_fpu.h"
#include "dml/dcn31/dcn31_fpu.h" #include "dml/dcn31/dcn31_fpu.h"
#include "dml/display_mode_vba.h" #include "dml/display_mode_vba.h"
#include "dml/dml_inline_defs.h"
struct _vcs_dpi_ip_params_st dcn3_14_ip = { struct _vcs_dpi_ip_params_st dcn3_14_ip = {
.VBlankNomDefaultUS = 668, .VBlankNomDefaultUS = 668,
...@@ -274,25 +273,6 @@ static bool is_dual_plane(enum surface_pixel_format format) ...@@ -274,25 +273,6 @@ static bool is_dual_plane(enum surface_pixel_format format)
return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA; return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
} }
/*
* micro_sec_to_vert_lines () - converts time to number of vertical lines for a given timing
*
* @param: num_us: number of microseconds
* @return: number of vertical lines. If exact number of vertical lines is not found then
* it will round up to next number of lines to guarantee num_us
*/
static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)
{
unsigned int num_lines = 0;
unsigned int lines_time_in_ns = 1000.0 *
(((float)timing->h_total * 1000.0) /
((float)timing->pix_clk_100hz / 10.0));
num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0);
return num_lines;
}
int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context, int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes, display_e2e_pipe_params_st *pipes,
bool fast_validate) bool fast_validate)
...@@ -309,22 +289,19 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *c ...@@ -309,22 +289,19 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *c
for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
struct dc_crtc_timing *timing; struct dc_crtc_timing *timing;
unsigned int num_lines = 0;
if (!res_ctx->pipe_ctx[i].stream) if (!res_ctx->pipe_ctx[i].stream)
continue; continue;
pipe = &res_ctx->pipe_ctx[i]; pipe = &res_ctx->pipe_ctx[i];
timing = &pipe->stream->timing; timing = &pipe->stream->timing;
num_lines = micro_sec_to_vert_lines(dcn3_14_ip.VBlankNomDefaultUS, timing);
if (pipe->stream->adjust.v_total_min != 0) if (pipe->stream->adjust.v_total_min != 0)
pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min; pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min;
else else
pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total;
pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;
pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, dcn3_14_ip.VBlankNomDefaultUS);
pipes[pipe_cnt].pipe.dest.vblank_nom = max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width); pipes[pipe_cnt].pipe.dest.vblank_nom = max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width);
pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom); pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);
......
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