Commit 6630d31c authored by Ben Widawsky's avatar Ben Widawsky Committed by Dan Williams

cxl/mem: Get rid of @cxlm.base

@cxlm.base only existed to support holding the base found in the
register block mapping code, and pass it along to the register setup
code. Now that the register setup function has all logic around managing
the registers, from DVSEC to iomapping up to populating our CXL specific
information, it is easy to turn the @base values into local variables
and remove them from our device driver state.
Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarBen Widawsky <ben.widawsky@intel.com>
Link: https://lore.kernel.org/r/20210520212953.1181695-1-ben.widawsky@intel.comSigned-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 1d5a4159
...@@ -49,7 +49,6 @@ struct cxl_memdev { ...@@ -49,7 +49,6 @@ struct cxl_memdev {
/** /**
* struct cxl_mem - A CXL memory device * struct cxl_mem - A CXL memory device
* @pdev: The PCI device associated with this CXL device. * @pdev: The PCI device associated with this CXL device.
* @base: IO mappings to the device's MMIO
* @cxlmd: Logical memory device chardev / interface * @cxlmd: Logical memory device chardev / interface
* @regs: Parsed register blocks * @regs: Parsed register blocks
* @payload_size: Size of space for payload * @payload_size: Size of space for payload
...@@ -64,7 +63,6 @@ struct cxl_memdev { ...@@ -64,7 +63,6 @@ struct cxl_memdev {
*/ */
struct cxl_mem { struct cxl_mem {
struct pci_dev *pdev; struct pci_dev *pdev;
void __iomem *base;
struct cxl_memdev *cxlmd; struct cxl_memdev *cxlmd;
struct cxl_regs regs; struct cxl_regs regs;
......
...@@ -922,11 +922,10 @@ static struct cxl_mem *cxl_mem_create(struct pci_dev *pdev) ...@@ -922,11 +922,10 @@ static struct cxl_mem *cxl_mem_create(struct pci_dev *pdev)
return cxlm; return cxlm;
} }
static int cxl_mem_map_regblock(struct cxl_mem *cxlm, u32 reg_lo, u32 reg_hi) static void __iomem *cxl_mem_map_regblock(struct cxl_mem *cxlm, u32 reg_lo, u32 reg_hi)
{ {
struct pci_dev *pdev = cxlm->pdev; struct pci_dev *pdev = cxlm->pdev;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
void __iomem *regs;
u64 offset; u64 offset;
u8 bar; u8 bar;
int rc; int rc;
...@@ -938,20 +937,18 @@ static int cxl_mem_map_regblock(struct cxl_mem *cxlm, u32 reg_lo, u32 reg_hi) ...@@ -938,20 +937,18 @@ static int cxl_mem_map_regblock(struct cxl_mem *cxlm, u32 reg_lo, u32 reg_hi)
if (pci_resource_len(pdev, bar) < offset) { if (pci_resource_len(pdev, bar) < offset) {
dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar, dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar,
&pdev->resource[bar], (unsigned long long)offset); &pdev->resource[bar], (unsigned long long)offset);
return -ENXIO; return IOMEM_ERR_PTR(-ENXIO);
} }
rc = pcim_iomap_regions(pdev, BIT(bar), pci_name(pdev)); rc = pcim_iomap_regions(pdev, BIT(bar), pci_name(pdev));
if (rc) { if (rc) {
dev_err(dev, "failed to map registers\n"); dev_err(dev, "failed to map registers\n");
return rc; return IOMEM_ERR_PTR(rc);
} }
regs = pcim_iomap_table(pdev)[bar];
cxlm->base = regs + offset;
dev_dbg(dev, "Mapped CXL Memory Device resource\n"); dev_dbg(dev, "Mapped CXL Memory Device resource\n");
return 0;
return pcim_iomap_table(pdev)[bar] + offset;
} }
static int cxl_mem_dvsec(struct pci_dev *pdev, int dvsec) static int cxl_mem_dvsec(struct pci_dev *pdev, int dvsec)
...@@ -993,7 +990,8 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm) ...@@ -993,7 +990,8 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
struct pci_dev *pdev = cxlm->pdev; struct pci_dev *pdev = cxlm->pdev;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
u32 regloc_size, regblocks; u32 regloc_size, regblocks;
int rc, regloc, i; void __iomem *base;
int regloc, i;
regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_OFFSET); regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_OFFSET);
if (!regloc) { if (!regloc) {
...@@ -1019,9 +1017,9 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm) ...@@ -1019,9 +1017,9 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo); reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo);
if (reg_type == CXL_REGLOC_RBI_MEMDEV) { if (reg_type == CXL_REGLOC_RBI_MEMDEV) {
rc = cxl_mem_map_regblock(cxlm, reg_lo, reg_hi); base = cxl_mem_map_regblock(cxlm, reg_lo, reg_hi);
if (rc) if (IS_ERR(base))
return rc; return PTR_ERR(base);
break; break;
} }
} }
...@@ -1031,7 +1029,7 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm) ...@@ -1031,7 +1029,7 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
return -ENXIO; return -ENXIO;
} }
cxl_setup_device_regs(dev, cxlm->base, &regs->device_regs); cxl_setup_device_regs(dev, base, &regs->device_regs);
if (!regs->status || !regs->mbox || !regs->memdev) { if (!regs->status || !regs->mbox || !regs->memdev) {
dev_err(dev, "registers not found: %s%s%s\n", dev_err(dev, "registers not found: %s%s%s\n",
......
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