Commit 6724eeba authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher

drm/amd/display: Don't allow dual-link DVI on all ASICs.

Our APUs (Carrizo, Stoney, Raven) don't support it.

v2: Don't use is_apu as other ASICs might also not support it
Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 35c4c88c
...@@ -45,8 +45,9 @@ static void update_stream_signal(struct dc_stream_state *stream) ...@@ -45,8 +45,9 @@ static void update_stream_signal(struct dc_stream_state *stream)
stream->signal = dc_sink->sink_signal; stream->signal = dc_sink->sink_signal;
if (dc_is_dvi_signal(stream->signal)) { if (dc_is_dvi_signal(stream->signal)) {
if (stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST && if (stream->ctx->dc->caps.dual_link_dvi &&
stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK) stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&
stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK; stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
else else
stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK; stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
......
...@@ -62,6 +62,7 @@ struct dc_caps { ...@@ -62,6 +62,7 @@ struct dc_caps {
bool dcc_const_color; bool dcc_const_color;
bool dynamic_audio; bool dynamic_audio;
bool is_apu; bool is_apu;
bool dual_link_dvi;
}; };
struct dc_dcc_surface_param { struct dc_dcc_surface_param {
......
...@@ -852,6 +852,7 @@ static bool construct( ...@@ -852,6 +852,7 @@ static bool construct(
dc->caps.max_downscale_ratio = 200; dc->caps.max_downscale_ratio = 200;
dc->caps.i2c_speed_in_khz = 40; dc->caps.i2c_speed_in_khz = 40;
dc->caps.max_cursor_size = 128; dc->caps.max_cursor_size = 128;
dc->caps.dual_link_dvi = true;
for (i = 0; i < pool->base.pipe_count; i++) { for (i = 0; i < pool->base.pipe_count; i++) {
pool->base.timing_generators[i] = pool->base.timing_generators[i] =
......
...@@ -1103,6 +1103,8 @@ static bool construct( ...@@ -1103,6 +1103,8 @@ static bool construct(
dc->caps.max_downscale_ratio = 200; dc->caps.max_downscale_ratio = 200;
dc->caps.i2c_speed_in_khz = 100; dc->caps.i2c_speed_in_khz = 100;
dc->caps.max_cursor_size = 128; dc->caps.max_cursor_size = 128;
dc->caps.dual_link_dvi = true;
/************************************************* /*************************************************
* Create resources * * Create resources *
......
...@@ -835,6 +835,8 @@ static bool construct( ...@@ -835,6 +835,8 @@ static bool construct(
dc->caps.max_downscale_ratio = 200; dc->caps.max_downscale_ratio = 200;
dc->caps.i2c_speed_in_khz = 100; dc->caps.i2c_speed_in_khz = 100;
dc->caps.max_cursor_size = 128; dc->caps.max_cursor_size = 128;
dc->caps.dual_link_dvi = true;
dc->debug = debug_defaults; dc->debug = debug_defaults;
/************************************************* /*************************************************
......
...@@ -793,6 +793,7 @@ static bool dce80_construct( ...@@ -793,6 +793,7 @@ static bool dce80_construct(
dc->caps.max_downscale_ratio = 200; dc->caps.max_downscale_ratio = 200;
dc->caps.i2c_speed_in_khz = 40; dc->caps.i2c_speed_in_khz = 40;
dc->caps.max_cursor_size = 128; dc->caps.max_cursor_size = 128;
dc->caps.dual_link_dvi = true;
/************************************************* /*************************************************
* Create resources * * Create resources *
......
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