Commit 67eab12b authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Define skl+ palette anti-collision bit

I've been frobbing the palette anti-collision logic bit
while playing around with DSB. Not sure we'll have real
use for this but let's define the bit anyways so I don't
have to carry it around locally.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221123152638.20622-4-ville.syrjala@linux.intel.comReviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
parent 1867fceb
...@@ -5310,6 +5310,7 @@ ...@@ -5310,6 +5310,7 @@
#define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B) #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
#define PRE_CSC_GAMMA_ENABLE REG_BIT(31) /* icl+ */ #define PRE_CSC_GAMMA_ENABLE REG_BIT(31) /* icl+ */
#define POST_CSC_GAMMA_ENABLE REG_BIT(30) /* icl+ */ #define POST_CSC_GAMMA_ENABLE REG_BIT(30) /* icl+ */
#define PALETTE_ANTICOL_DISABLE REG_BIT(15) /* skl+ */
#define GAMMA_MODE_MODE_MASK REG_GENMASK(1, 0) #define GAMMA_MODE_MODE_MASK REG_GENMASK(1, 0)
#define GAMMA_MODE_MODE_8BIT REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0) #define GAMMA_MODE_MODE_8BIT REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0)
#define GAMMA_MODE_MODE_10BIT REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1) #define GAMMA_MODE_MODE_10BIT REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1)
......
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