Commit 68cc085a authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman

ARM: dts: r8a7794: remove Z clock

R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 8698d83d
...@@ -1028,8 +1028,7 @@ cpg_clocks: cpg_clocks@e6150000 { ...@@ -1028,8 +1028,7 @@ cpg_clocks: cpg_clocks@e6150000 {
clocks = <&extal_clk &usb_extal_clk>; clocks = <&extal_clk &usb_extal_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1", "pll3", clock-output-names = "main", "pll0", "pll1", "pll3",
"lb", "qspi", "sdh", "sd0", "z", "lb", "qspi", "sdh", "sd0", "rcan";
"rcan";
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
/* Variable factor clocks */ /* Variable factor clocks */
......
...@@ -20,8 +20,7 @@ ...@@ -20,8 +20,7 @@
#define R8A7794_CLK_QSPI 5 #define R8A7794_CLK_QSPI 5
#define R8A7794_CLK_SDH 6 #define R8A7794_CLK_SDH 6
#define R8A7794_CLK_SD0 7 #define R8A7794_CLK_SD0 7
#define R8A7794_CLK_Z 8 #define R8A7794_CLK_RCAN 8
#define R8A7794_CLK_RCAN 9
/* MSTP0 */ /* MSTP0 */
#define R8A7794_CLK_MSIOF0 0 #define R8A7794_CLK_MSIOF0 0
......
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