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Kirill Smelkov
linux
Commits
6973ee7e
Commit
6973ee7e
authored
Aug 13, 2009
by
Russell King
Committed by
Russell King
Aug 13, 2009
Browse files
Options
Browse Files
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Plain Diff
Merge branch 'for-rmk' of
git://git.marvell.com/orion
into devel-stable
parents
13efdbec
54a246ff
Changes
10
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Showing
10 changed files
with
491 additions
and
2 deletions
+491
-2
MAINTAINERS
MAINTAINERS
+12
-0
arch/arm/mach-kirkwood/Kconfig
arch/arm/mach-kirkwood/Kconfig
+6
-0
arch/arm/mach-kirkwood/Makefile
arch/arm/mach-kirkwood/Makefile
+1
-0
arch/arm/mach-kirkwood/common.c
arch/arm/mach-kirkwood/common.c
+4
-1
arch/arm/mach-kirkwood/include/mach/kirkwood.h
arch/arm/mach-kirkwood/include/mach/kirkwood.h
+1
-0
arch/arm/mach-kirkwood/openrd_base-setup.c
arch/arm/mach-kirkwood/openrd_base-setup.c
+84
-0
arch/arm/mach-orion5x/Kconfig
arch/arm/mach-orion5x/Kconfig
+14
-0
arch/arm/mach-orion5x/Makefile
arch/arm/mach-orion5x/Makefile
+2
-0
arch/arm/mach-orion5x/addr-map.c
arch/arm/mach-orion5x/addr-map.c
+2
-1
arch/arm/mach-orion5x/d2net-setup.c
arch/arm/mach-orion5x/d2net-setup.c
+365
-0
No files found.
MAINTAINERS
View file @
6973ee7e
...
...
@@ -685,6 +685,18 @@ ARM/MAGICIAN MACHINE SUPPORT
M: Philipp Zabel <philipp.zabel@gmail.com>
S: Maintained
ARM/Marvell Loki/Kirkwood/MV78xx0/Orion SOC support
M: Lennert Buytenhek <buytenh@marvell.com>
M: Nicolas Pitre <nico@marvell.com>
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
T: git git://git.marvell.com/orion
S: Maintained
F: arch/arm/mach-loki/
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mv78xx0/
F: arch/arm/mach-orion5x/
F: arch/arm/plat-orion/
ARM/MIOA701 MACHINE SUPPORT
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
...
...
arch/arm/mach-kirkwood/Kconfig
View file @
6973ee7e
...
...
@@ -38,6 +38,12 @@ config MACH_TS219
Say 'Y' here if you want your kernel to support the
QNAP TS-119 and TS-219 Turbo NAS devices.
config MACH_OPENRD_BASE
bool "Marvell OpenRD Base Board"
help
Say 'Y' here if you want your kernel to support the
Marvell OpenRD Base Board.
endmenu
endif
arch/arm/mach-kirkwood/Makefile
View file @
6973ee7e
...
...
@@ -6,5 +6,6 @@ obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
obj-$(CONFIG_MACH_MV88F6281GTW_GE)
+=
mv88f6281gtw_ge-setup.o
obj-$(CONFIG_MACH_SHEEVAPLUG)
+=
sheevaplug-setup.o
obj-$(CONFIG_MACH_TS219)
+=
ts219-setup.o
obj-$(CONFIG_MACH_OPENRD_BASE)
+=
openrd_base-setup.o
obj-$(CONFIG_CPU_IDLE)
+=
cpuidle.o
arch/arm/mach-kirkwood/common.c
View file @
6973ee7e
...
...
@@ -838,7 +838,8 @@ int __init kirkwood_find_tclk(void)
u32
dev
,
rev
;
kirkwood_pcie_id
(
&
dev
,
&
rev
);
if
(
dev
==
MV88F6281_DEV_ID
&&
rev
==
MV88F6281_REV_A0
)
if
(
dev
==
MV88F6281_DEV_ID
&&
(
rev
==
MV88F6281_REV_A0
||
rev
==
MV88F6281_REV_A1
))
return
200000000
;
return
166666667
;
...
...
@@ -872,6 +873,8 @@ static char * __init kirkwood_id(void)
return
"MV88F6281-Z0"
;
else
if
(
rev
==
MV88F6281_REV_A0
)
return
"MV88F6281-A0"
;
else
if
(
rev
==
MV88F6281_REV_A1
)
return
"MV88F6281-A1"
;
else
return
"MV88F6281-Rev-Unsupported"
;
}
else
if
(
dev
==
MV88F6192_DEV_ID
)
{
...
...
arch/arm/mach-kirkwood/include/mach/kirkwood.h
View file @
6973ee7e
...
...
@@ -101,6 +101,7 @@
#define MV88F6281_DEV_ID 0x6281
#define MV88F6281_REV_Z0 0
#define MV88F6281_REV_A0 2
#define MV88F6281_REV_A1 3
#define MV88F6192_DEV_ID 0x6192
#define MV88F6192_REV_Z0 0
...
...
arch/arm/mach-kirkwood/openrd_base-setup.c
0 → 100644
View file @
6973ee7e
/*
* arch/arm/mach-kirkwood/openrd_base-setup.c
*
* Marvell OpenRD Base Board Setup
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/kirkwood.h>
#include <plat/mvsdio.h>
#include "common.h"
#include "mpp.h"
static
struct
mtd_partition
openrd_base_nand_parts
[]
=
{
{
.
name
=
"u-boot"
,
.
offset
=
0
,
.
size
=
SZ_1M
},
{
.
name
=
"uImage"
,
.
offset
=
MTDPART_OFS_NXTBLK
,
.
size
=
SZ_4M
},
{
.
name
=
"root"
,
.
offset
=
MTDPART_OFS_NXTBLK
,
.
size
=
MTDPART_SIZ_FULL
},
};
static
struct
mv643xx_eth_platform_data
openrd_base_ge00_data
=
{
.
phy_addr
=
MV643XX_ETH_PHY_ADDR
(
8
),
};
static
struct
mv_sata_platform_data
openrd_base_sata_data
=
{
.
n_ports
=
2
,
};
static
struct
mvsdio_platform_data
openrd_base_mvsdio_data
=
{
.
gpio_card_detect
=
29
,
/* MPP29 used as SD card detect */
};
static
unsigned
int
openrd_base_mpp_config
[]
__initdata
=
{
MPP29_GPIO
,
0
};
static
void
__init
openrd_base_init
(
void
)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_init
();
kirkwood_mpp_conf
(
openrd_base_mpp_config
);
kirkwood_uart0_init
();
kirkwood_nand_init
(
ARRAY_AND_SIZE
(
openrd_base_nand_parts
),
25
);
kirkwood_ehci_init
();
kirkwood_ge00_init
(
&
openrd_base_ge00_data
);
kirkwood_sata_init
(
&
openrd_base_sata_data
);
kirkwood_sdio_init
(
&
openrd_base_mvsdio_data
);
}
MACHINE_START
(
OPENRD_BASE
,
"Marvell OpenRD Base Board"
)
/* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
.
phys_io
=
KIRKWOOD_REGS_PHYS_BASE
,
.
io_pg_offst
=
((
KIRKWOOD_REGS_VIRT_BASE
)
>>
18
)
&
0xfffc
,
.
boot_params
=
0x00000100
,
.
init_machine
=
openrd_base_init
,
.
map_io
=
kirkwood_map_io
,
.
init_irq
=
kirkwood_init_irq
,
.
timer
=
&
kirkwood_timer
,
MACHINE_END
arch/arm/mach-orion5x/Kconfig
View file @
6973ee7e
...
...
@@ -89,6 +89,20 @@ config MACH_EDMINI_V2
Say 'Y' here if you want your kernel to support the
LaCie Ethernet Disk mini V2.
config MACH_D2NET
bool "LaCie d2 Network"
select I2C_BOARDINFO
help
Say 'Y' here if you want your kernel to support the
LaCie d2 Network NAS.
config MACH_BIGDISK
bool "LaCie Big Disk Network"
select I2C_BOARDINFO
help
Say 'Y' here if you want your kernel to support the
LaCie Big Disk Network NAS.
config MACH_MSS2
bool "Maxtor Shared Storage II"
help
...
...
arch/arm/mach-orion5x/Makefile
View file @
6973ee7e
...
...
@@ -12,6 +12,8 @@ obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
obj-$(CONFIG_MACH_TS78XX)
+=
ts78xx-setup.o
obj-$(CONFIG_MACH_MV2120)
+=
mv2120-setup.o
obj-$(CONFIG_MACH_EDMINI_V2)
+=
edmini_v2-setup.o
obj-$(CONFIG_MACH_D2NET)
+=
d2net-setup.o
obj-$(CONFIG_MACH_BIGDISK)
+=
d2net-setup.o
obj-$(CONFIG_MACH_MSS2)
+=
mss2-setup.o
obj-$(CONFIG_MACH_WNR854T)
+=
wnr854t-setup.o
obj-$(CONFIG_MACH_RD88F5181L_GE)
+=
rd88f5181l-ge-setup.o
...
...
arch/arm/mach-orion5x/addr-map.c
View file @
6973ee7e
...
...
@@ -84,7 +84,8 @@ static int __init orion5x_cpu_win_can_remap(int win)
orion5x_pcie_id
(
&
dev
,
&
rev
);
if
((
dev
==
MV88F5281_DEV_ID
&&
win
<
4
)
||
(
dev
==
MV88F5182_DEV_ID
&&
win
<
2
)
||
(
dev
==
MV88F5181_DEV_ID
&&
win
<
2
))
||
(
dev
==
MV88F5181_DEV_ID
&&
win
<
2
)
||
(
dev
==
MV88F6183_DEV_ID
&&
win
<
4
))
return
1
;
return
0
;
...
...
arch/arm/mach-orion5x/d2net-setup.c
0 → 100644
View file @
6973ee7e
/*
* arch/arm/mach-orion5x/d2net-setup.c
*
* LaCie d2Network and Big Disk Network NAS setup
*
* Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/ata_platform.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
/*****************************************************************************
* LaCie d2 Network Info
****************************************************************************/
/*
* 512KB NOR flash Device bus boot chip select
*/
#define D2NET_NOR_BOOT_BASE 0xfff80000
#define D2NET_NOR_BOOT_SIZE SZ_512K
/*****************************************************************************
* 512KB NOR Flash on Boot Device
****************************************************************************/
/*
* TODO: Check write support on flash MX29LV400CBTC-70G
*/
static
struct
mtd_partition
d2net_partitions
[]
=
{
{
.
name
=
"Full512kb"
,
.
size
=
MTDPART_SIZ_FULL
,
.
offset
=
0
,
.
mask_flags
=
MTD_WRITEABLE
,
},
};
static
struct
physmap_flash_data
d2net_nor_flash_data
=
{
.
width
=
1
,
.
parts
=
d2net_partitions
,
.
nr_parts
=
ARRAY_SIZE
(
d2net_partitions
),
};
static
struct
resource
d2net_nor_flash_resource
=
{
.
flags
=
IORESOURCE_MEM
,
.
start
=
D2NET_NOR_BOOT_BASE
,
.
end
=
D2NET_NOR_BOOT_BASE
+
D2NET_NOR_BOOT_SIZE
-
1
,
};
static
struct
platform_device
d2net_nor_flash
=
{
.
name
=
"physmap-flash"
,
.
id
=
0
,
.
dev
=
{
.
platform_data
=
&
d2net_nor_flash_data
,
},
.
num_resources
=
1
,
.
resource
=
&
d2net_nor_flash_resource
,
};
/*****************************************************************************
* Ethernet
****************************************************************************/
static
struct
mv643xx_eth_platform_data
d2net_eth_data
=
{
.
phy_addr
=
MV643XX_ETH_PHY_ADDR
(
8
),
};
/*****************************************************************************
* I2C devices
****************************************************************************/
/*
* i2c addr | chip | description
* 0x32 | Ricoh 5C372b | RTC
* 0x3e | GMT G762 | PWM fan controller
* 0x50 | HT24LC08 | eeprom (1kB)
*
* TODO: Add G762 support to the g760a driver.
*/
static
struct
i2c_board_info
__initdata
d2net_i2c_devices
[]
=
{
{
I2C_BOARD_INFO
(
"rs5c372b"
,
0x32
),
},
{
I2C_BOARD_INFO
(
"24c08"
,
0x50
),
},
};
/*****************************************************************************
* SATA
****************************************************************************/
static
struct
mv_sata_platform_data
d2net_sata_data
=
{
.
n_ports
=
2
,
};
#define D2NET_GPIO_SATA0_POWER 3
#define D2NET_GPIO_SATA1_POWER 12
static
void
__init
d2net_sata_power_init
(
void
)
{
int
err
;
err
=
gpio_request
(
D2NET_GPIO_SATA0_POWER
,
"SATA0 power"
);
if
(
err
==
0
)
{
err
=
gpio_direction_output
(
D2NET_GPIO_SATA0_POWER
,
1
);
if
(
err
)
gpio_free
(
D2NET_GPIO_SATA0_POWER
);
}
if
(
err
)
pr_err
(
"d2net: failed to configure SATA0 power GPIO
\n
"
);
err
=
gpio_request
(
D2NET_GPIO_SATA1_POWER
,
"SATA1 power"
);
if
(
err
==
0
)
{
err
=
gpio_direction_output
(
D2NET_GPIO_SATA1_POWER
,
1
);
if
(
err
)
gpio_free
(
D2NET_GPIO_SATA1_POWER
);
}
if
(
err
)
pr_err
(
"d2net: failed to configure SATA1 power GPIO
\n
"
);
}
/*****************************************************************************
* GPIO LED's
****************************************************************************/
/*
* The blue front LED is wired to the CPLD and can blink in relation with the
* SATA activity. This feature is disabled to make this LED compatible with
* the leds-gpio driver: MPP14 and MPP15 are configured to act like output
* GPIO's and have to stay in an active state. This is needed to set the blue
* LED in a "fix on" state regardless of the SATA activity.
*
* The following array detail the different LED registers and the combination
* of their possible values:
*
* led_off | blink_ctrl | SATA active | LED state
* | | |
* 1 | x | x | off
* 0 | 0 | 0 | off
* 0 | 1 | 0 | blink (rate 300ms)
* 0 | x | 1 | on
*
* Notes: The blue and the red front LED's can't be on at the same time.
* Red LED have priority.
*/
#define D2NET_GPIO_RED_LED 6
#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
#define D2NET_GPIO_BLUE_LED_OFF 23
#define D2NET_GPIO_SATA0_ACT 14
#define D2NET_GPIO_SATA1_ACT 15
static
struct
gpio_led
d2net_leds
[]
=
{
{
.
name
=
"d2net:blue:power"
,
.
gpio
=
D2NET_GPIO_BLUE_LED_OFF
,
.
active_low
=
1
,
},
{
.
name
=
"d2net:red:fail"
,
.
gpio
=
D2NET_GPIO_RED_LED
,
},
};
static
struct
gpio_led_platform_data
d2net_led_data
=
{
.
num_leds
=
ARRAY_SIZE
(
d2net_leds
),
.
leds
=
d2net_leds
,
};
static
struct
platform_device
d2net_gpio_leds
=
{
.
name
=
"leds-gpio"
,
.
id
=
-
1
,
.
dev
=
{
.
platform_data
=
&
d2net_led_data
,
},
};
static
void
__init
d2net_gpio_leds_init
(
void
)
{
/* Configure GPIO over MPP max number. */
orion_gpio_set_valid
(
D2NET_GPIO_BLUE_LED_OFF
,
1
);
if
(
gpio_request
(
D2NET_GPIO_SATA0_ACT
,
"LED SATA0 activity"
)
!=
0
)
return
;
if
(
gpio_direction_output
(
D2NET_GPIO_SATA0_ACT
,
1
)
!=
0
)
goto
err_free_1
;
if
(
gpio_request
(
D2NET_GPIO_SATA1_ACT
,
"LED SATA1 activity"
)
!=
0
)
goto
err_free_1
;
if
(
gpio_direction_output
(
D2NET_GPIO_SATA1_ACT
,
1
)
!=
0
)
goto
err_free_2
;
platform_device_register
(
&
d2net_gpio_leds
);
return
;
err_free_2:
gpio_free
(
D2NET_GPIO_SATA1_ACT
);
err_free_1:
gpio_free
(
D2NET_GPIO_SATA0_ACT
);
return
;
}
/****************************************************************************
* GPIO keys
****************************************************************************/
#define D2NET_GPIO_PUSH_BUTTON 18
#define D2NET_GPIO_POWER_SWITCH_ON 8
#define D2NET_GPIO_POWER_SWITCH_OFF 9
#define D2NET_SWITCH_POWER_ON 0x1
#define D2NET_SWITCH_POWER_OFF 0x2
static
struct
gpio_keys_button
d2net_buttons
[]
=
{
{
.
type
=
EV_SW
,
.
code
=
D2NET_SWITCH_POWER_OFF
,
.
gpio
=
D2NET_GPIO_POWER_SWITCH_OFF
,
.
desc
=
"Power rocker switch (auto|off)"
,
.
active_low
=
0
,
},
{
.
type
=
EV_SW
,
.
code
=
D2NET_SWITCH_POWER_ON
,
.
gpio
=
D2NET_GPIO_POWER_SWITCH_ON
,
.
desc
=
"Power rocker switch (on|auto)"
,
.
active_low
=
0
,
},
{
.
type
=
EV_KEY
,
.
code
=
KEY_POWER
,
.
gpio
=
D2NET_GPIO_PUSH_BUTTON
,
.
desc
=
"Front Push Button"
,
.
active_low
=
0
,
},
};
static
struct
gpio_keys_platform_data
d2net_button_data
=
{
.
buttons
=
d2net_buttons
,
.
nbuttons
=
ARRAY_SIZE
(
d2net_buttons
),
};
static
struct
platform_device
d2net_gpio_buttons
=
{
.
name
=
"gpio-keys"
,
.
id
=
-
1
,
.
dev
=
{
.
platform_data
=
&
d2net_button_data
,
},
};
/*****************************************************************************
* General Setup
****************************************************************************/
static
struct
orion5x_mpp_mode
d2net_mpp_modes
[]
__initdata
=
{
{
0
,
MPP_GPIO
},
/* Board ID (bit 0) */
{
1
,
MPP_GPIO
},
/* Board ID (bit 1) */
{
2
,
MPP_GPIO
},
/* Board ID (bit 2) */
{
3
,
MPP_GPIO
},
/* SATA 0 power */
{
4
,
MPP_UNUSED
},
{
5
,
MPP_GPIO
},
/* Fan fail detection */
{
6
,
MPP_GPIO
},
/* Red front LED */
{
7
,
MPP_UNUSED
},
{
8
,
MPP_GPIO
},
/* Rear power switch (on|auto) */
{
9
,
MPP_GPIO
},
/* Rear power switch (auto|off) */
{
10
,
MPP_UNUSED
},
{
11
,
MPP_UNUSED
},
{
12
,
MPP_GPIO
},
/* SATA 1 power */
{
13
,
MPP_UNUSED
},
{
14
,
MPP_GPIO
},
/* SATA 0 active */
{
15
,
MPP_GPIO
},
/* SATA 1 active */
{
16
,
MPP_GPIO
},
/* Blue front LED blink control */
{
17
,
MPP_UNUSED
},
{
18
,
MPP_GPIO
},
/* Front button (0 = Released, 1 = Pushed ) */
{
19
,
MPP_UNUSED
},
{
-
1
}
/* 22: USB port 1 fuse (0 = Fail, 1 = Ok) */
/* 23: Blue front LED off */
/* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
};
static
void
__init
d2net_init
(
void
)
{
/*
* Setup basic Orion functions. Need to be called early.
*/
orion5x_init
();
orion5x_mpp_conf
(
d2net_mpp_modes
);
/*
* Configure peripherals.
*/
orion5x_ehci0_init
();
orion5x_eth_init
(
&
d2net_eth_data
);
orion5x_i2c_init
();
orion5x_uart0_init
();
d2net_sata_power_init
();
orion5x_sata_init
(
&
d2net_sata_data
);
orion5x_setup_dev_boot_win
(
D2NET_NOR_BOOT_BASE
,
D2NET_NOR_BOOT_SIZE
);
platform_device_register
(
&
d2net_nor_flash
);
platform_device_register
(
&
d2net_gpio_buttons
);
d2net_gpio_leds_init
();
pr_notice
(
"d2net: Flash write are not yet supported.
\n
"
);
i2c_register_board_info
(
0
,
d2net_i2c_devices
,
ARRAY_SIZE
(
d2net_i2c_devices
));
}
/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
#ifdef CONFIG_MACH_D2NET
MACHINE_START
(
D2NET
,
"LaCie d2 Network"
)
.
phys_io
=
ORION5X_REGS_PHYS_BASE
,
.
io_pg_offst
=
((
ORION5X_REGS_VIRT_BASE
)
>>
18
)
&
0xFFFC
,
.
boot_params
=
0x00000100
,
.
init_machine
=
d2net_init
,
.
map_io
=
orion5x_map_io
,
.
init_irq
=
orion5x_init_irq
,
.
timer
=
&
orion5x_timer
,
.
fixup
=
tag_fixup_mem32
,
MACHINE_END
#endif
#ifdef CONFIG_MACH_BIGDISK
MACHINE_START
(
BIGDISK
,
"LaCie Big Disk Network"
)
.
phys_io
=
ORION5X_REGS_PHYS_BASE
,
.
io_pg_offst
=
((
ORION5X_REGS_VIRT_BASE
)
>>
18
)
&
0xFFFC
,
.
boot_params
=
0x00000100
,
.
init_machine
=
d2net_init
,
.
map_io
=
orion5x_map_io
,
.
init_irq
=
orion5x_init_irq
,
.
timer
=
&
orion5x_timer
,
.
fixup
=
tag_fixup_mem32
,
MACHINE_END
#endif
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