Commit 69cbbf6b authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently

The imx6ul-evk board designer took the bad decision to tie the
two Ethernet PHY reset lines together. This prevents one Ethernet
interface to work while the other one is brought down. For example:

 # ifconfig eth0 down
 # [  279.386551] fec 2188000.ethernet eth1: Link is Down

Bringing eth0 interface down also causes eth1 to be down.

The Ethernet reset lines comes from the IO expander and both come in
logic level 0 by default.

To fix this issue, remove the Ethernet PHY reset descriptions from
its respective PHY nodes and force both Ethernet PHY lines to be at
logic level 1 via gpio-hog.

Fixes: 2db7e78b ("ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset")
Reported-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 412627f6
......@@ -210,9 +210,6 @@ ethphy0: ethernet-phy@2 {
micrel,led-mode = <1>;
clocks = <&clks IMX6UL_CLK_ENET_REF>;
clock-names = "rmii-ref";
reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <100>;
};
......@@ -222,9 +219,6 @@ ethphy1: ethernet-phy@1 {
micrel,led-mode = <1>;
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
clock-names = "rmii-ref";
reset-gpios = <&gpio_spi 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <100>;
};
};
};
......@@ -243,6 +237,22 @@ &can2 {
status = "okay";
};
&gpio_spi {
eth0-phy-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "eth0-phy";
};
eth1-phy-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "eth1-phy";
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
......
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