Commit 6b547836 authored by Heikki Krogerus's avatar Heikki Krogerus Committed by Stephen Boyd

clk: fractional-divider: support for divider bypassing

If the divider or multiplier values are 0 in the register, bypassing the
divider and returning the parent clock rate in clk_fd_recalc_rate().
Signed-off-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed commitlog typo]
parent 496eadf8
...@@ -36,6 +36,9 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, ...@@ -36,6 +36,9 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
m = (val & fd->mmask) >> fd->mshift; m = (val & fd->mmask) >> fd->mshift;
n = (val & fd->nmask) >> fd->nshift; n = (val & fd->nmask) >> fd->nshift;
if (!n || !m)
return parent_rate;
ret = (u64)parent_rate * m; ret = (u64)parent_rate * m;
do_div(ret, n); do_div(ret, n);
......
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