Commit 6bb18c53 authored by Thierry Reding's avatar Thierry Reding

clk: tegra: Various whitespace cleanups

Make usage of blank lines as separators more consistent.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 04794d98
...@@ -1223,6 +1223,7 @@ static long _pllre_calc_rate(struct tegra_clk_pll *pll, ...@@ -1223,6 +1223,7 @@ static long _pllre_calc_rate(struct tegra_clk_pll *pll,
return output_rate; return output_rate;
} }
static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate, static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate) unsigned long parent_rate)
{ {
......
...@@ -1263,6 +1263,7 @@ static void tegra114_wait_cpu_in_reset(u32 cpu) ...@@ -1263,6 +1263,7 @@ static void tegra114_wait_cpu_in_reset(u32 cpu)
cpu_relax(); cpu_relax();
} while (!(reg & (1 << cpu))); /* check CPU been reset or not */ } while (!(reg & (1 << cpu))); /* check CPU been reset or not */
} }
static void tegra114_disable_cpu_clock(u32 cpu) static void tegra114_disable_cpu_clock(u32 cpu)
{ {
/* flow controller would take care in the power sequence. */ /* flow controller would take care in the power sequence. */
...@@ -1351,7 +1352,6 @@ static void __init tegra114_clock_apply_init_table(void) ...@@ -1351,7 +1352,6 @@ static void __init tegra114_clock_apply_init_table(void)
tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX); tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);
} }
/** /**
* tegra114_car_barrier - wait for pending writes to the CAR to complete * tegra114_car_barrier - wait for pending writes to the CAR to complete
* *
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment