Commit 6c8c1e74 authored by Philippe Lecluse's avatar Philippe Lecluse Committed by Rodrigo Vivi

drm/xe: Fix Meteor Lake rsa issue on guc loading

[  117.901473] xe 0000:00:02.0: [drm] GuC load failed: status = 0x400000A0
[  117.901506] xe 0000:00:02.0: [drm] GuC load failed: status: Reset = 0, BootROM = 0x50, UKernel = 0x00, MIA = 0x00, Auth = 0x01
Signed-off-by: default avatarPhilippe Lecluse <philippe.lecluse@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 9484c7dc
...@@ -436,6 +436,8 @@ static int gt_fw_domain_init(struct xe_gt *gt) ...@@ -436,6 +436,8 @@ static int gt_fw_domain_init(struct xe_gt *gt)
if (err) if (err)
goto err_hw_fence_irq; goto err_hw_fence_irq;
setup_private_ppat(gt);
if (!xe_gt_is_media_type(gt)) { if (!xe_gt_is_media_type(gt)) {
err = xe_ggtt_init(gt, gt->mem.ggtt); err = xe_ggtt_init(gt, gt->mem.ggtt);
if (err) if (err)
...@@ -488,8 +490,6 @@ static int all_fw_domain_init(struct xe_gt *gt) ...@@ -488,8 +490,6 @@ static int all_fw_domain_init(struct xe_gt *gt)
if (err) if (err)
goto err_hw_fence_irq; goto err_hw_fence_irq;
setup_private_ppat(gt);
xe_reg_sr_apply_mmio(&gt->reg_sr, gt); xe_reg_sr_apply_mmio(&gt->reg_sr, gt);
err = xe_gt_clock_init(gt); err = xe_gt_clock_init(gt);
......
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