Commit 6ce1dc45 authored by Stanislaw Gruszka's avatar Stanislaw Gruszka

iwlegacy: s/window/win/

Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
parent ebf0d90d
This diff is collapsed.
......@@ -773,8 +773,8 @@ enum {
*
* Each Tx queue uses a byte-count table containing 320 entries:
* one 16-bit entry for each of 256 TFDs, plus an additional 64 entries that
* duplicate the first 64 entries (to avoid wrap-around within a Tx window;
* max Tx window is 64 TFDs).
* duplicate the first 64 entries (to avoid wrap-around within a Tx win;
* max Tx win is 64 TFDs).
*
* When driver sets up a new TFD, it must also enter the total byte count
* of the frame to be transmitted into the corresponding entry in the byte
......
This diff is collapsed.
......@@ -834,7 +834,7 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id,
il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
il4965_set_wr_ptrs(il, txq_id, ssn_idx);
/* Set up Tx window size and frame limit for this queue */
/* Set up Tx win size and frame limit for this queue */
il_write_targ_mem(il,
il->scd_base_addr + IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
(SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
......@@ -1171,7 +1171,7 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il,
D_TX_REPLY("BA %d %d\n", agg->start_idx,
ba_resp->seq_ctl);
/* Calculate shift to align block-ack bits with our Tx window bits */
/* Calculate shift to align block-ack bits with our Tx win bits */
sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4);
if (sh < 0) /* tbw something is wrong with indices */
sh += 0x100;
......@@ -1260,8 +1260,8 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
/* "flow" corresponds to Tx queue */
u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
/* "ssn" is start of block-ack Tx window, corresponds to index
* (in Tx queue's circular buffer) of first TFD/frame in window */
/* "ssn" is start of block-ack Tx win, corresponds to index
* (in Tx queue's circular buffer) of first TFD/frame in win */
u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
if (scd_flow >= il->hw_params.max_txq_num) {
......@@ -1287,7 +1287,7 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
return;
}
/* Find index just before block-ack window */
/* Find index just before block-ack win */
index = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
spin_lock_irqsave(&il->sta_lock, flags);
......@@ -1309,11 +1309,11 @@ void il4965_rx_reply_compressed_ba(struct il_priv *il,
agg->start_idx,
(unsigned long long)agg->bitmap);
/* Update driver's record of ACK vs. not for each frame in window */
/* Update driver's record of ACK vs. not for each frame in win */
il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
/* Release all TFDs before the SSN, i.e. all TFDs in front of
* block-ack window (we assume that they've been successfully
* block-ack win (we assume that they've been successfully
* transmitted ... if not, it's too late anyway). */
if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
/* calculate mac80211 ampdu sw queue to wake */
......
......@@ -1649,7 +1649,7 @@ static int il4965_tx_status_reply_tx(struct il_priv *il,
u64 bitmap = 0;
int start = agg->start_idx;
/* Construct bit-map of pending frames within Tx window */
/* Construct bit-map of pending frames within Tx win */
for (i = 0; i < agg->frame_count; i++) {
u16 sc;
status = le16_to_cpu(frame_status[i].status);
......
......@@ -754,7 +754,7 @@ struct il4965_rxon_assoc_cmd {
struct il_rxon_time_cmd {
__le64 timestamp;
__le16 beacon_interval;
__le16 atim_window;
__le16 atim_win;
__le32 beacon_init_val;
__le16 listen_interval;
u8 dtim_period;
......@@ -803,15 +803,15 @@ struct il_csa_notification {
* struct il_ac_qos -- QOS timing params for REPLY_QOS_PARAM
* One for each of 4 EDCA access categories in struct il_qosparam_cmd
*
* @cw_min: Contention window, start value in numbers of slots.
* @cw_min: Contention win, start value in numbers of slots.
* Should be a power-of-2, minus 1. Device's default is 0x0f.
* @cw_max: Contention window, max value in numbers of slots.
* @cw_max: Contention win, max value in numbers of slots.
* Should be a power-of-2, minus 1. Device's default is 0x3f.
* @aifsn: Number of slots in Arbitration Interframe Space (before
* performing random backoff timing prior to Tx). Device default 1.
* @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
*
* Device will automatically increase contention window by (2*CW) + 1 for each
* Device will automatically increase contention win by (2*CW) + 1 for each
* transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
* value, to cap the CW value.
*/
......@@ -1948,13 +1948,13 @@ struct il_link_qual_agg_params {
* speculative mode as the new current active mode.
*
* Each history set contains, separately for each possible rate, data for a
* sliding window of the 62 most recent tx attempts at that rate. The data
* sliding win of the 62 most recent tx attempts at that rate. The data
* includes a shifting bitmap of success(1)/failure(0), and sums of successful
* and attempted frames, from which the driver can additionally calculate a
* success ratio (success / attempted) and number of failures
* (attempted - success), and control the size of the window (attempted).
* (attempted - success), and control the size of the win (attempted).
* The driver uses the bit map to remove successes from the success sum, as
* the oldest tx attempts fall out of the window.
* the oldest tx attempts fall out of the win.
*
* When the 4965 device makes multiple tx attempts for a given frame, each
* attempt might be at a different rate, and have different modulation
......@@ -2017,7 +2017,7 @@ struct il_link_qual_agg_params {
*
* 6) Re-evaluate the rate after each tx frame. If working with block-
* acknowledge, history and stats may be calculated for the entire
* block (including prior history that fits within the history windows),
* block (including prior history that fits within the history wins),
* before re-evaluation.
*
* FINDING BEST STARTING MODULATION MODE:
......
......@@ -380,10 +380,10 @@ il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
beacon_int = vif ? vif->bss_conf.beacon_int : 0;
/*
* TODO: For IBSS we need to get atim_window from mac80211,
* TODO: For IBSS we need to get atim_win from mac80211,
* for now just always use 0
*/
ctx->timing.atim_window = 0;
ctx->timing.atim_win = 0;
beacon_int = il_adjust_beacon_interval(beacon_int,
il->hw_params.max_beacon_itrvl * TIME_UNIT);
......@@ -400,7 +400,7 @@ il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
"beacon interval %d beacon timer %d beacon tim %d\n",
le16_to_cpu(ctx->timing.beacon_interval),
le32_to_cpu(ctx->timing.beacon_init_val),
le16_to_cpu(ctx->timing.atim_window));
le16_to_cpu(ctx->timing.atim_win));
return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
sizeof(ctx->timing), &ctx->timing);
......
......@@ -129,7 +129,7 @@ struct il_queue {
int read_ptr; /* last used entry (index) host_r*/
/* use for monitoring and recovering the stuck queue */
dma_addr_t dma_addr; /* physical addr for BD's */
int n_window; /* safe queue window */
int n_win; /* safe queue win */
u32 id;
int low_mark; /* low watermark, resume queue if free
* space more than this */
......@@ -377,9 +377,9 @@ struct il_rx_queue {
* @txq_id: Tx queue used for Tx attempt
* @frame_count: # frames attempted by Tx command
* @wait_for_ba: Expect block-ack before next Tx reply
* @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
* @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
* @bitmap1: High order, one bit for each frame pending ACK in Tx window
* @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
* @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
* @bitmap1: High order, one bit for each frame pending ACK in Tx win
* @rate_n_flags: Rate at which Tx was attempted
*
* If REPLY_TX indicates that aggregation was attempted, driver must wait
......@@ -645,10 +645,10 @@ static inline u8 il_get_cmd_index(struct il_queue *q, u32 index,
* the big buffer at end of command array
*/
if (is_huge)
return q->n_window; /* must be power of 2 */
return q->n_win; /* must be power of 2 */
/* Otherwise, use normal size buffers */
return index & (q->n_window - 1);
return index & (q->n_win - 1);
}
......
......@@ -274,13 +274,13 @@
* The driver sets up each queue to work in one of two modes:
*
* 1) Scheduler-Ack, in which the scheduler automatically supports a
* block-ack (BA) window of up to 64 TFDs. In this mode, each queue
* block-ack (BA) win of up to 64 TFDs. In this mode, each queue
* contains TFDs for a unique combination of Recipient Address (RA)
* and Traffic Identifier (TID), that is, traffic of a given
* Quality-Of-Service (QOS) priority, destined for a single station.
*
* In scheduler-ack mode, the scheduler keeps track of the Tx status of
* each frame within the BA window, including whether it's been transmitted,
* each frame within the BA win, including whether it's been transmitted,
* and whether it's been acknowledged by the receiving station. The device
* automatically processes block-acks received from the receiving STA,
* and reschedules un-acked frames to be retransmitted (successful
......@@ -316,7 +316,7 @@
*/
/**
* Max Tx window size is the max number of contiguous TFDs that the scheduler
* Max Tx win size is the max number of contiguous TFDs that the scheduler
* can keep track of at one time when creating block-ack chains of frames.
* Note that "64" matches the number of ack bits in a block-ack packet.
* Driver should use SCD_WIN_SIZE and SCD_FRAME_LIMIT values to initialize
......@@ -377,7 +377,7 @@
/*
* Queue (x) Read Pointers (indexes, really!), one for each Tx queue.
* For FIFO mode, index indicates next frame to transmit.
* For Scheduler-ACK mode, index indicates first frame in Tx window.
* For Scheduler-ACK mode, index indicates first frame in Tx win.
* Initialized by driver, updated by scheduler.
*/
#define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4)
......@@ -414,7 +414,7 @@
* Driver should init to "1" for aggregation mode, or "0" otherwise.
* 7-6: Driver should init to "0"
* 5: Window Size Left; indicates whether scheduler can request
* another TFD, based on window size, etc. Driver should init
* another TFD, based on win size, etc. Driver should init
* this bit to "1" for aggregation mode, or "0" for non-agg.
* 4-1: Tx FIFO to use (range 0-7).
* 0: Queue is active (1), not active (0).
......@@ -460,7 +460,7 @@
* each queue's entry as follows:
*
* LS Dword bit fields:
* 0-06: Max Tx window size for Scheduler-ACK. Driver should init to 64.
* 0-06: Max Tx win size for Scheduler-ACK. Driver should init to 64.
*
* MS Dword bit fields:
* 16-22: Frame limit. Driver should init to 10 (0xa).
......
......@@ -165,7 +165,7 @@ void il_cmd_queue_unmap(struct il_priv *il)
q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
}
i = q->n_window;
i = q->n_win;
if (txq->meta[i].flags & CMD_MAPPED) {
pci_unmap_single(il->pci_dev,
dma_unmap_addr(&txq->meta[i], mapping),
......@@ -243,7 +243,7 @@ int il_queue_space(const struct il_queue *q)
s -= q->n_bd;
if (s <= 0)
s += q->n_window;
s += q->n_win;
/* keep some reserve to not confuse empty and full situations */
s -= 2;
if (s < 0)
......@@ -260,7 +260,7 @@ static int il_queue_init(struct il_priv *il, struct il_queue *q,
int count, int slots_num, u32 id)
{
q->n_bd = count;
q->n_window = slots_num;
q->n_win = slots_num;
q->id = id;
/* count must be power-of-two size, otherwise il_queue_inc_wrap
......@@ -271,11 +271,11 @@ static int il_queue_init(struct il_priv *il, struct il_queue *q,
* il_get_cmd_index is broken. */
BUG_ON(!is_power_of_2(slots_num));
q->low_mark = q->n_window / 4;
q->low_mark = q->n_win / 4;
if (q->low_mark < 4)
q->low_mark = 4;
q->high_mark = q->n_window / 8;
q->high_mark = q->n_win / 8;
if (q->high_mark < 2)
q->high_mark = 2;
......
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