Commit 6d7a631e authored by Heiner Kallweit's avatar Heiner Kallweit Committed by David S. Miller

r8169: move disabling MAC EEE for RTL8402/RTL8106e

Move configuring EEE on MAC side out of the PHY configuration.
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8d46f620
...@@ -3400,7 +3400,6 @@ static void rtl8402_hw_phy_config(struct rtl8169_private *tp, ...@@ -3400,7 +3400,6 @@ static void rtl8402_hw_phy_config(struct rtl8169_private *tp,
rtl_apply_firmware(tp); rtl_apply_firmware(tp);
/* EEE setting */ /* EEE setting */
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
rtl_writephy(tp, 0x1f, 0x0004); rtl_writephy(tp, 0x1f, 0x0004);
rtl_writephy(tp, 0x10, 0x401f); rtl_writephy(tp, 0x10, 0x401f);
rtl_writephy(tp, 0x19, 0x7030); rtl_writephy(tp, 0x19, 0x7030);
...@@ -3423,7 +3422,6 @@ static void rtl8106e_hw_phy_config(struct rtl8169_private *tp, ...@@ -3423,7 +3422,6 @@ static void rtl8106e_hw_phy_config(struct rtl8169_private *tp,
rtl_apply_firmware(tp); rtl_apply_firmware(tp);
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
rtl_writephy_batch(phydev, phy_reg_init); rtl_writephy_batch(phydev, phy_reg_init);
} }
...@@ -4983,6 +4981,9 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) ...@@ -4983,6 +4981,9 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);
rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00); rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00);
/* disable EEE */
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
rtl_pcie_state_l2l3_disable(tp); rtl_pcie_state_l2l3_disable(tp);
} }
...@@ -4999,6 +5000,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp) ...@@ -4999,6 +5000,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000);
/* disable EEE */
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
rtl_pcie_state_l2l3_disable(tp); rtl_pcie_state_l2l3_disable(tp);
rtl_hw_aspm_clkreq_enable(tp, true); rtl_hw_aspm_clkreq_enable(tp, true);
} }
......
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