Commit 6d7e05ab authored by Shawn Guo's avatar Shawn Guo Committed by Shawn Guo

arm64: dts: zte: remove zx296718 pll_vga clock

Rather than a fixed rate clock, pll_vga is a PLL can be programmed into
different freqencies.  Let's drop it from device tree and get it
registered from clock driver.
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent c1ae3cfa
...@@ -235,13 +235,6 @@ pll_mac: clk-pll-1000m { ...@@ -235,13 +235,6 @@ pll_mac: clk-pll-1000m {
clock-output-names = "pll_mac"; clock-output-names = "pll_mac";
}; };
pll_vga: clk-pll-1073m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1073000000>;
clock-output-names = "pll_vga";
};
pll_mm0: clk-pll-1188m { pll_mm0: clk-pll-1188m {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment